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31. 发明授权

US06741231B2 Active matrix display device and scanning circuit 失效
标题翻译：主动矩阵显示装置和扫描电路
公开(公告)号：US06741231B2
公开(公告)日：2004-05-25
申请号：US10198796
申请日：2002-07-17
申请人： Kenichi Katoh , Yasushi Kubota , Hidehiko Chimura , Jun Koyama
发明人： Kenichi Katoh , Yasushi Kubota , Hidehiko Chimura , Jun Koyama
IPC分类号： G09G336
CPC分类号： G09G3/3677 , G09G2310/0283
摘要： An active matrix display device has a number of pixels arranged in matrix form, signal lines for supplying display signals to the pixels, and a driver circuit for driving the signal lines. The driver circuit includes a frequency divider circuit for frequency-dividing input multi-phase clock signals, a synchronous counter circuit for frequency-dividing part of the input multi-phase clock signals, and a decoder circuit for selecting a desired one of the signal lines based on outputs of the frequency divider circuit and the synchronous counter circuit.
摘要翻译：有源矩阵显示装置具有以矩阵形式布置的多个像素，用于向像素提供显示信号的信号线以及用于驱动信号线的驱动电路。驱动器电路包括用于对输入多相时钟信号进行分频的分频器电路，用于对输入多相时钟信号的一部分进行分频的同步计数器电路，以及用于选择所需信号线的解码器电路基于分频器电路和同步计数器电路的输出。

32. 发明授权

US06300927B1 Display device 失效
标题翻译：显示设备
公开(公告)号：US06300927B1
公开(公告)日：2001-10-09
申请号：US08932246
申请日：1997-09-17
申请人： Yasushi Kubota , Kenichi Katoh , Jun Koyama
发明人： Yasushi Kubota , Kenichi Katoh , Jun Koyama
IPC分类号： G09G336
CPC分类号： G09G3/3648 , G02F1/13454 , G09G2300/0408 , G09G2310/0289
摘要： There is disclosed an active matrix liquid crystal display that receives input signals having small amplitudes and needs no externally attached level-shifting circuit. The active matrix liquid crystal display has a level-shifting circuit for amplifying various input signals, such as control signals, a clock signal, and a start pulse signal, and supplying the amplified signals to peripheral driver circuits. These peripheral driver circuits drive an active matrix circuit. The level-shifting circuit is made of a differential amplifier consisting of polysilicon TFTs. This amplifier is an analog amplifier. This level-shifting circuit is fabricated on the same substrate as the active matrix circuit and the peripheral driver circuits. If the amplitudes of the input signals are small, level-shifting operations can be performed well. Since any externally attached level-shifting circuit is dispensed with, the cost can be curtailed.
摘要翻译：公开了一种有源矩阵液晶显示器，其接收具有小振幅的输入信号，并且不需要外部附接的电平移位电路。有源矩阵液晶显示器具有电平移位电路，用于放大诸如控制信号，时钟信号和起始脉冲信号的各种输入信号，并将放大的信号提供给外围驱动器电路。这些外围驱动电路驱动有源矩阵电路。电平移位电路由由多晶硅TFT组成的差分放大器构成。该放大器是模拟放大器。该电平移位电路制造在与有源矩阵电路和外围驱动电路相同的衬底上。如果输入信号的幅度较小，则可以很好地执行电平转换操作。由于省去了任何外部附加的电平转换电路，所以可以减少成本。

33. 发明授权

US06255695B1 TFT CMOS logic circuit having source/drain electrodes of differing spacing from the gate electrode for decreasing wiring capacitance and power consumption 失效
标题翻译： TFT CMOS逻辑电路具有与栅极间隔不同的源极/漏极，用于降低布线电容和功耗
公开(公告)号：US06255695B1
公开(公告)日：2001-07-03
申请号：US08936472
申请日：1997-09-18
申请人： Yasushi Kubota , Kenichi Katoh , Jun Koyama
发明人： Yasushi Kubota , Kenichi Katoh , Jun Koyama
IPC分类号： H01L310392
CPC分类号： H01L27/1222 , H01L27/1214 , H01L29/41733
摘要： In a field-effect transistor, one of the distance between a gate electrode and a source electrode and the distance between the gate electrode and a drain electrode which one distance is on a side where a signal of a high frequency is applied is made longer than the other distance on a side where a signal of a low frequency is applied.
摘要翻译：在场效应晶体管中，使栅电极与源极之间的距离与施加高频信号的一侧之间的栅电极与漏电极之间的距离长于施加低频信号的一侧的另一距离。

34. 发明授权

US5907313A Matrix-type display device 失效
标题翻译：矩阵式显示装置
公开(公告)号：US5907313A
公开(公告)日：1999-05-25
申请号：US743990
申请日：1996-11-05
申请人： Yasushi Kubota , Kenichi Katoh , Hidehiko Chimura , Jun Koyama
发明人： Yasushi Kubota , Kenichi Katoh , Hidehiko Chimura , Jun Koyama
IPC分类号： G02F1/136 , G02F1/133 , G02F1/1368 , G09G3/36 , G11C19/00 , H01L29/786
CPC分类号： G09G3/3677 , G09G2330/021 , G09G2330/022
摘要： A matrix-type display device in which a number of pixels are arranged and a scanning line and a signal line to which a display signal is output are connected to each pixel. A signal line driver circuit in which a decoder circuit is controlled by a counter circuit, or a scanning line driver circuit in which a decoder circuit is controlled by a counter circuit is divided into a plurality of sections. A clock signal and/or a power supply voltage is selectively supplied to the respective sections.
摘要翻译：其中排列有多个像素并且将扫描线和输出显示信号的信号线连接到每个像素的矩阵型显示装置。其中解码器电路由计数器电路控制的信号线驱动器电路或其中解码器电路由计数器电路控制的扫描线驱动器电路被分成多个部分。选择性地将时钟信号和/或电源电压提供给各个部分。

35. 发明授权

US5892495A Scanning circuit and image display apparatus 失效
标题翻译：扫描电路和图像显示装置
公开(公告)号：US5892495A
公开(公告)日：1999-04-06
申请号：US725314
申请日：1996-10-02
申请人： Tamotsu Sakai , Kenichi Katoh , Yasushi Kubota
发明人： Tamotsu Sakai , Kenichi Katoh , Yasushi Kubota
IPC分类号： G02F1/133 , G09G3/20 , G09G3/36 , G09G5/00
CPC分类号： G09G3/3677 , G09G3/3688 , G09G2310/06 , G09G3/3648
摘要： A scanning circuit is provided with a plurality of address lines and AND circuits. The address lines respectively supply bit signals constituting an address signal and inverted bit signals, and each AND circuit conducts a logical operation on a predetermined number of bit signals and inverted bit signals selected from the bit signals and inverted bit signals supplied from the address lines. The AND circuits are connected to the address lines so that only one bit is switched when the address signal carries. Furthermore, a frequency of the least significant bit of the address signal is set to 1/4 of the dot frequency, while the two bits at the high end are set to have the same frequency and a phase difference of 90.degree. each other. With the described arrangement, a phase shift is prevented from occurring to an outputted signal when the address signal carries. Furthermore, the arrangement ensures that the scanning circuit can be realized in a simple circuit arrangement and operates at low frequencies, thereby ensuring a decrease in power consumption.
摘要翻译：扫描电路设有多个地址线和“与”电路。地址线分别提供构成地址信号和反相位信号的位信号，并且每个AND电路根据从地址线提供的位信号和反转位信号中选择的预定数量的位信号和反相位信号进行逻辑运算。 AND电路连接到地址线，使得只有一个位在地址信号传输时被切换。此外，地址信号的最低有效位的频率被设置为点频的+ E，fra 1/4 + EE，而高端的两位被设置为具有相同的频率和相位差 90°对方。利用所述的布置，当地址信号携带时，防止对输出信号发生相移。此外，该布置确保了扫描电路可以以简单的电路布置实现并且在低频下操作，从而确保功耗的降低。

36. 发明授权

US06879313B1 Shift register circuit, image display apparatus having the circuit, and driving method for LCD devices 有权
标题翻译：移位寄存器电路，具有电路的图像显示装置以及LCD装置的驱动方法
公开(公告)号：US06879313B1
公开(公告)日：2005-04-12
申请号：US09523511
申请日：2000-03-10
申请人： Yasushi Kubota , Hajime Washio , Shigeto Yoshida , Kazuhiro Maeda , Hiroshi Yoneda
发明人： Yasushi Kubota , Hajime Washio , Shigeto Yoshida , Kazuhiro Maeda , Hiroshi Yoneda
IPC分类号： G09G3/36 , G11C19/28 , G11C19/00
CPC分类号： G09G3/3688 , G09G2310/0286 , G09G2310/061 , G09G2310/08 , G09G2320/0233 , G11C19/28
摘要： A shift register circuit includes a plurality of latch circuits connected in series to sequentially transfer a pulse signal ST from one to another, a clock signal line transmitting a clock signal CLK, and a plurality of switching circuits performing electrical connection and disconnection between the clock signal line and the plurality of latch circuits. Upon turning on the shift register, at least one of the switching circuits electrically disconnects at least one of the latch circuits from the clock signal line. During an initialization period immediately after power has been turned on, the frequency of the clock signal CLK is lower than in a normal operation period and gradually increases toward the frequency used in the normal operation period.
摘要翻译：移位寄存器电路包括串联连接的多个锁存电路，以顺序地将脉冲信号ST从一个传送到另一个，一个发送时钟信号CLK的时钟信号线以及执行时钟信号之间的电连接和断开的多个开关电路线和多个锁存电路。在接通移位寄存器时，至少一个开关电路将至少一个锁存电路与时钟信号线电断开。在电源接通之后的初始化期间，时钟信号CLK的频率比正常运行期间低，并且在正常运行期间逐渐增大。

37. 发明申请

US20050168252A1 Shift register circuit, image display apparatus having the circuit, and driving method for LCD devices 失效
公开(公告)号：US20050168252A1
公开(公告)日：2005-08-04
申请号：US11063718
申请日：2005-02-23
申请人： Yasushi Kubota , Hajime Washio , Shigeto Yoshida , Kazuhiro Maeda , Hiroshi Yoneda
发明人： Yasushi Kubota , Hajime Washio , Shigeto Yoshida , Kazuhiro Maeda , Hiroshi Yoneda
IPC分类号： G09G3/36 , G11C19/28 , H03L7/00
CPC分类号： G09G3/3688 , G09G2310/0286 , G09G2310/061 , G09G2310/08 , G09G2320/0233 , G11C19/28
摘要： A shift register circuit includes a plurality of latch circuits connected in series to sequentially transfer a pulse signal ST from one to another, a clock signal line transmitting a clock signal CLK, and a plurality of switching circuits performing electrical connection and disconnection between the clock signal line and the plurality of latch circuits. Upon turning on the shift register, at least one of the switching circuits electrically disconnects at least one of the latch circuits from the clock signal line. During an initialization period immediately after power has been turned on, the frequency of the clock signal CLK is lower than in a normal operation period and gradually increases toward the frequency used in the normal operation period.

38. 发明授权

US5898322A Logic circuit for liquid crystal display having pass-transistor logic circuitry and thin film transistors 失效
标题翻译：具有传输晶体管逻辑电路和薄膜晶体管的液晶显示器的逻辑电路
公开(公告)号：US5898322A
公开(公告)日：1999-04-27
申请号：US524503
申请日：1995-09-07
申请人： Yasushi Kubota , Hiroshi Yoneda
发明人： Yasushi Kubota , Hiroshi Yoneda
IPC分类号： G02F1/133 , G11C19/00 , H01L27/12 , H03K19/0175 , H03K19/173 , H03K19/21 , H03K19/094 , H01L27/00
CPC分类号： H03K19/215 , H03K19/1737
摘要： A logic circuit performs a logic operation on a plurality of input logic signals and outputting a resultant logic signal. The logic circuit comprises a pass-transistor logic circuit including: a plurality of field effect transistors, at least two of the plurality of field effect transistors being coupled in series, a gate electrode of each of the at least two field effect transistors receiving a corresponding first logic signal, and one of drain and source electrodes ditto receiving a corresponding second logic signal; and a node for coupling the other of the drain and source electrodes of the at least two field effect transistors, and for outputting the resultant logic signal. The plurality of field effect transistors are thin film transistors (TFTs).
摘要翻译：逻辑电路对多个输入逻辑信号执行逻辑运算并输出合成的逻辑信号。逻辑电路包括一个通过晶体管逻辑电路，包括：多个场效应晶体管，多个场效应晶体管中的至少两个串联耦合，所述至少两个场效应晶体管中的每一个的栅电极接收相应的第一逻辑信号，以及漏极和源极之一，同时接收对应的第二逻辑信号; 以及用于耦合所述至少两个场效应晶体管的所述漏极和源极中的另一个的节点，并用于输出所得到的逻辑信号。多个场效应晶体管是薄膜晶体管（TFT）。

39. 发明授权

US07173598B2 Shift register circuit, image display apparatus having the circuit, and driving method for LCD devices 有权
公开(公告)号：US07173598B2
公开(公告)日：2007-02-06
申请号：US11063718
申请日：2005-02-22
申请人： Yasushi Kubota , Hajime Washio , Shigeto Yoshida , Kazuhiro Maeda , Hiroshi Yoneda
发明人： Yasushi Kubota , Hajime Washio , Shigeto Yoshida , Kazuhiro Maeda , Hiroshi Yoneda
IPC分类号： G09G3/36
CPC分类号： G09G3/3688 , G09G2310/0286 , G09G2310/061 , G09G2310/08 , G09G2320/0233 , G11C19/28
摘要： A shift register circuit includes a plurality of latch circuits connected in series to sequentially transfer a pulse signal ST from one to another, a clock signal line transmitting a clock signal CLK, and a plurality of switching circuits performing electrical connection and disconnection between the clock signal line and the plurality of latch circuits. Upon turning on the shift register, at least one of the switching circuits electrically disconnects at least one of the latch circuits from the clock signal line. During an initialization period immediately after power has been turned on, the frequency of the clock signal CLK is lower than in a normal operation period and gradually increases toward the frequency used in the normal operation period.

40. 发明授权

US5818068A Thin film transistor circuit and an active matrix type display device 失效
标题翻译：薄膜晶体管电路和有源矩阵型显示装置
公开(公告)号：US5818068A
公开(公告)日：1998-10-06
申请号：US531626
申请日：1995-09-21
申请人： Osamu Sasaki , Manabu Matsuura , Tsukasa Shibuya , Yasushi Kubota
发明人： Osamu Sasaki , Manabu Matsuura , Tsukasa Shibuya , Yasushi Kubota
IPC分类号： H01L21/77 , H01L21/84 , H01L27/12 , H01L29/04
CPC分类号： H01L27/1214
摘要： A TFT circuit according to the present invention includes a first transistor and a second transistor both formed on an insulating substrate. The first transistor has a channel region comprising a polycrystalline silicon film to which a metal element for enhancing crystallization is added. The second transistor has a channel region comprising a polycrystalline silicon film to which no metal element for enhancing crystallization is added.
摘要翻译：根据本发明的TFT电路包括形成在绝缘基板上的第一晶体管和第二晶体管。第一晶体管具有包括多晶硅膜的沟道区，添加用于增强结晶的金属元素。第二晶体管具有包括不添加用于增强结晶的金属元素的多晶硅膜的沟道区。

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