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31. 发明授权

US07847389B2 Semiconductor package, electronic part and electronic device 有权
标题翻译：半导体封装，电子元器件及电子器件
公开(公告)号：US07847389B2
公开(公告)日：2010-12-07
申请号：US12093896
申请日：2006-11-13
申请人： Nobuhiro Mikami , Shinji Watanabe , Junya Sato , Atsumasa Sawada
发明人： Nobuhiro Mikami , Shinji Watanabe , Junya Sato , Atsumasa Sawada
IPC分类号： H01L23/48
CPC分类号： H01L23/4985 , H01L23/49816 , H01L24/50 , H01L2224/16 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/3511
摘要： Even when a substrate on which a semiconductor package has been mounted is made curved, stress upon electrical connections is mitigated, thereby eliminating faulty connections and improving connection reliability. A semiconductor chip has electrodes on a second face thereof. Support blocks, capable of bending and flexing, are placed at two locations on a peripheral edge of a first face of the semiconductor chip. An interposer is placed so as to span the support blocks with the support blocks interposed between itself and the semiconductor chip, and has a wiring pattern in a flexible resin film. Two end portions of the interposer are folded back onto the side of the second face of the semiconductor chip, and the wiring pattern thereof is electrically connected to the electrodes of the semiconductor chip.
摘要翻译：即使当安装了半导体封装的衬底弯曲时，电气连接上的应力减轻，从而消除了连接错误并提高了连接的可靠性。半导体芯片在其第二面具有电极。能够弯曲和弯曲的支撑块被放置在半导体芯片的第一面的外围边缘上的两个位置处。放置插入件以跨越支撑块，其中插入其自身和半导体芯片之间的支撑块，并且在柔性树脂膜中具有布线图案。插入器的两端部被折回到半导体芯片的第二面的一侧，并且其布线图案电连接到半导体芯片的电极。

32. 发明申请

US20100147566A1 COMPOSITE MULTILAYER WIRING BOARD 有权
标题翻译：复合多层接线板
公开(公告)号：US20100147566A1
公开(公告)日：2010-06-17
申请号：US12600677
申请日：2008-04-02
申请人： Junya Sato
发明人： Junya Sato
IPC分类号： H05K1/14 , H05K1/03
CPC分类号： H05K1/0271 , H05K1/036 , H05K3/4626 , H05K2203/0271
摘要： Electronic components on a printed wiring board can be protected from the impact force of a fall, whereby the electrical and mechanical reliability of the electronic apparatus components can be greatly improved, and moreover, smaller size, lighter weight, higher functionality, and greater multifunctionality can be achieved. The composite multilayer wiring board of the present invention includes a plurality of intermediate layers each interposed between a plurality of printed wiring boards, at least one of the plurality of intermediate layers being composed of a resin material having a dilatancy characteristic.
摘要翻译：可以防止印刷电路板上的电子元件免受坠落的冲击力，从而可以大大提高电子设备部件的电气和机械可靠性，而且，更小的尺寸，更轻的重量，更高的功能性和更多的多功能性可以实现。本发明的复合多层布线基板包括多个中间层，其分别插入在多个印刷线路板之间，所述多个中间层中的至少一个由具有膨胀特性的树脂材料构成。

33. 发明申请

US20090135573A1 Circuit board device, wiring board interconnection method, and circuit board module device 有权
标题翻译：电路板装置，接线板互连方式及电路板模块装置
公开(公告)号：US20090135573A1
公开(公告)日：2009-05-28
申请号：US12227803
申请日：2007-05-14
申请人： Junya Sato , Toru Taura , Nobuhiro Mikami , Shinji Watanabe , Atsumasa Sawada , Nozomu Nishimura
发明人： Junya Sato , Toru Taura , Nobuhiro Mikami , Shinji Watanabe , Atsumasa Sawada , Nozomu Nishimura
IPC分类号： H05K1/14 , H05K3/36
CPC分类号： H05K1/144 , H01R12/52 , H05K1/0218 , H05K3/325 , H05K2201/10378 , H05K2201/2018 , Y10T29/49126
摘要： A circuit board device includes: plurality of wiring boards (101 and 102) in which terminals are provided on the front and back surfaces and vias are provided for connecting the terminals together, an anisotropic conductive member (103) arranged between wiring boards (101 and 102) for connecting the electrodes of one wiring board to the electrodes of another wiring board, a functional block (104) composed of a metal material and arranged between the wiring boards (101 and 102) to enclose anisotropic conductive member (103), and a pair of holding blocks (105 and 106) composed of a metal material arranged to clamp the plurality of wiring boards (101 and 102), wherein the plurality of wiring boards (101 and 102), while in a state of being clamped between the pair of holding blocks (105 and 106), is connected together by the anisotropic conductive member (103) and the terminals provided on each of the wiring boards (101 and 102), the functional block (104), and the holding blocks (105 and 106) are electrically connected.
摘要翻译：电路板装置包括：多个在前表面和后表面上设置有端子的布线板（101和102），并且设有用于将端子连接在一起的通孔;布置在布线板（101和102）之间的各向异性导电构件 102），用于将一个布线板的电极连接到另一个布线板的电极;功能块（104），由金属材料构成并布置在布线板（101和102）之间以封闭各向异性导电构件（103）;以及一对夹持多个布线板（101和102）的金属材料构成的保持块（105和106），其中所述多个布线板（101和102）处于夹在所述多个布线板一对保持块（105和106）通过各向异性导电构件（103）和设置在每个布线板（101和102）上的端子，功能块（104）和保持块（105）连接在一起和 106）电连接。

34. 发明申请

US20090096080A1 SEMICONDUCTOR PACKAGE, ELECTRONIC PART AND ELECTRONIC DEVICE 有权
标题翻译：半导体封装，电子部件和电子器件
公开(公告)号：US20090096080A1
公开(公告)日：2009-04-16
申请号：US12093896
申请日：2006-11-13
申请人： Nobuhiro Mikami , Shinji Watanabe , Junya Sato , Atsumasa Sawada
发明人： Nobuhiro Mikami , Shinji Watanabe , Junya Sato , Atsumasa Sawada
IPC分类号： H01L23/48
CPC分类号： H01L23/4985 , H01L23/49816 , H01L24/50 , H01L2224/16 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/3511
摘要： Even when a substrate on which a semiconductor package has been mounted is made curved, stress upon electrical connections is mitigated, thereby eliminating faulty connections and improving connection reliability. A semiconductor chip has electrodes on a second face thereof. Support blocks, capable of bending and flexing, are placed at two locations on a peripheral edge of a first face of the semiconductor chip. An interposer is placed so as to span the support blocks with the support blocks interposed between itself and the semiconductor chip, and has a wiring pattern in a flexible resin film. Two end portions of the interposer are folded back onto the side of the second face of the semiconductor chip, and the wiring pattern thereof is electrically connected to the electrodes of the semiconductor chip.
摘要翻译：即使当安装了半导体封装的衬底弯曲时，电气连接上的应力减轻，从而消除了连接错误并提高了连接的可靠性。半导体芯片在其第二面具有电极。能够弯曲和弯曲的支撑块被放置在半导体芯片的第一面的外围边缘上的两个位置处。放置插入件以跨越支撑块，其中插入其自身和半导体芯片之间的支撑块，并且在柔性树脂膜中具有布线图案。插入器的两端部被折回到半导体芯片的第二面的一侧，并且其布线图案电连接到半导体芯片的电极。

35. 发明授权

US07501584B2 Circuit board device and method for board-to-board connection 有权
标题翻译：电路板装置及板对板连接方法
公开(公告)号：US07501584B2
公开(公告)日：2009-03-10
申请号：US10519002
申请日：2003-06-24
申请人： Yoshiyuki Hashimoto , Junya Sato
发明人： Yoshiyuki Hashimoto , Junya Sato
IPC分类号： H05K1/02
CPC分类号： H05K3/368 , H05K3/305 , H05K3/325 , H05K2201/0314 , H05K2201/09481 , H05K2201/10393 , Y10T29/49126
摘要： A structure for connecting substrates to each other, which is capable of thinning an electronic device on which a plurality of circuit boards is mounted, saving a space of the electronic device, and detaching a circuit board from the electronic device. The circuit board unit includes a first substrate including, on a surface thereof, a first group of electrode terminals arranged in a matrix, a second substrate including, on a surface thereof, a second group of electrode terminals arranged in a matrix in alignment with the first group of electrode terminals, and an anisotropic electrical conductor sandwiched between the first and second substrates. The first and second substrates and the anisotropic electrical conductor are pressurized by means of a pressurizer to electrically connect the electrode terminals to each other through the anisotropic electrical conductor.
摘要翻译：用于连接基板的结构，其能够使其上安装有多个电路板的电子设备变薄，从而节省了电子设备的空间，并且将电路板与电子设备分离。电路板单元包括第一基板，其表面上包括以矩阵形式布置的第一组电极端子，第二基板在其表面上包括布置成矩阵的第二组电极端子，第一组电极端子和夹在第一和第二基板之间的各向异性电导体。第一和第二基板和各向异性电导体通过加压器加压，以通过各向异性导电体将电极端子彼此电连接。

36. 发明申请

US20090002973A1 Mount Board and Electronic Device 审中-公开
标题翻译：安装板和电子设备
公开(公告)号：US20090002973A1
公开(公告)日：2009-01-01
申请号：US12093496
申请日：2006-11-08
申请人： Shinji Watanabe , Nobuhiro Mikami , Junya Sato , Kenichiro Fujii , Katsumi Abe , Atsumasa Sawada
发明人： Shinji Watanabe , Nobuhiro Mikami , Junya Sato , Kenichiro Fujii , Katsumi Abe , Atsumasa Sawada
IPC分类号： H05K7/00
CPC分类号： H05K1/18 , H01L24/18 , H01L24/24 , H01L24/82 , H01L2224/16225 , H01L2224/16227 , H01L2224/18 , H01L2224/24051 , H01L2224/24226 , H01L2224/24998 , H01L2224/32225 , H01L2224/73267 , H01L2224/76155 , H01L2224/82102 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/1515 , H01L2924/15151 , H01L2924/19041 , H01L2924/19043 , H01L2924/19103 , H01L2924/19104 , H01L2924/19105 , H01L2924/3011 , H01L2924/3511 , H05K1/023 , H05K1/0271 , H05K1/0284 , H05K1/185 , H05K1/189 , H05K3/0014 , H05K3/32 , H05K3/4644 , H05K2201/0187 , H05K2201/0191 , H05K2201/0195 , H05K2201/09018 , H05K2201/09036 , H05K2201/09045 , H05K2201/09118 , H05K2201/09436 , H05K2201/10477 , H05K2201/10515 , H05K2201/1053 , H05K2201/10636 , H05K2201/10734 , H05K2203/1469 , H05K2203/302 , Y02P70/611 , H01L2924/00
摘要： An object of the present invention is to allow stress that may be applied to a semiconductor package to be suppressed, when the semiconductor package is mounted on a curved board. In a mount board 1, a semiconductor package 20 is mounted on a curved board 10 including a curved surface on at least a portion thereof. The curved board 10 includes a pedestal portion 13a disposed on a region of the curved surface portion where the semiconductor package 20 is mounted and having an upper surface thereof formed flat, and a plurality of pad portions 15a disposed on the flat surface of the pedestal portion 13a. The pedestal portion 13a is formed of an insulating material. The semiconductor package 20 is mounted on the pad portions 15a.
摘要翻译：本发明的目的在于，当将半导体封装安装在弯曲的基板上时，可以抑制对半导体封装件施加的应力。在安装基板1中，将半导体封装20安装在其至少一部分上包括弯曲表面的弯曲板10上。弯曲板10包括设置在半导体封装20安装的弯曲表面部分的区域上并具有平坦的上表面的基座部分13a和设置在基座部分的平坦表面上的多个焊盘部分15a 13a。基座部分13a由绝缘材料形成。半导体封装20安装在焊盘部分15a上。

37. 发明授权

US06345887B1 Ink jet head for non-impact printer 失效
标题翻译：喷墨头用于无冲击打印机
公开(公告)号：US06345887B1
公开(公告)日：2002-02-12
申请号：US09265590
申请日：1999-03-10
申请人： Junya Sato
发明人： Junya Sato
IPC分类号： B41J2045
CPC分类号： B41J2/1623 , B41J2/14274 , B41J2/1612 , B41J2002/14387 , B41J2002/14491
摘要： A piezoelectric element has inner and outer electrodes in electric connection to one another for oscillating a pressure vessel through an oscillating plate connected to the piezoelectric element. A circuit substrate having an ink jet driver IC and the piezoelectric element are connected to each other via electric bonding members provided between them.
摘要翻译：压电元件具有彼此电连接的内电极和外电极，用于通过连接到压电元件的振荡板使压力容器振荡。具有喷墨驱动器IC和压电元件的电路基板通过设置在它们之间的电接合部件彼此连接。

38. 发明授权

US08625296B2 Mount board and electronic device 有权
公开(公告)号：US08625296B2
公开(公告)日：2014-01-07
申请号：US13158037
申请日：2011-06-10
申请人： Shinji Watanabe , Nobuhiro Mikami , Junya Sato , Kenichiro Fujii , Katsumi Abe , Atsumasa Sawada
发明人： Shinji Watanabe , Nobuhiro Mikami , Junya Sato , Kenichiro Fujii , Katsumi Abe , Atsumasa Sawada
IPC分类号： H05K7/00
CPC分类号： H05K1/18 , H01L24/18 , H01L24/24 , H01L24/82 , H01L2224/16225 , H01L2224/16227 , H01L2224/18 , H01L2224/24051 , H01L2224/24226 , H01L2224/24998 , H01L2224/32225 , H01L2224/73267 , H01L2224/76155 , H01L2224/82102 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/1515 , H01L2924/15151 , H01L2924/19041 , H01L2924/19043 , H01L2924/19103 , H01L2924/19104 , H01L2924/19105 , H01L2924/3011 , H01L2924/3511 , H05K1/023 , H05K1/0271 , H05K1/0284 , H05K1/185 , H05K1/189 , H05K3/0014 , H05K3/32 , H05K3/4644 , H05K2201/0187 , H05K2201/0191 , H05K2201/0195 , H05K2201/09018 , H05K2201/09036 , H05K2201/09045 , H05K2201/09118 , H05K2201/09436 , H05K2201/10477 , H05K2201/10515 , H05K2201/1053 , H05K2201/10636 , H05K2201/10734 , H05K2203/1469 , H05K2203/302 , Y02P70/611 , H01L2924/00
摘要： An object of the present invention is to allow stress that may be applied to a semiconductor package to be suppressed, when the semiconductor package is mounted on a curved board. In a mount board 1, a semiconductor package 20 is mounted on a curved board 10 including a curved surface on at least a portion thereof. The curved board 10 includes a pedestal portion 13a disposed on a region of the curved surface portion where the semiconductor package 20 is mounted and having an upper surface thereof formed flat, and a plurality of pad portions 15a disposed on the flat surface of the pedestal portion 13a. The pedestal portion 13a is formed of an insulating material. The semiconductor package 20 is mounted on the pad portions 15a.

39. 发明授权

US07820584B2 Visible light-responsive photocatalyst, method for producing same, photocatalyst coating agent using same, and photocatalyst dispersion 有权
标题翻译：可见光响应性光催化剂，其制造方法，使用该光催化剂的光催化剂涂布剂和光催化剂分散体
公开(公告)号：US07820584B2
公开(公告)日：2010-10-26
申请号：US12225011
申请日：2007-03-13
申请人： Youichi Ishibai , Takashi Nishikawa , Junya Sato
发明人： Youichi Ishibai , Takashi Nishikawa , Junya Sato
IPC分类号： B01J27/135
CPC分类号： B01J35/004 , B01J23/42 , B01J27/13 , B01J35/002 , B01J37/0215 , B01J37/03
摘要： Disclosed is a photocatalyst which is excited when irradiated with visible light and exhibits high photocatalytic activity stably. This photocatalyst has a white hue with little yellow tint. Specifically, titanium oxide particles and a halogenated platinum compound are heated and mixed in a liquid medium, so that the surfaces of the titanium oxide particles are loaded with the halogenated platinum compound; then the pH of the liquid medium is adjusted to 5 or less; and after that, the liquid medium is neutralized if necessary. By such a process, there can be produced a photocatalyst having a specific surface area of 10-100 m2/g, wherein the surfaces of the titanium oxide particles are loaded with the halogenated platinum compound and the b* value of the powder color according to the Hunter color system is not more than 6.
摘要翻译：公开了一种当用可见光照射并且稳定地表现出高光催化活性时被激发的光催化剂。这种光催化剂具有黄色色调的白色色调。具体地说，将氧化钛颗粒和卤化铂化合物在液体介质中加热混合，以使二氧化钛颗粒的表面装载卤化铂化合物; 然后将液体介质的pH调节至5以下; 之后，根据需要中和液体介质。通过这样的方法，可以制造比表面积为10〜100m 2 / g的光催化剂，其中，氧化钛粒子的表面装载有卤化铂化合物，粉末颜色的b *值根据猎人色系不超过6。

40. 发明申请

US20100148335A1 SEMICONDUCTOR PACKAGE, METHOD OF MANUFACTURING SAME, SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE 审中-公开
标题翻译：半导体封装，制造方法，半导体器件和电子器件
公开(公告)号：US20100148335A1
公开(公告)日：2010-06-17
申请号：US12303778
申请日：2007-05-28
申请人： Nobuhiro Mikami , Shinji Watanabe , Junya Sato , Atsumasa Sawada
发明人： Nobuhiro Mikami , Shinji Watanabe , Junya Sato , Atsumasa Sawada
IPC分类号： H01L25/065 , H01L23/52 , H01L23/488 , H01L21/60
CPC分类号： H01L23/4985 , H01L23/3107 , H01L23/5387 , H01L25/105 , H01L2224/16225 , H01L2224/32225 , H01L2224/73253 , H01L2225/1058
摘要： A highly reliable semiconductor package in which faulty connections do not occur even when an external substrate is curved. The semiconductor package includes a semiconductor chip 1; an interposer substrate 10 arranged so as to enclose the semiconductor chip and having a first electrode pad 14, which is for connecting to an electrode of the semiconductor chip, provided on a wiring layer 12 disposed between insulating layers 11, 13; and a first conductor 2 for connecting the electrode of the semiconductor chip and the electrode pad. A portion of the underside of the interposer substrate 10 is adhered to the interposer substrate 10. A gap 4 is provided between the semiconductor chip 1 and the interposer substrate 10 on the side surface of the semiconductor chip 1. When a substrate 20 on which the semiconductor package has been mounted is made to curve, the gap 4 is arranged at least on the underside of the semiconductor chip 1 and a state is attained in which the interposer substrate 10 departs from the underside of the semiconductor chip 1.
摘要翻译：即使当外部基板弯曲时，也不会发生故障连接的高度可靠的半导体封装。半导体封装包括半导体芯片1; 布置成包围半导体芯片并且具有用于连接到半导体芯片的电极的第一电极焊盘14的插入器基板10设置在布置在绝缘层11,13之间的布线层12上; 以及用于连接半导体芯片的电极和电极焊盘的第一导体2。插入器基板10的下侧的一部分粘附到插入器基板10.在半导体芯片1的侧表面上的半导体芯片1和内插基板10之间设置有间隙4.当基板20 半导体封装已经被安装成曲线，间隙4至少布置在半导体芯片1的下侧，并且获得其中插入器基板10从半导体芯片1的下侧离开的状态。

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