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31. 发明申请

US20060044869A1 Data write circuit and data write method for semiconductor storage device 失效
标题翻译：半导体存储器件的数据写入电路和数据写入方法
公开(公告)号：US20060044869A1
公开(公告)日：2006-03-02
申请号：US11134435
申请日：2005-05-23
申请人： Kazuhiko Oyama
发明人： Kazuhiko Oyama
IPC分类号： G11C16/04
CPC分类号： G11C16/12 , G11C2216/16
摘要： A data write circuit of a semiconductor storage device is provided in which a multi-bit write method can be employed even if data input takes a long time. The data write circuit includes a multi-bit decoder and data latch circuit for sequentially latching a plurality of data to be respectively written to a plurality of memory cells of multi-bits and are sequentially input in accordance with a change of an input multi-bit address, a column decoder for respectively applying latched data to sources of the memory cells based on a column address among the input address, and a cell drain voltage generator for simultaneously applying high cell drain voltage (approx. 5.0 volts) for writing data to the drains of the memory cells when all of the data are latched and are applied to the sources of the memory cells so as to respectively write the data to the memory cells.
摘要翻译：提供了一种半导体存储装置的数据写入电路，其中即使数据输入需要很长时间，也可以采用多位写入方法。数据写入电路包括一个多比特解码器和数据锁存电路，用于顺序地锁存多个数据以被分别写入多个比特的多个存储单元，并根据输入多比特的变化顺序输入地址，列解码器，用于基于输入地址中的列地址分别将锁存数据施加到存储器单元的源，以及单元漏极电压发生器，用于同时施加用于将数据写入的高电压单元漏极电压（约5.0伏特）当所有数据被锁存并被应用于存储器单元的源时，存储单元的漏极分别将数据写入存储单元。

32. 发明申请

US20120015410A1 PYRIPYROPENE A BIOSYNTHETIC GENE 有权
公开(公告)号：US20120015410A1
公开(公告)日：2012-01-19
申请号：US13055532
申请日：2009-07-24
申请人： Hiroyuki Anzai , Kentaro Yamamoto , Mariko Tsuchida , Kazuhiko Oyama , Masaaki Mitomi
发明人： Hiroyuki Anzai , Kentaro Yamamoto , Mariko Tsuchida , Kazuhiko Oyama , Masaaki Mitomi
IPC分类号： C12P17/18 , C12N1/15 , C12N15/70 , C12N1/21 , C07H21/04 , C12N15/80
CPC分类号： C12N9/1029 , C12N9/00 , C12N9/1085 , C12N15/52 , C12P17/181 , Y02P20/52
摘要： An isolated novel polynucleotide comprising a nucleotide sequence encoding at least one polypeptide involved in biosynthesis of pyripyropene A, a recombinant vector comprising the polynucleotide and a transformant comprising the polynucleotide are disclosed. By the present invention, a pyripyropene A biosynthetic gene useful for production of a novel pyripyropene analog, improvement of productivity of a pyripyropene A-producing bacterium, production of an insecticidal agent for microorganisms, creation of a plant resistant to insect pests or the like are provided.
摘要翻译：公开了一种分离的新型多核苷酸，其包含编码参与拟南芥的生物合成的至少一种多肽的核苷酸序列，包含该多核苷酸的重组载体和包含该多核苷酸的转化体。通过本发明，可用于生产新型拟线虫丙烯类似物的拟线虫丙烯生物合成基因，产生拟南芥生产菌的生产力的提高，微生物杀虫剂的生产，抗虫害害虫等的产生，提供。

33. 发明申请

US20110034404A1 PEST CONTROL AGENTS 有权
标题翻译：虫控制剂
公开(公告)号：US20110034404A1
公开(公告)日：2011-02-10
申请号：US12903624
申请日：2010-10-13
申请人： Kimihiko GOTO , Ryo Horikoshi , Mariko Tsuchida , Kazuhiko Oyama , Satoshi Omura , Hiroshi Tomoda , Toshiaki Sunazuka
发明人： Kimihiko GOTO , Ryo Horikoshi , Mariko Tsuchida , Kazuhiko Oyama , Satoshi Omura , Hiroshi Tomoda , Toshiaki Sunazuka
IPC分类号： A01N43/90 , A01P7/04 , C07D493/04 , C07H17/04 , C07D495/04
CPC分类号： A01N43/90
摘要： Disclosed is a composition for use as a pest control agent, comprising a compound represented by formula (I) or an agriculturally and horticulturally acceptable salt thereof as active ingredient and an agriculturally and horticulturally acceptable carrier:
摘要翻译：公开了用作害虫控制剂的组合物，其包含式（I）表示的化合物或其农业和园艺可接受的盐作为活性成分和农业和园艺可接受的载体：

34. 发明申请

US20090137634A1 Pest control agents 有权
标题翻译：害虫控制剂
公开(公告)号：US20090137634A1
公开(公告)日：2009-05-28
申请号：US12318232
申请日：2008-12-23
申请人： Kimihiko Goto , Ryo Horikoshi , Mariko Tsuchida , Kazuhiko Oyama , Satoshi Omura , Hiroshi Tomoda , Toshiaki Sunazuka
发明人： Kimihiko Goto , Ryo Horikoshi , Mariko Tsuchida , Kazuhiko Oyama , Satoshi Omura , Hiroshi Tomoda , Toshiaki Sunazuka
IPC分类号： A01N43/90 , A01P7/04 , C07D493/04
CPC分类号： A01N43/90
摘要： Disclosed is a composition for use as a pest control agent, comprising a compound represented by formula (I) or an agriculturally and horticulturally acceptable salt thereof as active ingredient and an agriculturally and horticulturally acceptable carrier:
摘要翻译：公开了一种用作害虫控制剂的组合物，其包含式（I）表示的化合物或其农业和园艺可接受的盐作为活性成分和农业和园艺可接受的载体：

35. 发明授权

US07518347B2 Regulator circuit 失效
标题翻译：调节器电路
公开(公告)号：US07518347B2
公开(公告)日：2009-04-14
申请号：US11839669
申请日：2007-08-16
申请人： Kazuhiko Oyama
发明人： Kazuhiko Oyama
IPC分类号： G05F1/40
CPC分类号： G05F3/30 , G05F1/46
摘要： A regulator circuit is provided which has a reference voltage outputting unit, a first operational amplifier, a voltage-dividing unit, and a second operational amplifier. The reference voltage outputting unit is connected to a power source voltage, has a rectifying element, and outputs a first reference voltage. The first reference voltage is input to the first operational amplifier, and the first operational amplifier outputs a second reference voltage equal to the first reference voltage. The second reference voltage is input to the voltage-dividing unit, and the voltage-dividing unit outputs a third reference voltage having a voltage lower than the second reference voltage. The third reference voltage is input to the second operational amplifier, and the second operational amplifier outputs an output voltage equal to the third reference voltage.
摘要翻译：提供了具有参考电压输出单元，第一运算放大器，分压单元和第二运算放大器的调节器电路。参考电压输出单元连接到电源电压，具有整流元件，并输出第一参考电压。第一参考电压被输入到第一运算放大器，并且第一运算放大器输出等于第一参考电压的第二参考电压。第二参考电压被输入到分压单元，并且分压单元输出具有低于第二参考电压的电压的第三参考电压。第三参考电压被输入到第二运算放大器，第二运算放大器输出等于第三参考电压的输出电压。

36. 发明授权

US07161848B2 Data write circuit and data write method for semiconductor storage device 失效
标题翻译：半导体存储器件的数据写入电路和数据写入方法
公开(公告)号：US07161848B2
公开(公告)日：2007-01-09
申请号：US11134435
申请日：2005-05-23
申请人： Kazuhiko Oyama
发明人： Kazuhiko Oyama
IPC分类号： G11C7/10
CPC分类号： G11C16/12 , G11C2216/16
摘要： A data write circuit of a semiconductor storage device is provided in which a multi-bit write method can be employed even if data input takes a long time. The data write circuit includes a multi-bit decoder and data latch circuit for sequentially latching a plurality of data to be respectively written to a plurality of memory cells of multi-bits and are sequentially input in accordance with a change of an input multi-bit address, a column decoder for respectively applying latched data to sources of the memory cells based on a column address among the input address, and a cell drain voltage generator for simultaneously applying high cell drain voltage (approx. 5.0 volts) for writing data to the drains of the memory cells when all of the data are latched and are applied to the sources of the memory cells so as to respectively write the data to the memory cells.
摘要翻译：提供了一种半导体存储装置的数据写入电路，其中即使数据输入需要很长时间，也可以采用多位写入方法。数据写入电路包括一个多比特解码器和数据锁存电路，用于顺序地锁存多个数据以被分别写入多个比特的多个存储单元，并根据输入多比特的变化顺序输入地址，列解码器，用于基于输入地址中的列地址分别将锁存数据施加到存储器单元的源，以及单元漏极电压发生器，用于同时施加用于将数据写入的高电压单元漏极电压（约5.0伏特）当所有数据被锁存并被应用于存储器单元的源时，存储单元的漏极分别将数据写入存储单元。

37. 发明授权

US06791373B2 High-voltage detecting circuit 失效
标题翻译：高压检测电路
公开(公告)号：US06791373B2
公开(公告)日：2004-09-14
申请号：US10673226
申请日：2003-09-30
申请人： Kazuhiko Oyama
发明人： Kazuhiko Oyama
IPC分类号： H03K5153
CPC分类号： H03K5/153 , G01R19/16519 , G01R31/31701
摘要： As a power-supply voltage VCC is applied to a second terminal, a latch is reset by a reset signal POR from a power-on reset unit. Subsequently, as the voltage of a signal IN applied to a first terminal is increased to higher than the voltage VCC by a threshold voltage Vth of a PMOS 11, the PMOS 11 turns on, causing a node N1 to become “H.” Thus, a test mode is set in the latch. Subsequently, even if the signal IN is reduced to VCC or lower, the test mode is maintained. A high-voltage test can be conducted by increasing the power-supply voltage at the second terminal, thereby eliminating the need for applying the first terminal with a higher voltage than required to set the test mode. It is therefore possible to prevent a gate oxide film of a buffer from being destroyed.
摘要翻译：由于电源电压VCC被施加到第二端子，所以通过来自复位单元的复位信号POR复位锁存器。随后，随着施加到第一端子的信号IN的电压升高到高于电压VCC的PMOS 11的阈值电压Vth，PMOS 11导通，使节点N1变为“H”。因此，在锁存器中设置测试模式。随后，即使信号IN减小到VCC或更低，也保持测试模式。可以通过增加第二端子上的电源电压来进行高压测试，从而不需要施加比设置测试模式所需的电压更高的电压的第一端子。因此可以防止缓冲器的栅极氧化膜被破坏。

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