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31. 发明申请

US20130001553A1 SEMICONDUCTOR DEVICES HAVING REDUCED SUBSTRATE DAMAGE AND ASSOCIATED METHODS 有权
标题翻译：具有减少的基板损伤和相关方法的半导体器件
公开(公告)号：US20130001553A1
公开(公告)日：2013-01-03
申请号：US13333482
申请日：2011-12-21
申请人： Christopher Vineis , James Carey , Xia Li
发明人： Christopher Vineis , James Carey , Xia Li
IPC分类号： H01L29/04 , H01L29/02 , H01L31/0236
CPC分类号： H01L31/02363 , H01L31/03529 , H01L31/103 , H01L31/1032 , H01L31/1035 , Y02E10/50
摘要： Optoelectronic devices, materials, and associated methods having increased operating performance are provided. In one aspect, for example, an optoelectronic device can include a semiconductor material, a first doped region in the semiconductor material, a second doped region in the semiconductor material forming a junction with the first doped region, and a laser processed region associated with the junction. The laser processed region is positioned to interact with electromagnetic radiation. Additionally, at least a portion of a region of laser damage from the laser processed region has been removed such that the optoelectronic device has an open circuit voltage of from about 500 mV to about 800 mV.
摘要翻译：提供了具有增加的操作性能的光电器件，材料和相关方法。在一个方面，例如，光电子器件可以包括半导体材料，半导体材料中的第一掺杂区域，形成与第一掺杂区域的结的半导体材料中的第二掺杂区域和与第一掺杂区域相关联的激光处理区域交界处激光处理区域定位成与电磁辐射相互作用。此外，已经去除了来自激光加工区域的激光损伤区域的至少一部分，使得光电子器件具有约500mV至约800mV的开路电压。

32. 发明授权

US08212327B2 High fill-factor laser-treated semiconductor device on bulk material with single side contact scheme 有权
标题翻译：高填充因子激光处理的半导体器件在散装材料上具有单面接触方案
公开(公告)号：US08212327B2
公开(公告)日：2012-07-03
申请号：US12853172
申请日：2010-08-09
申请人： Neal T. Kurfiss , James E. Carey , Xia Li
发明人： Neal T. Kurfiss , James E. Carey , Xia Li
IPC分类号： H01L31/00 , H01L47/00 , H01L29/06 , H01L29/24 , H01L29/38 , H01L29/30 , H01L29/36 , H01L29/40 , H01L31/111 , H01L29/732 , H01L27/148 , H01L31/062 , H01L29/861
CPC分类号： H01L27/14603 , H01L27/1464 , H01L27/14683 , H01L31/101 , H01L31/18 , Y10S257/91
摘要： The present disclosure provides systems and methods for configuring and constructing a single photo detector or array of photo detectors with all fabrications circuitry on a single side of the device. Both the anode and the cathode contacts of the diode are placed on a single side, while a layer of laser treated semiconductor is placed on the opposite side for enhanced cost-effectiveness, photon detection, and fill factor.
摘要翻译：本公开提供了用于在设备的单侧上配置和构造单个光电检测器或光电检测器阵列的系统和方法，所述光检测器或阵列具有所有制造电路。二极管的阳极和阴极触点都放置在一侧，而一层激光处理的半导体放置在相反的一侧，以提高成本效益，光子检测和填充因子。

33. 发明授权

US08125040B2 Two mask MTJ integration for STT MRAM 有权
标题翻译：两个掩模MTJ集成为STT MRAM
公开(公告)号：US08125040B2
公开(公告)日：2012-02-28
申请号：US12405461
申请日：2009-03-17
申请人： Seung H. Kang , Xia Li , Shiqun Gu , Matthew Nowak
发明人： Seung H. Kang , Xia Li , Shiqun Gu , Matthew Nowak
IPC分类号： H01L29/82
CPC分类号： H01L43/08 , G11C11/161 , H01L43/12
摘要： A method for forming a magnetic tunnel junction (MTJ) for magnetic random access memory (MRAM) using two masks includes depositing over an interlevel dielectric layer containing an exposed first interconnect metallization, a first electrode, a fixed magnetization layer, a tunneling barrier layer, a free magnetization layer and a second electrode. An MTJ structure including the tunnel barrier layer, free layer and second electrode is defined above the first interconnect metallization by a first mask. A first passivation layer encapsulates the MTJ structure, leaving the second electrode exposed. A third electrode is deposited in contact with the second electrode. A second mask is used to pattern a larger structure including the third electrode, the first passivation layer, the fixed magnetization layer and the first electrode. A second dielectric passivation layer covers the etched plurality of layers, the first interlevel dielectric layer and the first interconnect metallization.
摘要翻译：使用两个掩模形成用于磁性随机存取存储器（MRAM）的磁性隧道结（MTJ）的方法包括在包含暴露的第一互连金属化的层间介质层上沉积，第一电极，固定磁化层，隧道势垒层，自由磁化层和第二电极。包括隧道势垒层，自由层和第二电极的MTJ结构通过第一掩模限定在第一互连金属化之上。第一钝化层封装MTJ结构，留下第二电极。沉积与第二电极接触的第三电极。使用第二掩模来图案化包括第三电极，第一钝化层，固定磁化层和第一电极的较大结构。第二电介质钝化层覆盖被蚀刻的多个层，第一层间介质层和第一互连金属化层。

34. 发明授权

US08093982B2 Three dimensional inductor and transformer design methodology of glass technology 有权
标题翻译：玻璃技术的三维电感和变压器设计方法
公开(公告)号：US08093982B2
公开(公告)日：2012-01-10
申请号：US12731393
申请日：2010-03-25
申请人： Jonghae Kim , Milind P. Shah , Chi Shun Lo , Je-Hsiung Lan , Xia Li , Matthew Michael Nowak
发明人： Jonghae Kim , Milind P. Shah , Chi Shun Lo , Je-Hsiung Lan , Xia Li , Matthew Michael Nowak
IPC分类号： H01F5/00
CPC分类号： H01L28/10 , H01F2017/004 , H01L21/84 , H01L23/645 , H01L27/12 , H01L2924/0002 , H01L2924/00
摘要： An inductor or transformer for use in integrated circuit devices that includes a high-resistivity substrate. The inductor includes a plurality of conductive traces around the substrate forming a continuous conductive path from a first to a second port. The conductive path can be solenoid-shaped. Some of the conductive traces can be formed during back-end-of-line processing or backside plating of an integrated circuit die. The transformer includes a first inductor with input and output ports, and a first continuous conductive path therebetween; and a second inductor with input and output ports, and a second continuous conductive path therebetween. The second inductor is independent of and electromagnetically coupled to the first inductor. The first and second conductive paths can be solenoid-shaped. The first conductive path can be interleaved with the second conductive path.
摘要翻译：一种用于集成电路器件的电感器或变压器，其包括高电阻率衬底。电感器包括围绕衬底的多个导电迹线，形成从第一端口到第二端口的连续导电路径。导电路径可以是螺线管形的。一些导电迹线可以在集成电路管芯的后端处理或背面电镀期间形成。变压器包括具有输入和输出端口的第一电感器和它们之间的第一连续导电路径; 以及具有输入和输出端口的第二电感器以及它们之间的第二连续导电路径。第二电感器与第一电感器无关并与其电磁耦合。第一和第二导电路径可以是螺线管形的。第一导电路径可以与第二导电路径交错。

35. 发明授权

US08077504B2 Shallow trench type quadri-cell of phase-change random access memory (PRAM) 有权
标题翻译：浅沟槽四相单相相变随机存取存储器（PRAM）
公开(公告)号：US08077504B2
公开(公告)日：2011-12-13
申请号：US12421011
申请日：2009-04-09
申请人： Xia Li
发明人： Xia Li
IPC分类号： H01L47/00 , H01L21/20 , H01L21/00
CPC分类号： H01L45/122 , G11C13/0004 , G11C2013/008 , H01L27/2463 , H01L45/06 , H01L45/126 , H01L45/1683
摘要： A method of forming a phase-change random access memory (PRAM) cell and PRAM arrangement, and embodiments of phase-change random access memory (PRAM) cells and PRAM arrangements are disclosed. A phase-change random access memory (PRAM) cell includes a bottom electrode, a heater resistor coupled to the bottom electrode, a phase change material (PCM) coupled to the heater resistor, and a top electrode coupled to the phase change material. An active region between the heater resistor and the phase change material is defined by a thickness of the heater resistor.
摘要翻译：公开了形成相变随机存取存储器（PRAM）单元和PRAM布置的方法以及相变随机存取存储器（PRAM）单元和PRAM布置的实施例。相变随机存取存储器（PRAM）单元包括底部电极，耦合到底部电极的加热电阻器，耦合到加热器电阻器的相变材料（PCM）和耦合到相变材料的顶部电极。加热电阻器和相变材料之间的有源区域由加热电阻器的厚度限定。

36. 发明申请

US20110200013A1 HANDOVER CONTROL SYSTEM, USER TERMINAL, SIGNALING RELAY APPARATUS, AND SESSION CONTROL APPARATUS 有权
标题翻译：切换控制系统，用户终端，信号继电器和会话控制装置
公开(公告)号：US20110200013A1
公开(公告)日：2011-08-18
申请号：US13126581
申请日：2009-11-06
申请人： Hong Cheng , Tien Ming Benjamin Koh , Xia Li , Takako Hori
发明人： Hong Cheng , Tien Ming Benjamin Koh , Xia Li , Takako Hori
IPC分类号： H04W36/00
CPC分类号： H04W36/0011 , H04W80/10
摘要： The invention discloses a technique to adequately control a handover of a user terminal in a data communication network and to decrease the number of signalings. According to this technique, when address of a user terminal (UE (101)) is not changed after a handover, UE (101) transmits a session update signaling message to carry out update processing of application session to P-CSCF 1 (121) corresponding to a location before the handover via P-CSCF 2 (123) corresponding to a location after the handover. P-CSCF 1 (121) transfers a session update signaling message to S-CSCF/AS (125) by using setup of signaling relating to UE (100) before the handover. At S-CSCF/AS (125), the application session is updated by using registration information of UE (100) before the handover.
摘要翻译：本发明公开了一种适当控制用户终端在数据通信网络中的切换并减少信令数量的技术。根据该技术，在切换后用户终端（UE（101））的地址没有变化的情况下，UE（101）发送会话更新信令消息，对P-CSCF 1（121）进行应用会话的更新处理，对应于与切换之后的位置相对应的经由P-CSCF 2（123）的切换之前的位置。 P-CSCF 1（121）通过在切换之前使用与UE（100）相关的信令的建立来将会话更新信令消息传送到S-CSCF / AS（125）。在S-CSCF / AS（125）中，通过在切换之前使用UE（100）的注册信息来更新应用会话。

37. 发明授权

US07885105B2 Magnetic tunnel junction cell including multiple vertical magnetic domains 有权
标题翻译：磁隧道结电池包括多个垂直磁畴
公开(公告)号：US07885105B2
公开(公告)日：2011-02-08
申请号：US12054536
申请日：2008-03-25
申请人： Xia Li , Seung H. Kang , Xiaochun Zhu
发明人： Xia Li , Seung H. Kang , Xiaochun Zhu
IPC分类号： G11C11/15
CPC分类号： H01L27/228 , G11C11/161 , G11C11/1659 , G11C11/1675 , G11C11/5607 , G11C19/0808 , H01L43/08 , H01L43/12 , Y10S977/933 , Y10S977/935
摘要： Magnetic tunnel junction cell including multiple vertical domains. In an embodiment, a magnetic tunnel junction (MTJ) structure is disclosed. The MTJ structure includes an MTJ cell. The MTJ cell includes multiple vertical side walls. Each of the multiple vertical side walls defines a unique vertical magnetic domain. Each of the unique vertical magnetic domains is adapted to store a digital value.
摘要翻译：包括多个垂直域的磁隧道结电池。在一个实施例中，公开了磁隧道结（MTJ）结构。 MTJ结构包括MTJ单元。 MTJ单元包括多个垂直侧壁。多个垂直侧壁中的每一个限定了唯一的垂直磁畴。每个独特的垂直磁畴适用于存储数字值。

38. 发明申请

US20100258887A1 Magnetic Tunnel Junction (MTJ) and Methods, and Magnetic Random Access Memory (MRAM) Employing Same 有权
标题翻译：磁隧道结（MTJ）和方法，以及使用相同的磁性随机存取存储器（MRAM）
公开(公告)号：US20100258887A1
公开(公告)日：2010-10-14
申请号：US12423298
申请日：2009-04-14
申请人： Xiaochun Zhu , Matthew Nowak , Xia Li , Seung H. Kang
发明人： Xiaochun Zhu , Matthew Nowak , Xia Li , Seung H. Kang
IPC分类号： H01L29/82 , H01L21/00
CPC分类号： H01L43/02 , G11C11/16 , G11C11/161 , G11C11/1659 , H01F10/3254 , H01F10/3272 , H01L27/228 , H01L43/08 , H01L43/12
摘要： Magnetic tunnel junctions (MTJs) and methods of forming same are disclosed. A pinned layer is disposed in the MTJ such that a free layer of the MTJ can couple to a drain of an access transistor when provided in a magnetic random access memory (MRAM) bitcell. This structure alters the write current flow direction to align the write current characteristics of the MTJ with write current supply capability of an MRAM bitcell employing the MTJ. As a result, more write current can be provided to switch the MTJ from a parallel (P) to anti-parallel (AP) state. An anti-ferromagnetic material (AFM) layer is provided on the pinned layer to fix pinned layer magnetization. To provide enough area for depositing the AFM layer to secure pinned layer magnetization, a pinned layer having a pinned layer surface area greater than a free layer surface area of the free layer is provided.
摘要翻译：公开了磁隧道结（MTJ）及其形成方法。被钉扎层设置在MTJ中，使得当提供在磁性随机存取存储器（MRAM）位单元中时，MTJ的自由层可以耦合到存取晶体管的漏极。该结构改变写入电流流动方向，以使MTJ的写入电流特性与使用MTJ的MRAM位单元的写入电流供应能力对准。结果，可以提供更多的写入电流以将MTJ从并行（P）切换到反并行（AP）状态。在钉扎层上提供反铁磁材料（AFM）层以固定钉扎层的磁化强度。为了提供足够的用于沉积AFM层以确保钉扎层磁化的区域，提供了具有大于自由层的自由层表面积的钉扎层表面积的钉扎层。

39. 发明授权

US07781231B2 Method of forming a magnetic tunnel junction device 有权
标题翻译：形成磁隧道结装置的方法
公开(公告)号：US07781231B2
公开(公告)日：2010-08-24
申请号：US12044596
申请日：2008-03-07
申请人： Xia Li
发明人： Xia Li
IPC分类号： H01L21/00
CPC分类号： H01L43/12 , B82Y25/00 , B82Y40/00 , G11C11/16 , G11C11/161 , G11C11/1659 , G11C11/5607 , G11C2211/5615 , H01F10/3254 , H01F41/308 , H01L27/222 , H01L43/08
摘要： A method of manufacturing a magnetic tunnel junction device is disclosed that includes forming a trench in a substrate, depositing a conductive terminal within the trench, and depositing a magnetic tunnel junction (MTJ) structure within the trench. The MTJ structure includes a fixed magnetic layer having a fixed magnetic orientation, a tunnel junction layer, and a free magnetic layer having a configurable magnetic orientation. The fixed magnetic layer is coupled to the conductive terminal along an interface that extends substantially normal to a surface of the substrate. The free magnetic layer that is adjacent to the conductive terminal carries a magnetic domain adapted to store a digital value.
摘要翻译：公开了一种制造磁性隧道结装置的方法，其包括在衬底中形成沟槽，在沟槽内沉积导电端子，以及在沟槽内沉积磁性隧道结（MTJ）结构。 MTJ结构包括具有固定磁性取向的固定磁性层，隧道结层和具有可配置磁性取向的自由磁性层。固定磁性层沿着基本上垂直于衬底的表面延伸的界面耦合到导电端子。与导电端子相邻的自由磁性层承载适于存储数字值的磁畴。

40. 发明申请

US20100074092A1 Reducing Spin Pumping Induced Damping of a Free Layer of a Memory Device 有权
标题翻译：减少旋转泵送引起的存储器件自由层的阻尼
公开(公告)号：US20100074092A1
公开(公告)日：2010-03-25
申请号：US12236956
申请日：2008-09-24
申请人： Xiaochun Zhu , Seung H. Kang , Xia Li
发明人： Xiaochun Zhu , Seung H. Kang , Xia Li
IPC分类号： G11B9/00
CPC分类号： H01L27/228 , G11C11/161 , G11C11/1673 , G11C11/1675 , H01L43/08
摘要： A system and method of reducing spin pumping induced damping of a free layer of a memory device is disclosed. The memory device includes an anti-ferromagnetic material (AFM) pinning layer in contact with a bit line access electrode. The memory device also includes a pinned layer in contact with the AFM pinning layer, a tunnel barrier layer in contact with the pinned layer, and a free layer in contact with the tunnel barrier layer. The memory device includes a spin torque enhancing layer in contact with the free layer and in contact with an access transistor electrode. The spin torque enhancing layer is configured to substantially reduce spin pumping induced damping of the free layer.
摘要翻译：公开了一种降低自旋泵送诱发的存储器件自由层阻尼的系统和方法。存储器件包括与位线接入电极接触的反铁磁材料（AFM）钉扎层。存储器件还包括与AFM钉扎层接触的钉扎层，与钉扎层接触的隧道势垒层和与隧道势垒层接触的自由层。存储器件包括与自由层接触并与存取晶体管电极接触的自旋转矩增强层。自旋扭矩增强层被配置为基本上减少自由层的自旋泵送引起的阻尼。

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