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31. 发明申请

US20130067204A1 Instructions With Floating Point Control Override 有权
标题翻译：浮点控制覆盖指令
公开(公告)号：US20130067204A1
公开(公告)日：2013-03-14
申请号：US13670326
申请日：2012-11-06
申请人： Cristina S. Anderson , Simon Rubanovich , Benny Eitan
发明人： Cristina S. Anderson , Simon Rubanovich , Benny Eitan
IPC分类号： G06F9/302
CPC分类号： G06F9/30014 , G06F9/30094 , G06F9/30185 , G06F9/30189
摘要： Methods and apparatus relating to instructions with floating point control override are described. In an embodiment, floating point operation settings indicated by a floating point control register may be overridden on a per instruction basis. Other embodiments are also described.
摘要翻译：描述与浮点控制超控的指令有关的方法和装置。在一个实施例中，由浮点控制寄存器指示的浮点运算设置可以在每个指令的基础上被覆盖。还描述了其它实施例。

32. 发明申请

US20090172355A1 INSTRUCTIONS WITH FLOATING POINT CONTROL OVERRIDE 有权
标题翻译：带浮动点控制指令
公开(公告)号：US20090172355A1
公开(公告)日：2009-07-02
申请号：US11967145
申请日：2007-12-29
申请人： Cristina S. Anderson , Simon Rubanovich , Benny Eitan
发明人： Cristina S. Anderson , Simon Rubanovich , Benny Eitan
IPC分类号： G06F9/44
CPC分类号： G06F9/30014 , G06F9/30094 , G06F9/30185 , G06F9/30189
摘要： Methods and apparatus relating to instructions with floating point control override are described. In an embodiment, floating point operation settings indicated by a floating point control register may be overridden on a per instruction basis. Other embodiments are also described.
摘要翻译：描述与浮点控制超控的指令有关的方法和装置。在一个实施例中，由浮点控制寄存器指示的浮点运算设置可以在每个指令的基础上被覆盖。还描述了其它实施例。

33. 发明申请

US20060294177A1 Method, system and apparatus of performing division operations 审中-公开
标题翻译：执行分割操作的方法，系统和装置
公开(公告)号：US20060294177A1
公开(公告)日：2006-12-28
申请号：US11166140
申请日：2005-06-27
申请人： Simon Rubanovich
发明人： Simon Rubanovich
IPC分类号： G06F7/52
CPC分类号： G06F7/535 , G06F2207/5356
摘要： Embodiments of the present invention provide a method, apparatus and system of dividing a first number by a second number. Some demonstrative embodiments include generating a first value relating to the first number; generating a second value corresponding to a remainder of a division of the number one by the second number; and dividing the first value by the second value. Some demonstrative embodiments include generating a plurality of independent interim values by adding at least first and second sets of one or more carry bits of an encoded remainder value corresponding to a cycle of a division operation to at least first and second sets of one or more sum bits of the encoded remainder value, respectively; and generating a plurality of coefficients corresponding to a quotient digit of the cycle based on the plurality of interim values. Other embodiments are described and claimed.
摘要翻译：本发明的实施例提供一种将第一数量除以第二数量的方法，装置和系统。一些说明性实施例包括生成与第一数字有关的第一值; 产生对应于第一个数除数的余数的第二个值; 并将第一个值除以第二个值。一些说明性实施例包括通过将对应于除法运算的循环的编码余数值的一个或多个进位中的至少第一组和第二组相加至一个或多个总和的至少第一组和第二组来生成多个独立中间值分别编码余数值的位; 以及基于所述多个临时值生成与所述周期的商数相对应的多个系数。描述和要求保护其他实施例。

34. 发明申请

US20140195580A1 FLOATING POINT ROUND-OFF AMOUNT DETERMINATION PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS 有权
标题翻译：浮动点关闭金额确定处理器，方法，系统和指令
公开(公告)号：US20140195580A1
公开(公告)日：2014-07-10
申请号：US13977257
申请日：2011-12-30
申请人： Cristina S. Anderson , Bret L. Toll , Robert Valentine , Simon Rubanovich , Amit Gradsieien
发明人： Cristina S. Anderson , Bret L. Toll , Robert Valentine , Simon Rubanovich , Amit Gradsieien
IPC分类号： G06F7/483
CPC分类号： G06F9/3001 , G06F7/483 , G06F7/49947 , G06F9/30014 , G06F9/30025 , G06F9/30036 , G06F9/30109 , G06F9/3013
摘要： A method of an aspect includes receiving a floating point round-off amount determination instruction. The instruction indicates a source of one or more floating point data elements, indicates a number of fraction bits after a radix point, and indicates a destination storage location. A result including one or more result floating point data elements is stored in the destination storage location in response to the floating point round-off amount determination instruction. Each of the one or more result floating point data elements includes a difference between a corresponding floating point data element of the source in a corresponding position, and a rounded version of the corresponding floating point data element of the source that has been rounded to the indicated number of the fraction bits. Other methods, apparatus, systems, and instructions are disclosed.
摘要翻译：一种方面的方法包括接收浮点舍入量确定指令。该指令指示一个或多个浮点数据元素的源，指示小数点之后的小数位数，并指示目的地存储位置。包括一个或多个结果浮点数据元素的结果响应于浮点舍入量确定指令被存储在目的地存储位置中。一个或多个结果浮点数据元素中的每一个包括相应位置的源的相应浮点数据元素与已被舍入到指示的源的相应浮点数据元素的舍入版本之间的差小数位数。公开了其它方法，装置，系统和指令。

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