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31. 发明授权

US5569961A Semiconductor device having a multi-layer metallization structure 失效
标题翻译：具有多层金属化结构的半导体器件
公开(公告)号：US5569961A
公开(公告)日：1996-10-29
申请号：US473050
申请日：1995-06-07
申请人： Sang-in Lee
发明人： Sang-in Lee
IPC分类号： H01L21/285 , H01L21/441 , H01L21/48 , H01L21/768 , H01L23/485 , H01L23/522 , H01L23/532 , H01L29/41 , H01L29/43
CPC分类号： H01L21/76838 , H01L21/76843 , H01L21/76856 , H01L21/76862 , H01L21/76876 , H01L21/76877 , H01L23/485 , H01L23/53223 , H01L2924/0002 , Y10S257/915
摘要： The invention relates to a wiring structure for a semiconductor device and a method for manufacturing the same, which fills up a contact hole of below one half micron. An insulating layer is formed on a semiconductor substrate, and a contact hole is formed in the insulating layer. On the insulating layer, a first metal is deposited via a CVD method to form a CVD metal layer or a CVD metal plug filling up the contact hole. Then, the thus-obtained CVD metal layer or the CVD metal plus is heat-treated in a vacuum at a high temperature below the melting point of the first metal, thereby planarizing the surface of the CVD metal layer. A second metal is deposited via a sputtering method on the CVD metal layer or on the CVD metal plug to thereby form a sputtered metal layer. The contact hole is filled up with the first metal by the CVD method and then a reliable sputtered metal layer is deposited via a sputtering method. The wiring layer can be used for semiconductor devices of the next generation.
摘要翻译：本发明涉及一种用于半导体器件的布线结构及其制造方法，其填充低于一半微米的接触孔。在半导体衬底上形成绝缘层，并在绝缘层中形成接触孔。在绝缘层上，通过CVD法沉积第一金属，以形成填充接触孔的CVD金属层或CVD金属塞。然后，将如此获得的CVD金属层或CVD金属加热件在低于第一金属熔点的高温下在真空中进行热处理，由此使CVD金属层的表面平坦化。通过溅射法在CVD金属层或CVD金属插塞上沉积第二种金属，从而形成溅射金属层。通过CVD法将接触孔填充第一金属，然后通过溅射法沉积可靠的溅射金属层。布线层可用于下一代的半导体器件。

32. 发明授权

US5534463A Method for forming a wiring layer 失效
标题翻译：形成布线层的方法
公开(公告)号：US5534463A
公开(公告)日：1996-07-09
申请号：US8775
申请日：1993-01-25
申请人： Sang-in Lee , Chang-soo Park
发明人： Sang-in Lee , Chang-soo Park
IPC分类号： H01L21/28 , H01L21/283 , H01L21/3105 , H01L21/3205 , H01L21/768 , H01L23/485 , H01L23/52 , H01L23/522 , H01L23/532 , H01L21/44
CPC分类号： H01L21/76865 , H01L21/3105 , H01L21/76843 , H01L21/76844 , H01L21/76858 , H01L21/76882 , H01L23/485 , H01L23/5226 , H01L23/53223 , H01L2924/0002
摘要： A wiring layer of a semiconductor device having a novel contact structure is disclosed. The semiconductor device includes a semiconductor substrate, an insulating layer having an opening (contact hole or via), a reactive spacer formed on the sidewall of the opening or a reactive layer formed on the sidewall and on the bottom surface of the opening and a first conductive layer formed on the insulating layer which completely fills the opening. Since the reactive spacer or layer is formed on the sidewall of the opening, when the first conductive layer material is deposited, large islands will form to become large grains of the sputtered Al film. Also, providing the reactive spacer or layer improves the reflow of the first conductive layer during a heat-treating step for filling the opening at a high temperature below a melting temperature. Thus, complete filling of the opening with sputtered Al can be ensured. All the contact holes, being less than 1 .mu.m in size and having an aspect ratio greater than 1.0, can be completely filled with Al, to thereby enhance the reliability of the wiring of a semiconductor device.
摘要翻译：公开了具有新型接触结构的半导体器件的布线层。半导体器件包括半导体衬底，具有开口（接触孔或通孔）的绝缘层，形成在开口的侧壁上的反应性间隔物或形成在开口的侧壁和底表面上的反应层，第一形成在绝缘层上的完全填充开口的导电层。由于反应性间隔物或层形成在开口的侧壁上，所以当沉积第一导电层材料时，将形成大的岛形成溅射的Al膜的大颗粒。此外，提供反应间隔物或层在用于在低于熔融温度的高温下填充开口的热处理步骤期间改善了第一导电层的回流。因此，可以确保用溅射的Al完全填充开口。尺寸小于1μm并且具有大于1.0的纵横比的所有接触孔可以完全填充Al，从而提高半导体器件的布线的可靠性。

33. 发明授权

US07304253B2 Switching device of an image recording and replaying apparatus 失效
标题翻译：图像记录和重放装置的切换装置
公开(公告)号：US07304253B2
公开(公告)日：2007-12-04
申请号：US10983590
申请日：2004-11-09
申请人： Sang-in Lee
发明人： Sang-in Lee
IPC分类号： H01H3/00
CPC分类号： H01H25/041
摘要： A switching device of an image recording and replaying apparatus, having: a frame with a button sheet having a guide boss opening positioned in a center of the button sheet and operation boss openings positioned around the guide boss opening, pairs of the operation boss openings being oppositely disposed with respect to the guide boss opening; a switchboard placed on a first side of the frame and having tact switches facing respective operation boss openings; an integrated button disposed to be elastically biased toward a second side of the frame opposite the first side, and having a guide boss inserted into the guide boss opening and operation bosses inserted into respective operation boss openings; and a fixation holder disposed on the guide boss to fix the integrated button to the frame, such that the operation bosses continuously contact with corresponding tact switches.
摘要翻译：一种图像记录和重放装置的切换装置，具有：具有按钮片的框架，其具有位于按钮片的中心的引导凸起开口和位于引导凸起开口周围的操作凸起开口，成对的操作凸起开口为相对于导向凸起开口相对设置; 布置在所述框架的第一侧上并且具有面向相应的操作凸起开口的触觉开关的开关板; 集成按钮，被设置为朝向与第一侧相对的框架的第二侧弹性偏置，并且具有插入到引导凸台开口中的引导凸起和插入到相应的操作凸起开口中的操作凸起; 以及设置在所述引导凸台上以将所述集成按钮固定到所述框架的固定架，使得所述操作凸台与相应的轻触开关持续接触。

34. 发明授权

US06376355B1 Method for forming metal interconnection in semiconductor device 有权
标题翻译：在半导体器件中形成金属互连的方法
公开(公告)号：US06376355B1
公开(公告)日：2002-04-23
申请号：US09136798
申请日：1998-08-19
申请人： Mee-young Yoon , Sang-in Lee
发明人： Mee-young Yoon , Sang-in Lee
IPC分类号： H01L214763
CPC分类号： H01L21/76856 , H01L21/76829 , H01L21/76843 , H01L21/76876 , H01L21/76879
摘要： A method for forming a metal interconnection filing a contact hole or a groove having a high aspect ratio. An interdielectric layer pattern having a recessed region corresponding to the contact hole or the groove is formed on a semiconductor substrate, and a barrier metal layer is formed on the entire surface of the resultant structure where the interdielectric layer pattern is formed. An anti-nucleation layer is selectively formed only on the non-recessed region of the barrier metal layer, thereby exposing the barrier metal layer formed on the sidewalls and the bottom of the recessed region. Subsequently, a metal plug is selectively formed in the recessed region, surrounded by the barrier metal layer, thereby forming a metal interconnection for completely filling the contact hole or the groove having a high aspect ratio. A metal liner may be formed instead of the metal plug, followed by forming a metal layer filling the region surrounded by the metal liner, thereby forming metal interconnection for completely filling the contact hole or groove having a high aspect ratio.
摘要翻译：一种形成具有高纵横比的接触孔或凹槽的金属互连的方法。在半导体衬底上形成具有与接触孔或凹槽相对应的凹入区域的电介质层图案，并且在形成介电层图案的所得结构的整个表面上形成阻挡金属层。仅在阻挡金属层的非凹部区域选择性地形成防结晶层，从而露出形成在凹陷区域的侧壁和底部的阻挡金属层。随后，在由阻挡金属层包围的凹陷区域中选择性地形成金属插塞，从而形成用于完全填充接触孔或具有高纵横比的沟槽的金属互连。可以形成金属衬垫代替金属插塞，随后形成填充由金属衬垫包围的区域的金属层，从而形成用于完全填充具有高纵横比的接触孔或槽的金属互连。

35. 发明授权

US06211082B1 Chemical vapor deposition of tungsten using nitrogen-containing gas 失效
标题翻译：使用含氮气体化学气相沉积钨
公开(公告)号：US06211082B1
公开(公告)日：2001-04-03
申请号：US09021462
申请日：1998-02-10
申请人： Bong-young Yoo , Byung-Lyul Park , Dae-hong Ko , Sang-in Lee
发明人： Bong-young Yoo , Byung-Lyul Park , Dae-hong Ko , Sang-in Lee
IPC分类号： H01L2144
CPC分类号： C23C16/08 , H01L21/28568
摘要： A tungsten or other metal layer is chemical vapor deposited using a source gas containing tungsten, a reducing gas and a nitrogen-containing gas. The nitrogen-containing gas can act as a surface roughness reducing gas that reduces the roughness of the tungsten layer compared to a tungsten layer that is chemical vapor deposited using the source gas containing tungsten and the reducing gas, but without using the surface roughness reducing gas. Viewed in another way, the nitrogen-containing gas acts as a growth rate controlling gas that produces uniform growth of the tungsten layer in a plurality of directions compared to a tungsten layer that is deposited using the source gas containing tungsten and the reducing gas, but without using the growth rate controlling gas.
摘要翻译：使用含有钨，还原气体和含氮气体的源气体化学气相沉积钨或其它金属层。与使用含有钨和还原气体的源气体进行化学气相沉积的钨层相比，含氮气体可以用作表面粗糙度降低气体，其降低钨层的粗糙度，但不使用表面粗糙度还原气体。以另一种方式看，与使用含钨和还原气体的源气体沉积的钨层相比，含氮气体充当生长速率控制气体，其产生钨层在多个方向上的均匀生长，但是而不用生长速率控制气体。

36. 发明授权

US06174809B1 Method for forming metal layer using atomic layer deposition 有权
标题翻译：使用原子层沉积法形成金属层的方法
公开(公告)号：US06174809B1
公开(公告)日：2001-01-16
申请号：US09212090
申请日：1998-12-15
申请人： Sang-bom Kang , Yun-sook Chae , Chang-soo Park , Sang-in Lee
发明人： Sang-bom Kang , Yun-sook Chae , Chang-soo Park , Sang-in Lee
IPC分类号： H01L2144
CPC分类号： H01L21/76846 , C23C16/45561 , H01L21/28518 , H01L21/28562 , H01L21/76843
摘要： A method for forming a metal layer using an atomic layer deposition process. A sacrificial metal atomic layer is formed on a semiconductor substrate by reacting a precursor containing a metal with a reducing gas, and a metal atomic layer is formed of metal atoms separated from a metal halide gas on a semiconductor substrate by reacting the sacrificial metal atomic layer with a metal halide gas. Also, a silicon atomic layer may be additionally formed on the metal atomic layer using a silicon source gas, to thereby alternately stack metal atomic layers and silicon layers. Thus, a metal layer or a metal silicide layer having excellent step coverage can be formed on the semiconductor substrate.
摘要翻译：一种使用原子层沉积工艺形成金属层的方法。通过使包含金属的前体与还原气体反应而在半导体衬底上形成牺牲金属原子层，并且金属原子层由半导体衬底上的金属卤化物气体分离的金属原子形成，通过使牺牲金属原子层与金属卤化物气体。此外，可以使用硅源气体在金属原子层上另外形成硅原子层，从而交替堆叠金属原子层和硅层。因此，可以在半导体衬底上形成具有优异的阶梯覆盖的金属层或金属硅化物层。

37. 发明授权

US6001683A Formation method of interconnection in semiconductor device 失效
标题翻译：半导体器件互连的形成方法
公开(公告)号：US6001683A
公开(公告)日：1999-12-14
申请号：US655122
申请日：1996-05-28
申请人： Sang-in Lee
发明人： Sang-in Lee
IPC分类号： H01L21/768 , H01L21/28 , H01L21/8239 , H01L21/8242 , H01L27/108
CPC分类号： H01L27/10873 , H01L27/1052
摘要： A method of forming an interconnection by using a landing pad is disclosed. In a semiconductor device having a memory cell portion and a peripheral circuit portion, a refractory metal is used for the bitline instead of the usual polycide, to concurrently form a contact on each active region of an N-type and a P-type, then a landing pad is formed on the peripheral circuit portion when a bitline is formed on the memory cell portion. In such a process, a substantial contact hole for the interconnection is formed on the landing pad so that an aspect ratio of the contact can be lowered. Accordingly, when forming a metal interconnection, the contact hole for the interconnection is easily filled by Al reflow so that the coverage-step of the metal being depositing in the contact hole for the interconnection is enhanced, the contact resistance is reduced. Further, the reliability of the semiconductor device is improved.
摘要翻译：公开了一种通过使用着陆垫形成互连的方法。在具有存储单元部分和外围电路部分的半导体器件中，难题金属用于位线而不是通常的多晶硅化物，以在N型和P型的每个有源区上同时形成接触，然后当在存储单元部分上形成位线时，在外围电路部分上形成一个着陆焊盘。在这种过程中，用于互连的实质接触孔形成在着陆焊盘上，使得可以降低接触的纵横比。因此，当形成金属互连时，通过Al回流容易地填充用于互连的接触孔，使得在用于互连的接触孔中沉积的金属的覆盖阶梯增强，接触电阻降低。此外，提高了半导体器件的可靠性。

38. 发明授权

US5869902A Semiconductor device and manufacturing method thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US5869902A
公开(公告)日：1999-02-09
申请号：US612792
申请日：1996-03-11
申请人： Sang-in Lee , Chang-soo Park
发明人： Sang-in Lee , Chang-soo Park
IPC分类号： H01L21/28 , H01L21/283 , H01L21/3105 , H01L21/3205 , H01L21/768 , H01L23/485 , H01L23/52 , H01L23/522 , H01L23/532 , H01L23/48 , H01L29/40
CPC分类号： H01L21/76865 , H01L21/3105 , H01L21/76843 , H01L21/76844 , H01L21/76858 , H01L21/76882 , H01L23/485 , H01L23/5226 , H01L23/53223 , H01L2924/0002
摘要： A wiring layer of a semiconductor device having a novel contact structure is disclosed. The semiconductor device includes a semiconductor substrate, an insulating layer having an opening (contact hole or via), a reactive spacer formed on the sidewall of the opening or a reactive layer formed on the sidewall and on the bottom surface of the opening and a first conductive layer formed on the insulating layer which completely fills the opening. Since the reactive spacer or layer is formed on the sidewall of the opening, when the first conductive layer material is deposited, large islands will form to become large grains of the sputtered Al film. Also, providing the reactive spacer or layer improves the reflow of the first conductive layer during a heat-treating step for filling the opening at a high temperature below a melting temperature. Thus, complete filling of the opening with sputtered Al can be ensured. All the contact holes, being less than 1 .mu.m in size and having an aspect ratio greater than 1.0, can be completely filled with Al, to thereby enhance the reliability of the wiring of a semiconductor device.
摘要翻译：公开了具有新型接触结构的半导体器件的布线层。半导体器件包括半导体衬底，具有开口（接触孔或通孔）的绝缘层，形成在开口的侧壁上的反应性间隔物或形成在开口的侧壁和底表面上的反应层，第一形成在绝缘层上的完全填充开口的导电层。由于反应性间隔物或层形成在开口的侧壁上，所以当沉积第一导电层材料时，将形成大的岛形成溅射的Al膜的大颗粒。此外，提供反应间隔物或层在用于在低于熔融温度的高温下填充开口的热处理步骤期间改善了第一导电层的回流。因此，可以确保用溅射的Al完全填充开口。尺寸小于1μm并且具有大于1.0的纵横比的所有接触孔可以完全填充Al，从而提高半导体器件的布线的可靠性。

39. 发明授权

US5843842A Method for manufacturing a semiconductor device having a wiring layer without producing silicon precipitates 失效
标题翻译：制造具有布线层而不产生硅沉淀物的半导体器件的方法
公开(公告)号：US5843842A
公开(公告)日：1998-12-01
申请号：US697880
申请日：1996-09-03
申请人： Sang-in Lee , Jeong-in Hong , Jong-ho Park
发明人： Sang-in Lee , Jeong-in Hong , Jong-ho Park
IPC分类号： H01L23/52 , H01L21/027 , H01L21/285 , H01L21/3205 , H01L21/768 , H01L23/485 , H01L23/522 , H01L23/532 , H01L21/441
CPC分类号： H01L21/76843 , H01L21/0276 , H01L21/28512 , H01L21/76855 , H01L21/76858 , H01L21/76864 , H01L21/76877 , H01L21/76879 , H01L23/485 , H01L23/53223 , H01L23/53271 , H01L2924/0002
摘要： A wiring layer of a semiconductor device having a novel contact structure is disclosed. The semiconductor device includes a semiconductor substrate, an insulating layer having an opening (contact hole) and a first conductive layer formed on the insulating layer which completely fills the opening. The first conductive layer does not produce any Si precipitates in a subsequent heat-treating step for filling the opening with the first conductive layer material. The semiconductor device may further include a second conductive layer having a planarized surface on the first conductive layer. This improves subsequent photolithography. An anti-reflective layer may be formed on the second conductive layer for preventing an unwanted reflection during a photo lithography process. The semiconductor device preferably includes a diffusion barrier layer under the first conductive layer and on the semiconductor substrate, on the insulating layer, and on the inner surface of the opening which prevents a reaction between the first conductive layer and the semiconductor substrate or the insulating layer. A method for forming the wiring layer is also disclosed. Providing a semiconductor device with the wiring layer reduces the leakage current by preventing Al spiking. Since the first conductive layer undergoes a heat-treatment step at a temperature below the melting point, while flowing into the opening and completely filling it with the first conductive layer material, no void is formed in the opening. Good semiconductor device reliability is ensured in spite of the contact hole being less than 1 .mu.m in size and having an aspect ratio greater than 1.0.
摘要翻译：公开了具有新型接触结构的半导体器件的布线层。半导体器件包括半导体衬底，具有开口（接触孔）的绝缘层和形成在绝缘层上的完全填充开口的第一导电层。在随后的用第一导电层材料填充开口的热处理步骤中，第一导电层不产生任何Si沉淀物。半导体器件还可以包括在第一导电层上具有平坦化表面的第二导电层。这改善了随后的光刻。可以在第二导电层上形成抗反射层，以防止在光刻工艺期间不期望的反射。半导体器件优选地包括在第一导电层下方，半导体衬底上的绝缘层上的扩散阻挡层，以及防止第一导电层与半导体衬底或绝缘层之间的反应的开口内表面。还公开了一种用于形成布线层的方法。提供具有布线层的半导体器件通过防止Al尖峰来减少漏电流。由于第一导电层在低于熔点的温度下经历热处理步骤，同时流入开口并用第一导电层材料完全填充，因此在开口中不形成空隙。尽管接触孔的尺寸小于1μm，并且纵横比大于1.0，确保良好的半导体器件的可靠性。

40. 发明授权

US5567987A Semiconductor device having a multi-layer metallization structure 失效
标题翻译：具有多层金属化结构的半导体器件
公开(公告)号：US5567987A
公开(公告)日：1996-10-22
申请号：US480975
申请日：1995-06-07
申请人： Sang-in Lee
发明人： Sang-in Lee
IPC分类号： H01L21/285 , H01L21/441 , H01L21/48 , H01L21/768 , H01L23/485 , H01L23/522 , H01L23/532 , H01L29/43
CPC分类号： H01L21/76838 , H01L21/76843 , H01L21/76856 , H01L21/76862 , H01L21/76876 , H01L21/76877 , H01L23/485 , H01L23/53223 , H01L2924/0002 , Y10S257/915
摘要： The invention relates to a wiring structure for a semiconductor device and a method for manufacturing the same, which fills up a contact hole of below one half micron. An insulating layer is formed on a semiconductor substrate, and a contact hole is formed in the insulating layer. On the insulating layer, a first metal is deposited via a CVD method to form a CVD metal layer or a CVD metal plug filling up the contact hole. Then, the thus-obtained CVD metal layer or the CVD metal plug is heat-treated in a vacuum at a high temperature below the melting point of the first metal, thereby planarizing the surface of the CVD metal layer. A second metal is deposited via a sputtering method on the CVD metal layer or on the CVD metal plug to thereby form a sputtered metal layer. The contact hole is filled up with the first metal by the CVD method and then a reliable sputtered metal layer is deposited via a sputtering method. The wiring layer can be used for semiconductor devices of the next generation.
摘要翻译：本发明涉及一种用于半导体器件的布线结构及其制造方法，其填充低于一半微米的接触孔。在半导体衬底上形成绝缘层，并在绝缘层中形成接触孔。在绝缘层上，通过CVD法沉积第一金属，以形成填充接触孔的CVD金属层或CVD金属塞。然后，将如此获得的CVD金属层或CVD金属插塞在低于第一金属的熔点的高温下在真空中进行热处理，由此平坦化CVD金属层的表面。通过溅射法在CVD金属层或CVD金属插塞上沉积第二种金属，从而形成溅射金属层。通过CVD法将接触孔填充第一金属，然后通过溅射法沉积可靠的溅射金属层。布线层可用于下一代的半导体器件。

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