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31. 发明申请

US20060160361A1 Nickel salicide process and method of fabricating a semiconductor device using the same 审中-公开
标题翻译：镍硅化硅工艺及使用其制造半导体器件的方法
公开(公告)号：US20060160361A1
公开(公告)日：2006-07-20
申请号：US11303746
申请日：2005-12-15
申请人： Sug-Woo Jung , Gil-Heyun Choi , Jong-Ho Yun , Hyun-Su Kim , Eun-Ji Jung
发明人： Sug-Woo Jung , Gil-Heyun Choi , Jong-Ho Yun , Hyun-Su Kim , Eun-Ji Jung
IPC分类号： H01L21/44
CPC分类号： H01L21/28518 , H01L21/28052 , H01L21/324 , H01L29/4933 , H01L29/6659 , H01L29/7833
摘要： A method of forming a silicide layer includes forming a metal layer on a substrate having a silicon region, the metal layer including nickel, annealing the substrate and the metal layer to form the silicide layer on the silicon region, the silicide layer including nickel, and cooling the substrate and the silicide layer at a temperature of about 100° C. to about 300° C. for at least one minute, the cooling occurring after the annealing.
摘要翻译：形成硅化物层的方法包括在具有硅区域的基底上形成金属层，该金属层包括镍，退火基板和金属层，以在硅区域上形成硅化物层，所述硅化物层包括镍，以及在约100℃至约300℃的温度下将衬底和硅化物层冷却至少一分钟，冷却在退火之后发生。

32. 发明申请

US20060091436A1 Methods of forming field effect transistors having metal silicide gate electrodes 有权
标题翻译：形成具有金属硅化物栅电极的场效应晶体管的方法
公开(公告)号：US20060091436A1
公开(公告)日：2006-05-04
申请号：US11230586
申请日：2005-09-20
申请人： Hyun-Su Kim , Jong-Ho Yun , Byung-Hak Lee , Eun-Ji Jung , Gil-Heyun Choi
发明人： Hyun-Su Kim , Jong-Ho Yun , Byung-Hak Lee , Eun-Ji Jung , Gil-Heyun Choi
IPC分类号： H01L29/94
CPC分类号： H01L21/28097 , H01L21/823835 , H01L29/4975 , H01L29/665 , H01L29/66545
摘要： Methods of forming field effect transistors according to embodiments of the invention include forming a conductive gate electrode (e.g., polysilicon gate electrode) on a semiconductor substrate and forming a first metal layer on the conductive gate electrode. This first metal layer may include a material selected from a group consisting of nickel, cobalt, titanium, tantalum and tungsten. The first metal layer and the conductive gate electrode are thermally treated for a sufficient duration to convert a first portion of the conductive gate electrode into a first metal silicide region. The first metal layer and the first metal silicide region are then removed to expose a second portion of the conductive gate electrode. A second metal layer is then formed on the second portion of the conductive gate electrode. This second metal layer may include a material selected from a group consisting of nickel, cobalt, titanium, tantalum and tungsten. The second metal layer and the second portion of the conductive gate electrode are thermally treated for a sufficient duration to thereby convert the second portion of the conductive gate electrode into a second metal silicide region.
摘要翻译：根据本发明的实施例的形成场效应晶体管的方法包括在半导体衬底上形成导电栅电极（例如，多晶硅栅电极），并在导电栅电极上形成第一金属层。该第一金属层可以包括选自镍，钴，钛，钽和钨的材料。对第一金属层和导电栅电极进行热处理足够的时间以将导电栅电极的第一部分转换成第一金属硅化物区域。然后去除第一金属层和第一金属硅化物区域以暴露导电栅电极的第二部分。然后在导电栅电极的第二部分上形成第二金属层。该第二金属层可以包括选自镍，钴，钛，钽和钨的材料。第二金属层和导电栅电极的第二部分被热处理足够的持续时间，从而将导电栅电极的第二部分转换成第二金属硅化物区域。

33. 发明申请

US20060063380A1 Salicide process and method of fabricating semiconductor device using the same 有权
标题翻译：硅化物工艺及其制造使用其的半导体器件的方法
公开(公告)号：US20060063380A1
公开(公告)日：2006-03-23
申请号：US11199439
申请日：2005-08-08
申请人： Sug-Woo Jung , Gil-Heyun Choi , Jong-Ho Yun , Kwan-Jong Roh , Eun-Ji Jung , Hyun-Su Kim
发明人： Sug-Woo Jung , Gil-Heyun Choi , Jong-Ho Yun , Kwan-Jong Roh , Eun-Ji Jung , Hyun-Su Kim
IPC分类号： H01L21/44
CPC分类号： H01L21/28518 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： Methods of forming metal silicide layers include a convection-based annealing step to convert a metal layer into a metal silicide layer. These methods may include forming a silicon layer on a substrate and forming a metal layer (e.g., nickel layer) in direct contact with the silicon layer. A step is then performed to convert at least a portion of the metal layer into a metal silicide layer. This conversion step is includes exposing the metal layer to an inert heat transferring gas (e.g., argon, nitrogen) in a convection or conduction apparatus.
摘要翻译：形成金属硅化物层的方法包括将金属层转化为金属硅化物层的基于对流的退火步骤。这些方法可以包括在衬底上形成硅层并形成与硅层直接接触的金属层（例如，镍层）。然后执行步骤以将至少一部分金属层转化为金属硅化物层。该转化步骤包括在对流或传导装置中将金属层暴露于惰性传热气体（例如氩气，氮气）。

34. 发明申请

US20080124921A1 METHOD FORMING OHMIC CONTACT LAYER AND METAL WIRING IN SEMICONDUCTOR DEVICE 有权
标题翻译：在半导体器件中形成OHMIC接触层和金属接线的方法
公开(公告)号：US20080124921A1
公开(公告)日：2008-05-29
申请号：US11772953
申请日：2007-07-03
申请人： Dae-Yong Kim , Jong-Ho Yun , Hyun-Su Kim , Eun-Ji Jung , Eun-Ok Lee
发明人： Dae-Yong Kim , Jong-Ho Yun , Hyun-Su Kim , Eun-Ji Jung , Eun-Ok Lee
IPC分类号： H01L21/768
CPC分类号： H01L21/28518 , H01L21/76843 , H01L21/76855
摘要： A method of forming an ohmic contact layer including forming an insulation layer pattern on a substrate, the insulation pattern layer having an opening selectively exposing a silicon bearing layer, forming a metal layer on the exposed silicon bearing layer using an electrode-less plating process, and forming a metal silicide layer from the silicon bearing layer and the metal layer using a silicidation process. Also, a method of forming metal wiring in a semiconductor device using the foregoing method of forming an ohmic contact layer.
摘要翻译：一种形成欧姆接触层的方法，包括在基板上形成绝缘层图案，所述绝缘图案层具有选择性地暴露含硅层的开口，使用无电极电镀工艺在暴露的硅轴承层上形成金属层，以及使用硅化法从所述硅轴承层和所述金属层形成金属硅化物层。另外，使用上述形成欧姆接触层的方法在半导体器件中形成金属布线的方法。

35. 发明授权

US07867898B2 Method forming ohmic contact layer and metal wiring in semiconductor device 有权
标题翻译：在半导体器件中形成欧姆接触层和金属布线的方法
公开(公告)号：US07867898B2
公开(公告)日：2011-01-11
申请号：US11772953
申请日：2007-07-03
申请人： Dae-Yong Kim , Jong-Ho Yun , Hyun-Su Kim , Eun-Ji Jung , Eun-Ok Lee
发明人： Dae-Yong Kim , Jong-Ho Yun , Hyun-Su Kim , Eun-Ji Jung , Eun-Ok Lee
IPC分类号： H01L21/44
CPC分类号： H01L21/28518 , H01L21/76843 , H01L21/76855
摘要： A method of forming an ohmic contact layer including forming an insulation layer pattern on a substrate, the insulation pattern layer having an opening selectively exposing a silicon bearing layer, forming a metal layer on the exposed silicon bearing layer using an electrode-less plating process, and forming a metal silicide layer from the silicon bearing layer and the metal layer using a silicidation process. Also, a method of forming metal wiring in a semiconductor device using the foregoing method of forming an ohmic contact layer.
摘要翻译：一种形成欧姆接触层的方法，包括在基板上形成绝缘层图案，所述绝缘图案层具有选择性地暴露含硅层的开口，使用无电极电镀工艺在暴露的硅轴承层上形成金属层，以及使用硅化法从所述硅轴承层和所述金属层形成金属硅化物层。另外，使用上述形成欧姆接触层的方法在半导体器件中形成金属布线的方法。

36. 发明申请

US20080318421A1 METHODS OF FORMING FILMS OF A SEMICONDUCTOR DEVICE 审中-公开
标题翻译：形成半导体器件膜的方法
公开(公告)号：US20080318421A1
公开(公告)日：2008-12-25
申请号：US12137059
申请日：2008-06-11
申请人： Jong-Ho Yun , Gil-Heyun Choi , Jong-Myeong Lee
发明人： Jong-Ho Yun , Gil-Heyun Choi , Jong-Myeong Lee
IPC分类号： H01L21/3205 , H01L21/3065
CPC分类号： H01L21/288 , C23C18/1658 , C23C18/1689 , C23C18/1879 , C23C18/30 , C23C18/31 , H01L21/76849
摘要： There is provided a method of forming a film of a semiconductor device. The method includes a step of adsorbing a liquefied metal ion source on the substrate; rinsing the substrate to remove any liquefied metal ion source that is not adsorbed to the substrate; depositing a metal layer on the substrate by reducing the liquefied metal ion source that is adsorbed on the substrate with a liquefied reducing agent; and rinsing the substrate to remove the remaining liquefied reducing agent and any reaction residual.
摘要翻译：提供了形成半导体器件的膜的方法。该方法包括将液化金属离子源吸附在基板上的步骤; 漂洗衬底以除去未吸附到衬底的任何液化的金属离子源; 通过用液化还原剂还原吸附在基板上的液化金属离子源，在基板上沉积金属层; 并冲洗底物以除去剩余的液化还原剂和任何反应残余物。

37. 发明申请

US20090298282A1 Methods of Forming Interlayer Dielectrics Having Air Gaps 有权
标题翻译：形成具有空气间隙的层间电介质的方法
公开(公告)号：US20090298282A1
公开(公告)日：2009-12-03
申请号：US12364598
申请日：2009-02-03
申请人： Jong-Ho Yun , Jong-Myeong Lee , Gil-heyun Choi
发明人： Jong-Ho Yun , Jong-Myeong Lee , Gil-heyun Choi
IPC分类号： H01L21/60
CPC分类号： H01L21/7682 , H01L21/76849 , H01L2224/05026 , H01L2224/05639 , H01L2224/05669 , H01L2224/13 , H01L2924/00014 , H01L2224/05099
摘要： Methods of forming an interlayer dielectric having an air gap are provided including forming a first insulating layer on a semiconductor substrate. The first insulating layer defines a trench. A metal wire is formed in the trench such that the metal wire is recessed beneath an upper surface of the first insulating layer. A metal layer is formed on the metal wire, wherein the metal layer includes a capping layer portion filling the recess, a upper portion formed on the capping layer portion, and an overhang portion formed on the portion of the first insulating layer adjacent to the trench protruding sideward from the upper portion. The first insulating layer is removed and a second insulating layer is formed on the semiconductor substrate to cover the metal layer, whereby an air gap is formed below the overhang portion of the metal layer. A portion of the second insulating layer is removed to expose the upper portion of the metal layer. The upper portion and the overhang portion of the metal layer are removed. A third insulating layer is formed on the semiconductor substrate from which the upper portion and the overhang portion have been removed to maintain the air gap.
摘要翻译：提供了形成具有气隙的层间电介质的方法，包括在半导体衬底上形成第一绝缘层。第一绝缘层限定沟槽。在沟槽中形成金属线，使得金属线在第一绝缘层的上表面下方凹入。在金属线上形成金属层，其中金属层包括填充凹部的覆盖层部分，形成在覆盖层部分上的上部，和形成在与沟槽相邻的第一绝缘层的部分上的突出部分从上部侧向突出。去除第一绝缘层，并且在半导体衬底上形成覆盖金属层的第二绝缘层，由此在金属层的伸出部分的下方形成气隙。去除第二绝缘层的一部分以露出金属层的上部。去除金属层的上部和外伸部分。在半导体基板上形成第三绝缘层，从该基板上去除上部和外伸部分以保持气隙。

38. 发明授权

US07560331B2 Method for forming a silicided gate 有权
标题翻译：硅化物栅的形成方法
公开(公告)号：US07560331B2
公开(公告)日：2009-07-14
申请号：US11354748
申请日：2006-02-14
申请人： Hyun-Su Kim , Jong-Ho Yun , Sang-Woo Lee , Seok-Woo Jung , Eun-Ji Jung
发明人： Hyun-Su Kim , Jong-Ho Yun , Sang-Woo Lee , Seok-Woo Jung , Eun-Ji Jung
IPC分类号： H01L21/8238
CPC分类号： H01L21/28097 , H01L29/66507 , H01L29/66545
摘要： A gate is silicided through its sides while limiting silicidation through the top of the gate. A blocking layer may be formed over the gate layer, and the sidewalls of the gate layer are exposed. A layer of metal is formed on the sidewalls of the gate and thermally treated to silicide the gate layer. The sidewalls of the gate maybe exposed through an etching process in which a silicide layer formed over the blocking layer is used as an etch mask.
摘要翻译：栅极通过其侧面硅化，同时限制通过栅极顶部的硅化物。可以在栅极层上形成阻挡层，并且露出栅极层的侧壁。在栅极的侧壁上形成金属层，并对其进行热处理以对栅极层进行硅化处理。栅极的侧壁可以通过其中在阻挡层上形成的硅化物层用作蚀刻掩模的蚀刻工艺暴露。

39. 发明申请

US20070026578A1 Method for forming a silicided gate 有权
标题翻译：硅化物栅的形成方法
公开(公告)号：US20070026578A1
公开(公告)日：2007-02-01
申请号：US11354748
申请日：2006-02-14
申请人： Hyun-Su Kim , Jong-Ho Yun , Sang-Woo Lee , Seok-Woo Jung , Eun-Ji Jung
发明人： Hyun-Su Kim , Jong-Ho Yun , Sang-Woo Lee , Seok-Woo Jung , Eun-Ji Jung
IPC分类号： H01L21/8232 , H01L21/335
CPC分类号： H01L21/28097 , H01L29/66507 , H01L29/66545
摘要： A gate is silicided through its sides while limiting silicidation through the top of the gate. A blocking layer may be formed over the gate layer, and the sidewalls of the gate layer are exposed. A layer of metal is formed on the sidewalls of the gate and thermally treated to silicide the gate layer. The sidewalls of the gate maybe exposed through an etching process in which a silicide layer formed over the blocking layer is used as an etch mask.
摘要翻译：栅极通过其侧面硅化，同时限制通过栅极顶部的硅化物。可以在栅极层上形成阻挡层，并且露出栅极层的侧壁。在栅极的侧壁上形成金属层，并对其进行热处理以对栅极层进行硅化处理。栅极的侧壁可以通过其中在阻挡层上形成的硅化物层用作蚀刻掩模的蚀刻工艺暴露。

40. 发明授权

US6133147A Process for selective metal deposition in holes of semiconductor device 失效
标题翻译：在半导体器件的孔中选择性金属沉积的工艺
公开(公告)号：US6133147A
公开(公告)日：2000-10-17
申请号：US139701
申请日：1998-08-25
申请人： Shi-Woo Rhee , Jong-Ho Yun
发明人： Shi-Woo Rhee , Jong-Ho Yun
IPC分类号： H01L21/285 , H01L21/768 , H01L21/44 , B05D5/12
CPC分类号： H01L21/76879
摘要： A process for preparing a metallic interconnecting plug in a semiconductor device which comprises the steps of: i) forming an insulating layer on the surface of a semiconductor substrate or a metal underlayer of the semiconductor device, ii) forming a hole in the insulating layer to expose the surface of the semiconductor substrate or the metal underlayer, iii) exposing the surface of the insulating layer to the vapor of a blocking agent under a pressure ranging from 10.sup.-12 to 10 torr for a controlled time period so that a blocking layer is formed only on the outer surface of the insulating layer, the blocking layer not extending over the inside walls of the hole, iv) selectively depositing a conductive metal in the hole using a chemical vapor deposition method to form the metallic interconnecting plug which extends from the surface of the semiconductor substrate or the metal underlayer to the level of the outer surface of the insulating layer, and v) removing the blocking layer from the surface of the insulating layer.
摘要翻译：一种在半导体器件中制备金属互连插头的方法，包括以下步骤：i）在半导体器件的半导体衬底或金属底层的表面上形成绝缘层，ii）在绝缘层中形成孔，暴露半导体衬底或金属底层的表面，iii）在10-12至10托的压力下将绝缘层的表面暴露于封闭剂的蒸气一段受控的时间段内，使得阻挡层为仅形成在绝缘层的外表面上，阻挡层不延伸到孔的内壁上，iv）使用化学气相沉积法选择性地在孔中沉积导电金属，以形成金属互连插塞，其从半导体衬底或金属底层的表面到绝缘层的外表面的水平面，以及v）从第二绝缘层去除阻挡层 e表面的绝缘层。

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