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31. 发明申请

US20060001115A1 Gate structure of semiconductor memory device 有权
标题翻译：半导体存储器件的门结构
公开(公告)号：US20060001115A1
公开(公告)日：2006-01-05
申请号：US11027663
申请日：2004-12-30
申请人： Hong-Seon Yang , Se-Aug Jang , Yong-Soo Kim , Kwan-Yong Lim , Heung-Jae Cho , Jae-Geun Oh
发明人： Hong-Seon Yang , Se-Aug Jang , Yong-Soo Kim , Kwan-Yong Lim , Heung-Jae Cho , Jae-Geun Oh
IPC分类号： H01L29/76 , H01L29/82
CPC分类号： H01L27/10873 , H01L27/10888
摘要： A gate structure of a semiconductor memory device capable of preventing a poly void generation by forming a hard mask and maintaining a hysteresis area within a certain value. The gate structure of the semiconductor memory device includes: a gate insulation layer formed on a semiconductor substrate; a gate electrode formed on the gate insulation layer, wherein the gate electrode is formed by stacking a polysilicon layer and a metal layer; and a hard mask formed on the gate electrode, wherein a hysteresis area between the hard mask and the gate electrode materials is a equal to or less than approximately 2×1012° C.-dyne/cm2.
摘要翻译：一种半导体存储器件的栅极结构，其能够通过形成硬掩模并将滞后区域保持在一定值内来防止多孔隙生成。半导体存储器件的栅极结构包括：形成在半导体衬底上的栅绝缘层; 形成在所述栅绝缘层上的栅电极，其中所述栅电极通过堆叠多晶硅层和金属层而形成; 以及形成在所述栅极电极上的硬掩模，其中所述硬掩模和所述栅极电极材料之间的滞后区域等于或小于约2×10 12·达因/ cm 2， 2 。

32. 发明授权

US06699398B1 Effective dry etching process of actinide oxides and their mixed oxides in CF4/O2/N2 plasma 有权
标题翻译：在CF4 / O2 / N2等离子体中锕系氧化物及其混合氧化物的有效干蚀刻工艺
公开(公告)号：US06699398B1
公开(公告)日：2004-03-02
申请号：US10018121
申请日：2002-04-01
申请人： Yong-Soo Kim
发明人： Yong-Soo Kim
IPC分类号： C04B4191
CPC分类号： G21F9/004
摘要： A process for gas-phase etching of actinide oxides from a substrate by using plasma power comprising the steps of: a) preheating actinide oxides on the substrate within a process chamber filled with fluorine-containing gas and exposing it to plasma power, and subsequently b) etching actinide oxides from the substrate using a plasma gas-phase reactant system.
摘要翻译：一种通过使用等离子体动力从基板气相蚀刻锕系氧化物的方法，包括以下步骤：a）在填充有含氟气体的处理室内将衬底上的锕系氧化物预热，并将其暴露于等离子体电源，随后b ）使用等离子体气相反应物体系从底物蚀刻锕系氧化物。

33. 发明授权

US08458891B2 Method of centering a disk of hard disk drive 有权
标题翻译：居中盘的硬盘驱动器的方法
公开(公告)号：US08458891B2
公开(公告)日：2013-06-11
申请号：US13006557
申请日：2011-01-14
申请人： Kyung Ho Kim , Ha Yong Kim , Kyu Nam Cho , Yong-Soo Kim
发明人： Kyung Ho Kim , Ha Yong Kim , Kyu Nam Cho , Yong-Soo Kim
IPC分类号： G11B5/127 , H04R31/00
CPC分类号： G11B17/038 , Y10T29/49025 , Y10T29/49027 , Y10T29/49032 , Y10T29/53174
摘要： A method of centering a disk of a hard disk drive includes arranging a disk on an upper end portion of a hub on which a plurality of disks are rotatably assembled, and assembling the disk on the hub by vibrating the hub. Accordingly, the disks and/or spacers may be easily assembled on the hub, a time of centering may be relatively much reduced, and a superior centering quality may be obtained.
摘要翻译：将硬盘驱动器的盘对中的方法包括将盘安装在其上多个盘可旋转地组装的轮毂的上端部分上，并通过振动轮毂将盘组装在轮毂上。因此，盘和/或间隔件可以容易地组装在轮毂上，可以相对大大地减少定心时间，并且可以获得优异的定心质量。

34. 发明授权

US08241974B2 Nonvolatile memory device with multiple blocking layers and method of fabricating the same 有权
标题翻译：具有多个阻挡层的非易失性存储器件及其制造方法
公开(公告)号：US08241974B2
公开(公告)日：2012-08-14
申请号：US13166273
申请日：2011-06-22
申请人： Heung-Jae Cho , Moon-Sig Joo , Yong-Soo Kim , Won-Joon Choi
发明人： Heung-Jae Cho , Moon-Sig Joo , Yong-Soo Kim , Won-Joon Choi
IPC分类号： H01L21/8238
CPC分类号： H01L21/28282 , H01L21/28273
摘要： A nonvolatile memory device with a blocking layer controlling the transfer of electric charges in a charge storage layer includes the blocking layer having a first blocking layer in contact with the charge storage layer and a second blocking layer over the first blocking layer, wherein the first blocking layer has a greater energy band gap than the second blocking layer and the second blocking layer has a greater permittivity than the first blocking layer.
摘要翻译：具有控制电荷存储层中的电荷转移的阻挡层的非易失性存储器件包括具有与电荷存储层接触的第一阻挡层和第一阻挡层上的第二阻挡层的阻挡层，其中第一阻塞层具有比第二阻挡层更大的能带隙，并且第二阻挡层具有比第一阻挡层更大的介电常数。

35. 发明授权

US08048742B2 Transistor including bulb-type recess channel and method for fabricating the same 失效
标题翻译：包括灯泡型凹槽的晶体管及其制造方法
公开(公告)号：US08048742B2
公开(公告)日：2011-11-01
申请号：US11819888
申请日：2007-06-29
申请人： Kwan-Yong Lim , Hong-Seon Yang , Dong-Sun Sheen , Se-Aug Jang , Heung-Jae Cho , Yong-Soo Kim , Min-Gyu Sung , Tae-Yoon Kim
发明人： Kwan-Yong Lim , Hong-Seon Yang , Dong-Sun Sheen , Se-Aug Jang , Heung-Jae Cho , Yong-Soo Kim , Min-Gyu Sung , Tae-Yoon Kim
IPC分类号： H01L21/8234
CPC分类号： H01L29/66621 , H01L29/66553 , H01L29/78
摘要： A method for fabricating a transistor including a bulb-type recess channel includes forming a bulb-type recess pattern in a substrate, forming a gate insulating layer over the substrate and the bulb-type recess pattern, forming a first gate conductive layer over the gate insulating layer, forming a void movement blocking layer over the first gate conductive layer in the bulb-type recess pattern, and forming a second gate conductive layer over the void movement blocking layer and the first gate conductive layer.
摘要翻译：一种制造包括灯泡型凹槽的晶体管的方法，包括在衬底中形成灯泡型凹槽图案，在衬底上形成栅极绝缘层和灯泡型凹槽图案，在栅极上形成第一栅极导电层绝缘层，在所述灯泡型凹槽图案中的所述第一栅极导电层的上方形成空隙移动阻挡层，以及在所述空隙运动阻挡层和所述第一栅极导电层上方形成第二栅极导电层。

36. 发明授权

US07902614B2 Semiconductor device with gate stack structure 有权
标题翻译：具有栅极堆叠结构的半导体器件
公开(公告)号：US07902614B2
公开(公告)日：2011-03-08
申请号：US11862003
申请日：2007-09-26
申请人： Kwan-Yong Lim , Hong-Seon Yang , Heung-Jae Cho , Tae-Kyung Kim , Yong-Soo Kim , Min-Gyu Sung
发明人： Kwan-Yong Lim , Hong-Seon Yang , Heung-Jae Cho , Tae-Kyung Kim , Yong-Soo Kim , Min-Gyu Sung
IPC分类号： H01L29/423
CPC分类号： H01L29/4925 , H01L21/28061 , H01L29/42324 , H01L29/4941 , H01L29/513 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a first conductive layer, a first intermediate structure over the first conductive layer, a second intermediate structure over the first intermediate structure, and a second conductive layer over the second intermediate structure. The first intermediate structure includes a metal silicide layer and a nitrogen containing metal layer. The second intermediate structure includes at least a nitrogen containing metal silicide layer.
摘要翻译：半导体器件包括第一导电层，第一导电层上的第一中间结构，第一中间结构之上的第二中间结构以及第二中间结构上的第二导电层。第一中间结构包括金属硅化物层和含氮金属层。第二中间结构至少包括含氮金属硅化物层。

37. 发明申请

US20100331381A1 Substituted Phenylureas and Phenylamides as Vanilloid Receptor Ligands 有权
标题翻译：取代苯基和苯基酰胺作为香草素受体配体
公开(公告)号：US20100331381A1
公开(公告)日：2010-12-30
申请号：US12775235
申请日：2010-05-06
申请人： Robert Frank , Gregor Bahrenberg , Thomas Christoph , Klaus Schiene , Jean De Vry , Nils Damann , Sven Frormann , Bernhard Lesch , Jeewoo Lee , Yong-Soo Kim , Myeong-Seop Kim
发明人： Robert Frank , Gregor Bahrenberg , Thomas Christoph , Klaus Schiene , Jean De Vry , Nils Damann , Sven Frormann , Bernhard Lesch , Jeewoo Lee , Yong-Soo Kim , Myeong-Seop Kim
IPC分类号： A61K31/4196 , C07D231/10 , C07D231/14 , C07D231/12 , C07D249/12 , C07D249/10 , A61K31/415 , A61K31/4155 , A61P25/00
CPC分类号： C07D231/12 , C07D249/08 , C07D401/04 , C07D405/06 , C07D417/06
摘要： The invention relates to substituted phenylureas and phenylamides, to processes for the preparation thereof, to pharmaceutical compositions containing these compounds and also to the use of these compounds for preparing pharmaceutical compositions.
摘要翻译：本发明涉及取代的苯基脲和苯基酰胺，其制备方法，含有这些化合物的药物组合物以及这些化合物用于制备药物组合物的用途。

38. 发明申请

US20100309256A1 PRINTER INK CARTRIDGE TYPE CONNECTOR 失效
标题翻译：打印机墨盒类型连接器
公开(公告)号：US20100309256A1
公开(公告)日：2010-12-09
申请号：US12675817
申请日：2008-08-29
申请人： Yong-Soo Kim
发明人： Yong-Soo Kim
IPC分类号： B41J2/14
CPC分类号： B41J2/17513 , B41J2/1752 , B41J2/17526
摘要： Provided is an electrical connector for a print ink cartridge. The electrical connector includes a housing including a thin protrusion having a rectangle shape on one side portion thereof, a plurality of pin grooves spaced apart predetermined intervals from each in one side lower portion of the protrusion, a plurality of format ribs spaced apart predetermined intervals from each other in the other side of the protrusion, and coupling bosses having a wedge shape separately protruding on both sides of each of the ribs, a connection terminal serving as a torsion spring, the connecting terminal including a pin connector inserted into each of the pin grooves of the housing and fixed in a straight line orientation, a wound coupling insert fitted onto each of the coupling bosses to give elasticity thereto, a parallel extending from the coupling insert and along each of the ribs, a bend bent at a front end of the parallel, and a socket connector bent in a state where the socket connector is connected to the bend, the socket connector being connected to an external socket, and a cover integrally fixed to the housing by a plurality of coupling hooks disposed on the housing, the cover including pine connector grooves pressing the pin connector of the coupling terminal in a downward direction in a side surface of the cover.
摘要翻译：提供了一种用于打印墨盒的电连接器。所述电连接器包括壳体，所述壳体包括在其一侧部分上具有矩形形状的薄突起，与所述突起的一个侧下部中的每一个分隔开预定间隔的多个销槽，另外在突出部的另一侧相互连接，并且具有分别突出在每个肋的两侧上的楔形的连接凸起，连接端子用作扭转弹簧，该连接端子包括插入每个销中的销连接器壳体的凹槽并且以直线定向固定，缠绕的联接插入件装配到每个耦合凸台上以给予弹性，平行地从联接插入件延伸并且沿着每个肋条弯曲，弯曲在前端平行的插座连接器和插座连接器连接到弯头的状态下弯曲的插座连接器，插座连接器连接到一个外部插座和通过设置在壳体上的多个联接钩一体地固定到壳体的盖，盖包括在盖的侧表面中向下的方向将联接端子的销连接器按压的松连接器凹槽。

39. 发明申请

US20090325369A1 Semiconductor device and method of fabricating the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20090325369A1
公开(公告)日：2009-12-31
申请号：US12318469
申请日：2008-12-30
申请人： Yong-Soo Kim , Moon-Sig Joo , Heung-Jae Cho , Won-Joon Choi
发明人： Yong-Soo Kim , Moon-Sig Joo , Heung-Jae Cho , Won-Joon Choi
IPC分类号： H01L21/3205
CPC分类号： H01L21/28247 , H01L27/10873
摘要： A method of fabricating a semiconductor device includes forming a gate dielectric on a substrate, forming a gate structure on the gate dielectric, the gate structure comprising a stacked layer of a silicon layer and a metal layer, selectively etching the gate structure to form a gate pattern, forming a capping layer surrounding the gate pattern, plasma-treating the capping layer, and performing a gate reoxidation process
摘要翻译：制造半导体器件的方法包括在衬底上形成栅极电介质，在栅极电介质上形成栅极结构，栅极结构包括硅层和金属层的堆叠层，选择性地蚀刻栅极结构以形成栅极形成围绕栅极图案的覆盖层，等离子体处理覆盖层，以及进行栅极再氧化工艺

40. 发明申请

US20080157383A1 SEMICONDUCTOR DEVICE WITH GATE STACK STRUCTURE 有权
标题翻译：具有栅格堆叠结构的半导体器件
公开(公告)号：US20080157383A1
公开(公告)日：2008-07-03
申请号：US11862003
申请日：2007-09-26
申请人： Kwan-Yong LIM , Hong-Seon Yang , Heung-Jae Cho , Tae-Kyung Kim , Yong-Soo Kim , Min-Gyu Sung
发明人： Kwan-Yong LIM , Hong-Seon Yang , Heung-Jae Cho , Tae-Kyung Kim , Yong-Soo Kim , Min-Gyu Sung
IPC分类号： H01L23/48
CPC分类号： H01L29/4925 , H01L21/28061 , H01L29/42324 , H01L29/4941 , H01L29/513 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a first conductive layer, a first intermediate structure over the first conductive layer, a second intermediate structure over the first intermediate structure, and a second conductive layer over the second intermediate structure. The first intermediate structure includes a metal silicide layer and a nitrogen containing metal layer. The second intermediate structure includes at least a nitrogen containing metal silicide layer.
摘要翻译：半导体器件包括第一导电层，第一导电层上的第一中间结构，第一中间结构之上的第二中间结构以及第二中间结构上的第二导电层。第一中间结构包括金属硅化物层和含氮金属层。第二中间结构至少包括含氮金属硅化物层。

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