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31. 发明申请

US20090279636A1 CHIP AND SYSTEM UTILIZING THE SAME 有权
标题翻译：芯片和系统利用它
公开(公告)号：US20090279636A1
公开(公告)日：2009-11-12
申请号：US12117817
申请日：2008-05-09
申请人： Yi-Chiuan Wang , Chin-Ling Hung , Hong-Ching Chen
发明人： Yi-Chiuan Wang , Chin-Ling Hung , Hong-Ching Chen
IPC分类号： H04L27/00
CPC分类号： G01R31/31921
摘要： A system including a pulse generating module and a processing module is disclosed. The pulse generating module generates a target signal. The processing module outputs a processing signal according to the target signal. Throughput of the target signal exceeds throughput of the processing signal.
摘要翻译：公开了一种包括脉冲发生模块和处理模块的系统。脉冲发生模块产生目标信号。处理模块根据目标信号输出处理信号。目标信号的吞吐量超过处理信号的吞吐量。

32. 发明授权

US07339405B2 Clock rate adjustment apparatus and method for adjusting clock rate 有权
标题翻译：用于调整时钟频率的时钟速率调整装置和方法
公开(公告)号：US07339405B2
公开(公告)日：2008-03-04
申请号：US11346970
申请日：2006-02-02
申请人： Bing-Yu Hsieh , Hong-Ching Chen
发明人： Bing-Yu Hsieh , Hong-Ching Chen
IPC分类号： G06F1/08 , H03K17/00
CPC分类号： G06F1/08
摘要： A clock rate adjustment apparatus and a method for adjusting a clock rate of a clock for an optical storage system are provided. The clock rate adjustment apparatus comprises an indication provider, a throughput rate detector, and a clock generator. The method performs the following steps. The indication provider generates an indicatory signal indicating a state of the optical storage system. The throughput rate detector generates a control signal in response to the indicatory signal. The clock generator generates the clock at the clock rate in response to the control signal. The clock rate determined by the clock rate adjustment apparatus may be adjusted dynamically in response to a required minimum clock rate and a variable data rate.
摘要翻译：提供了一种时钟速率调整装置和用于调整用于光学存储系统的时钟的时钟速率的方法。时钟速率调整装置包括指示提供者，吞吐率检测器和时钟发生器。该方法执行以下步骤。指示提供者产生指示光存储系统的状态的指示信号。吞吐率检测器响应于指示信号产生控制信号。时钟发生器响应于控制信号以时钟速率产生时钟。可以响应于所需的最小时钟速率和可变数据速率动态地调整由时钟速率调整装置确定的时钟速率。

33. 发明申请

US20070074073A1 Detection system and method 审中-公开
标题翻译：检测系统及方法
公开(公告)号：US20070074073A1
公开(公告)日：2007-03-29
申请号：US11528831
申请日：2006-09-27
申请人： Ping-Sheng Chen , Hong-Ching Chen
发明人： Ping-Sheng Chen , Hong-Ching Chen
IPC分类号： G06F11/00
CPC分类号： G11B20/18 , G11B20/182 , G11B2020/1222 , G11B2020/1287 , G11B2020/148 , G11B2220/2537
摘要： In a process for recording a data onto an optical storage medium which includes a fault correction mechanism, a detection system is preferably coupled to an optical data recorder comprising a data generating device and a data reading device. The data generating device generates the recorded data. The data reading device reads a reflection signal from the optical storage medium and generates a read-out signal to the determination device. A reflection signal is read from the medium to detect whether the recorded data can be reliably read out under this mechanism. A determination device of the detection system outputs a faulted data information signal in responsive to the reflection signal based on rules of the fault correction mechanism. The determination device further comprises a fault detection module. The fault detection module would receive the read-out signal and output a write fault signal as the faulted data information signal.
摘要翻译：在将数据记录到包括故障校正机构的光存储介质上的过程中，检测系统优选地耦合到包括数据产生装置和数据读取装置的光学数据记录器。数据生成装置生成记录数据。数据读取装置读取来自光存储介质的反射信号，并生成读出信号给判定装置。从介质读取反射信号，以检测在该机制下是否可靠地读出记录数据。检测系统的判定装置根据故障校正机构的规则，根据反射信号输出故障数据信息信号。确定装置还包括故障检测模块。故障检测模块将接收读出的信号并输出写故障信号作为故障的数据信息信号。

34. 发明申请

US20060250905A1 DATA RECORDING METHOD FOR OPTICAL DISK DRIVE 审中-公开
标题翻译：光盘驱动器的数据记录方法
公开(公告)号：US20060250905A1
公开(公告)日：2006-11-09
申请号：US11458304
申请日：2006-07-18
申请人： Yih-Shin Weng , Hong-Ching Chen
发明人： Yih-Shin Weng , Hong-Ching Chen
IPC分类号： H04B1/20
CPC分类号： G11B20/10527 , G11B27/36 , G11B2020/1062 , G11B2020/10814 , G11B2020/10972 , G11B2220/2537 , G11B2220/2562
摘要： A data recording method for an optical disk drive is implemented by the following steps. First, one or more data blocks are encoded and recorded sequentially, and it detects if a buffer under run occurs. If a buffer under run occurs, the recording does not stop immediately until at least the main data of the data block being currently recorded have been recorded completely. Afterwards, it restarts to encode and record from the data block next to the data block where the recording stops. Moreover, the recording also can stops if a servo error is detected, and the data restart to encode and record from the data block where the recording stops or at least one data block preceding the data block where the recording stops.
摘要翻译：通过以下步骤实现光盘驱动器的数据记录方法。首先，一个或多个数据块被顺序地编码和记录，并且它检测是否发生运行缓冲器。如果发生运行中的缓冲区，则至少在当前记录的数据块的主数据已被完全记录之前，记录不会立即停止。之后，它重新开始编码和记录从记录停止的数据块旁边的数据块。此外，如果检测到伺服错误，则记录也可以停止，并且数据重新开始以从记录停止的数据块或者记录停止的数据块之前的至少一个数据块进行编码和记录。

35. 发明申请

US20060033580A1 PHASE LOCKED LOOP FOR CONTROLLING AN OPTICAL RECORDING DEVICE AND METHOD THEREOF 失效
标题翻译：用于控制光学记录装置的相位锁定环及其方法
公开(公告)号：US20060033580A1
公开(公告)日：2006-02-16
申请号：US10710934
申请日：2004-08-13
申请人： Hong-Ching Chen , Chi-Ming Chang
发明人： Hong-Ching Chen , Chi-Ming Chang
IPC分类号： H03L7/00
CPC分类号： H03L7/087 , G11B20/1426 , G11B2220/216 , G11B2220/218 , G11B2220/2562 , H03L7/197
摘要： A PLL system for generating an output signal according to a first reference signal is disclosed. The output signal is used as a reference clock to write recording data on an optical medium. The PLL system includes a clock generator for receiving the first reference signal and a first frequency-divided signal to generate the output signal according to a phase difference between the first reference signal and the first frequency-divided signal; a phase-shift detector for generating a phase adjusting signal; and a phase-controllable frequency divider for dividing the frequency of the output signal by a frequency dividing ratio to generate the first frequency-divided signal and for receiving the phase adjusting signal to adjust the phase of the first frequency-divided signal.
摘要翻译：公开了一种用于根据第一参考信号产生输出信号的PLL系统。输出信号用作参考时钟，以在光学介质上写入记录数据。 PLL系统包括用于接收第一参考信号的时钟发生器和根据第一参考信号和第一分频信号之间的相位差产生输出信号的第一分频信号; 相移检测器，用于产生相位调整信号; 以及相位可控分频器，用于将输出信号的频率除以分频比，以产生第一分频信号，并用于接收相位调整信号以调整第一分频信号的相位。

36. 发明授权

US08314644B2 Clock generator, pulse generator utilizing the clock generator, and methods thereof 有权
标题翻译：时钟发生器，利用时钟发生器的脉冲发生器及其方法
公开(公告)号：US08314644B2
公开(公告)日：2012-11-20
申请号：US13354315
申请日：2012-01-19
申请人： Hong-Ching Chen , Chang-Po Ma
发明人： Hong-Ching Chen , Chang-Po Ma
IPC分类号： H03H11/26
CPC分类号： H03K5/15013 , G06F1/06 , G06F1/10
摘要： Disclosed is a clock generator for generating a target clock signal, which includes: a control circuit, receiving a reference clock signal, and for generating a clock enable signal and a delay selecting signal according to the reference clock signal; a delay module, coupled to the control circuit, for delaying the reference clock signal according to the delay selecting signal to generate a delayed reference clock signal; and a clock gating unit, coupled to the delay module and the control circuit, for receiving the delayed reference clock signal and the clock enable signal, and for passing the delayed reference clock signal according to the clock enable signal, to generate the target clock signal.
摘要翻译：公开了一种用于产生目标时钟信号的时钟发生器，其包括：控制电路，接收参考时钟信号，并用于根据参考时钟信号产生时钟使能信号和延迟选择信号; 延迟模块，耦合到所述控制电路，用于根据所述延迟选择信号延迟所述参考时钟信号以产生延迟的参考时钟信号; 以及时钟门控单元，耦合到延迟模块和控制电路，用于接收延迟的参考时钟信号和时钟使能信号，并且用于根据时钟使能信号传送延迟的参考时钟信号，以产生目标时钟信号。

37. 发明授权

US08291194B2 Methods of utilizing address mapping table to manage data access of storage medium without physically accessing storage medium and related storage controllers thereof 有权
标题翻译：利用地址映射表来管理存储介质的数据访问而不物理访问存储介质的方法及其相关的存储控制器
公开(公告)号：US08291194B2
公开(公告)日：2012-10-16
申请号：US12619645
申请日：2009-11-16
申请人： Jeng-Horng Tsai , Hong-Ching Chen
发明人： Jeng-Horng Tsai , Hong-Ching Chen
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F3/0608 , G06F3/0611 , G06F3/0616 , G06F3/0641 , G06F3/0679 , G06F2212/401 , G06F2212/7201
摘要： A method of managing data access of a storage medium includes establishing an address mapping table to record a physical address of a first data stored in the storage medium, where the physical address of the first data is mapped to a logical address of the first data; and when receiving a command for handling the first data stored in the storage medium internally, processing the address mapping table to serve the command without physically accessing the first data stored in the storage medium.
摘要翻译：管理存储介质的数据访问的方法包括建立地址映射表以记录存储在存储介质中的第一数据的物理地址，其中第一数据的物理地址映射到第一数据的逻辑地址; 并且当在内部接收到用于处理存储在所述存储介质中的所述第一数据的命令时，处理所述地址映射表以服务于所述命令而不物理地访问存储在所述存储介质中的所述第一数据。

38. 发明授权

US08098178B2 Chip and system utilizing the same 有权
标题翻译：芯片和系统利用它
公开(公告)号：US08098178B2
公开(公告)日：2012-01-17
申请号：US12117817
申请日：2008-05-09
申请人： Yi-Chiuan Wang , Chin-Ling Hung , Hong-Ching Chen
发明人： Yi-Chiuan Wang , Chin-Ling Hung , Hong-Ching Chen
IPC分类号： H03M1/10
CPC分类号： G01R31/31921
摘要： A system including a pulse generating module and a processing module is disclosed. The pulse generating module generates a target signal. The processing module outputs a processing signal according to the target signal. Throughput of the target signal exceeds throughput of the processing signal.
摘要翻译：公开了一种包括脉冲发生模块和处理模块的系统。脉冲发生模块产生目标信号。处理模块根据目标信号输出处理信号。目标信号的吞吐量超过处理信号的吞吐量。

39. 发明申请

US20110286271A1 MEMORY SYSTEMS AND METHODS FOR READING DATA STORED IN A MEMORY CELL OF A MEMORY DEVICE 审中-公开
标题翻译：用于读取存储在存储器件的存储器单元中的数据的存储器系统和方法
公开(公告)号：US20110286271A1
公开(公告)日：2011-11-24
申请号：US12784621
申请日：2010-05-21
申请人： Hong-Ching Chen
发明人： Hong-Ching Chen
IPC分类号： G11C16/06 , G11C16/04
CPC分类号： G11C7/1006 , G11C7/16 , G11C11/5642 , G11C16/0483 , G11C16/26 , G11C27/005 , G11C27/02 , G11C29/00 , G11C2211/5634 , G11C2211/5644
摘要： A memory system is provided. A memory device includes multiple memory cells for storing data. A controller is coupled to the memory device for accessing the memory device. When reading the data stored in a memory cell, the controller receives a digital signal representing content of the data stored in the memory cell, and detects a level of a voltage or conducted current of the memory cell according to the digital signal to obtain the content of the data.
摘要翻译：提供了一种存储系统。存储器件包括用于存储数据的多个存储器单元。控制器耦合到存储器件以访问存储器件。当读取存储在存储单元中的数据时，控制器接收表示存储在存储单元中的数据的数字信号，并根据数字信号检测存储单元的电压或传导电流的电平，以获得内容的数据。

40. 发明申请

US20110194575A1 CLOCK GENERATOR, PULSE GENERATOR UTILIZING THE CLOCK GENERATOR, AND METHODS THEREOF 有权
标题翻译：时钟发生器，利用时钟发生器的脉冲发生器及其方法
公开(公告)号：US20110194575A1
公开(公告)日：2011-08-11
申请号：US13091154
申请日：2011-04-21
申请人： Hong-Ching Chen , Chang-Po Ma
发明人： Hong-Ching Chen , Chang-Po Ma
IPC分类号： H01S3/10 , H03H11/26
CPC分类号： H03K5/15013 , G06F1/06 , G06F1/10
摘要： A clock generator for generating a target clock signal, comprising: a control circuit, receiving a reference clock signal, and for generating a clock enable signal and a delay selecting signal according to the reference clock signal; a delay module, coupled to the control circuit, for delaying the reference clock signal according to the delay selecting signal to generate a delayed reference clock signal; and a clock gating unit, coupled to the delay module and the control circuit, for receiving the delayed reference clock signal and the clock enable signal, and for passing the delayed reference clock signal according to the clock enable signal, to generate the target clock signal.
摘要翻译：一种用于产生目标时钟信号的时钟发生器，包括：控制电路，接收参考时钟信号，并用于根据参考时钟信号产生时钟使能信号和延迟选择信号; 延迟模块，耦合到所述控制电路，用于根据所述延迟选择信号延迟所述参考时钟信号以产生延迟的参考时钟信号; 以及时钟门控单元，耦合到延迟模块和控制电路，用于接收延迟的参考时钟信号和时钟使能信号，并且用于根据时钟使能信号传送延迟的参考时钟信号，以产生目标时钟信号。

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