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31. 发明申请

US20090207652A1 SEMICONDUCTOR DEVICE INCLUDING RESISTANCE STORAGE ELEMENT 有权
标题翻译：包括电阻存储元件的半导体器件
公开(公告)号：US20090207652A1
公开(公告)日：2009-08-20
申请号：US12370283
申请日：2009-02-12
申请人： Fumihiko Nitta , Yoshikazu Iida , Takashi Yamaki
发明人： Fumihiko Nitta , Yoshikazu Iida , Takashi Yamaki
IPC分类号： G11C11/00 , G11C11/416
CPC分类号： G11C13/0069 , G11C11/5678 , G11C13/0004 , G11C2013/0076 , G11C2213/79
摘要： A phase change memory includes a memory cell with a phase change element storing data according to level change of a resistance value in association with phase change, a write circuit converting the phase change element to an amorphous state or a polycrystalline state according to the logic of write data in a write operation mode, a read circuit reading out stored data from the phase change element in a readout operation mode, and a discharge circuit applying a discharge voltage to the phase change element to remove electrons trapped in the phase change element in a discharge operation mode. Accordingly, variation in the resistance value at the phase change element can be suppressed.
摘要翻译：相变存储器包括具有相变元件的存储单元，该相变元件根据与相变相关联的电阻值的电平变化存储数据，写入电路根据逻辑将逻辑转换为非晶态或多晶态在写入操作模式下写入数据，读出电路在读出操作模式下从相变元件读出存储的数据，以及放电电路将放电电压施加到相变元件，以去除捕获在相变元件中的电子放电操作模式。因此，可以抑制相变元件的电阻值的变化。

32. 发明授权

US08385134B2 Semiconductor integrated circuit device 有权
标题翻译：半导体集成电路器件
公开(公告)号：US08385134B2
公开(公告)日：2013-02-26
申请号：US13244448
申请日：2011-09-24
申请人： Takashi Yamaki
发明人： Takashi Yamaki
IPC分类号： G11C7/06
CPC分类号： G11C5/147 , G11C11/417
摘要： When a leakage type determining circuit determines that leakage current components of a gate leakage and a substrate leakage are larger in a resume standby mode, a VDDR regulator generates a power supply voltage VDDR at a first voltage level lower than a power supply voltage VDD, and supplies the voltage as a power supply voltage VDDR1 to an SRAM module via a selector switch. When the leakage type determining circuit determines that a leakage current of a channel leakage is larger, the VDDR regulator supplies the power supply voltage VDDR1 higher than the first voltage level and lower than the power supply voltage VDD to the SRAM module. Also, an ARVSS regulator supplies a cell source power supply voltage higher than a reference voltage to an SRAM module in another region.
摘要翻译：当泄漏型确定电路在恢复待机模式下确定栅极泄漏和衬底泄漏的漏电流分量较大时，VDDR调节器产生低于电源电压VDD的第一电压电平的电源电压VDDR，以及通过选择开关将电压作为电源电压VDDR1提供给SRAM模块。当泄漏型判定电路判定为漏电流的漏电流较大时，VDDR调节器将高于第一电压电平的电源电压VDDR1提供给低于VDD模块的电源电压VDD。此外，ARVSS调节器将高于参考电压的单元电源电源电压提供给另一区域中的SRAM模块。

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