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31. 发明申请

US20060204852A1 Nonaqueous electrolytic secondary battery and method of manufacturing the same 有权
公开(公告)号：US20060204852A1
公开(公告)日：2006-09-14
申请号：US11429259
申请日：2006-05-08
申请人： Nobumichi Nishida , Shinya Miyazaki , Masatoshi Takahashi
发明人： Nobumichi Nishida , Shinya Miyazaki , Masatoshi Takahashi
IPC分类号： H01M4/58 , H01M4/52 , H01M4/50 , C01B11/00
CPC分类号： H01M4/485 , C01G45/1242 , C01G51/42 , C01P2002/32 , C01P2002/52 , C01P2002/54 , C01P2002/60 , C01P2006/12 , C01P2006/40 , C01P2006/80 , H01M4/1315 , H01M4/133 , H01M4/13915 , H01M4/525 , H01M4/582 , H01M4/661 , H01M10/0525 , H01M2004/021 , Y10T29/49108
摘要： In a nonaqueous electrolytic secondary battery according to the invention, hexagonal system lithium containing cobalt composite oxide having a crystallite size in a (110) vector direction of 1000 Å or more and having a halogen compound added thereto by burning at time of synthesis is used as a positive electrode active material. By measuring a pH value of a filtrate obtained by dispersing, in water, the lithium containing cobalt composite oxide having the halogen compound added thereto by the burning at time of the synthesis and a crystallite size in the (110) vector direction of 1000 Å or more, a value of 9.6 to 10.1 is obtained. By using the lithium containing cobalt composite oxide as a positive electrode active material, a high temperature cycle property can be enhanced.

32. 发明授权

US09130556B2 Semiconductor device having output buffer circuit in which impedance thereof can be controlled 有权
标题翻译：具有能够控制其阻抗的输出缓冲电路的半导体装置
公开(公告)号：US09130556B2
公开(公告)日：2015-09-08
申请号：US13618639
申请日：2012-09-14
申请人： Chiaki Dono , Takenori Sato , Shinya Miyazaki
发明人： Chiaki Dono , Takenori Sato , Shinya Miyazaki
IPC分类号： H03L5/00 , H03K19/00 , H03K19/0185
CPC分类号： H03K19/0005 , H03K19/018521 , H03K19/018528
摘要： Disclosed herein is a device that includes a first buffer circuit coupled between a first power supply line and a data terminal and a second buffer circuit coupled between a second power supply line and the data terminal. First and second internal data signals complementary to each other are supplied to a level shifter, thereby third and fourth internal data signals complementary to each other are generated by changing amplitude values of the first and second internal data signals. The first and the second buffer circuits are controlled based on the third and fourth internal data signals such that one of the first and second buffer circuits turns on and the other of the first and second buffer circuits turns off.
摘要翻译：这里公开了一种装置，其包括耦合在第一电源线和数据终端之间的第一缓冲电路和耦合在第二电源线和数据终端之间的第二缓冲电路。彼此互补的第一和第二内部数据信号被提供给电平移位器，从而通过改变第一和第二内部数据信号的振幅值来产生彼此互补的第三和第四内部数据信号。基于第三和第四内部数据信号控制第一和第二缓冲电路，使得第一和第二缓冲电路中的一个导通，第一和第二缓冲电路中的另一个断开。

33. 发明授权

US08653874B2 Semiconductor device generates complementary output signals 失效
标题翻译：半导体器件产生互补的输出信号
公开(公告)号：US08653874B2
公开(公告)日：2014-02-18
申请号：US13610541
申请日：2012-09-11
申请人： Takenori Sato , Shinya Miyazaki
发明人： Takenori Sato , Shinya Miyazaki
IPC分类号： H03H11/16
CPC分类号： H03K5/151
摘要： A splitter circuit in a semiconductor device includes a first inverter that receives an input signal and outputs an inverted signal, a second inverter that receives the inverted signal and outputs a non-inverted signal (a first output signal), a third inverter that receives the input signal and outputs an inverted signal (a second output signal) and an auxiliary inverter that shares an output signal line with the third inverter. The third inverter and the auxiliary inverter use an inverted signal of the input signal as power supplies.
摘要翻译：半导体器件中的分路器电路包括接收输入信号并输出反相信号的第一反相器，接收反相信号并输出非反相信号（第一输出信号）的第二反相器，接收第输出信号并输出与第三反相器共享输出信号线的反相信号（第二输出信号）和辅助逆变器。第三个逆变器和辅助逆变器使用输入信号的反相信号作为电源。

34. 发明申请

US20130010513A1 CONTENT ADDRESSABLE MEMORY 有权
公开(公告)号：US20130010513A1
公开(公告)日：2013-01-10
申请号：US13621078
申请日：2012-09-15
申请人： Naoya WATANABE , Isamu Hayashi , Teruhiko Amano , Fukashi Morishita , Kenji Yoshinaga , Mihoko Akiyama , Shinya Miyazaki , Masakazu Ishibashi , Katsumi Dosaka
发明人： Naoya WATANABE , Isamu Hayashi , Teruhiko Amano , Fukashi Morishita , Kenji Yoshinaga , Mihoko Akiyama , Shinya Miyazaki , Masakazu Ishibashi , Katsumi Dosaka
IPC分类号： G11C15/00
CPC分类号： G11C15/043 , G11C7/06 , G11C7/12 , G11C7/14 , G11C7/22 , G11C15/04 , G11C15/046
摘要： An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

35. 发明授权

US08164934B2 Content addressable memory 有权
标题翻译：内容可寻址内存
公开(公告)号：US08164934B2
公开(公告)日：2012-04-24
申请号：US12720561
申请日：2010-03-09
申请人： Naoya Watanabe , Isamu Hayashi , Teruhiko Amano , Fukashi Morishita , Kenji Yoshinaga , Mihoko Akiyama , Shinya Miyazaki , Masakazu Ishibashi , Katsumi Dosaka
发明人： Naoya Watanabe , Isamu Hayashi , Teruhiko Amano , Fukashi Morishita , Kenji Yoshinaga , Mihoko Akiyama , Shinya Miyazaki , Masakazu Ishibashi , Katsumi Dosaka
IPC分类号： G11C15/00 , G11C15/04 , G11C7/14 , G11C7/06 , G11C7/12 , G11C7/22
CPC分类号： G11C15/043 , G11C7/06 , G11C7/12 , G11C7/14 , G11C7/22 , G11C15/04 , G11C15/046
摘要： An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.
摘要翻译：包括存储数据位的单位单元的多个比特的条目耦合到匹配线。匹配线具有一个充电电流，该充电电流的限制电流值小于在一个条目中以一位未命中状态流动的匹配线电流，但大于在一个条目中以全位匹配状态流动的匹配线电流。匹配线的预充电电压电平被限制为电源电压的一半或更小的电压电平。可以减少内容可寻址存储器的搜索周期中的功耗，并且可以增加搜索操作速度。

36. 发明申请

US20110234150A1 BATTERY CHARGING APPARATUS 审中-公开
标题翻译：电池充电器
公开(公告)号：US20110234150A1
公开(公告)日：2011-09-29
申请号：US13069882
申请日：2011-03-23
申请人： Kimihiko Furukawa , Shigeharu Taira , Shinichi Itagaki , Yoshihiro Shoji , Shinya Miyazaki
发明人： Kimihiko Furukawa , Shigeharu Taira , Shinichi Itagaki , Yoshihiro Shoji , Shinya Miyazaki
IPC分类号： H01M10/46 , H02J7/00
CPC分类号： H02J7/0027 , B60L53/14 , B60L53/30 , B60L53/51 , H02J7/0055 , Y02T10/7005 , Y02T10/7055 , Y02T10/7088 , Y02T90/121 , Y02T90/14
摘要： The battery charging apparatus has an auxiliary battery 1, a first charging circuit 20 for charging the auxiliary battery 1 with a first charging current derived from an externally connected commercial power source AC, and a second charging circuit 30 for charging the load battery LB with a second charging current that is higher than the first charging current and is derived from power from the auxiliary battery 1, which is charged by the first charging circuit 20. The first charging circuit 20 is connected to allow power supply to the auxiliary battery 1 and the second charging circuit 30. This makes charging circuit switching unnecessary and eliminates the need for components such as high-power switching devices. The charging apparatus has the positive features that stability and reliability are improved, and the load battery can be charged with the auxiliary battery 1 in a shorter time than using commercial power.
摘要翻译：电池充电装置具有辅助电池1，用于从外部连接的商用电源AC得到的第一充电电流对辅助电池1充电的第一充电电路20以及用于对负载电池LB充电的第二充电电路30 第二充电电流高于第一充电电流，并且来自辅助电池1的功率，其由第一充电电路20充电。第一充电电路20被连接以允许向辅助电池1供电，并且第二充电电路30.这使得不需要充电电路切换，并且不需要诸如大功率开关装置的组件。充电装置具有提高稳定性和可靠性的正面特征，并且负载电池可以在比使用商业电力的时间更短的时间内与辅助电池1充电。

37. 发明申请

US20110177364A1 NONAQUEOUS ELECTROLYTE SECONDARY BATTERY 审中-公开
标题翻译：非电解电解质二次电池
公开(公告)号：US20110177364A1
公开(公告)日：2011-07-21
申请号：US13010227
申请日：2011-01-20
申请人： Shinya Miyazaki , Hironori Shirakata
发明人： Shinya Miyazaki , Hironori Shirakata
IPC分类号： H01M2/12
CPC分类号： H01M10/0567 , H01M4/131 , H01M4/364 , H01M4/505 , H01M4/62 , H01M10/0525 , H01M10/4235 , H01M2200/20 , H01M2220/30
摘要： Provided is a nonaqueous electrolyte secondary battery using lithium-manganese composite oxide as positive electrode active material, having superior high-temperature charge storage characteristics and charge-discharge cycling characteristics and enhanced safety in the event of overcharging. A nonaqueous electrolyte secondary battery according to an aspect of the invention includes: a positive electrode plate provided with a positive electrode mixture containing positive electrode active material, a negative electrode plate, a nonaqueous electrolyte, and a pressure-sensitive safety mechanism that is actuated by rise in internal pressure. The positive electrode active material contains lithium-manganese composite oxide containing 10 to 61% by mass of the element manganese. The positive electrode mixture contains lithium carbonate or calcium carbonate, and lithium phosphate. The nonaqueous electrolyte contains an organic additive made of at least one selected from among biphenyl, a cycloalkyl benzene compound, and a compound having quaternary carbon adjacent to a benzene ring.
摘要翻译：提供一种使用锂锰复合氧化物作为正极活性物质的非水电解质二次电池，具有优异的高温电荷存储特性和充放电循环特性，并且在过充电的情况下提高了安全性。根据本发明的一个方面的非水电解质二次电池包括：正极板，设置有包含正极活性物质，负极板，非水电解质和压敏安全机构的正极混合物，所述正极混合物由内压升高正极活性物质含有含有10〜61质量％的元素锰的锂锰复合氧化物。正极混合物含有碳酸锂或碳酸钙和磷酸锂。非水电解质含有由联苯，环烷基苯化合物和与苯环相邻的具有季碳的化合物中的至少一种制成的有机添加剂。

38. 发明授权

US07799458B2 Nonaqueous electrolytic secondary battery and method of manufacturing the same 有权
标题翻译：非水电解二次电池及其制造方法
公开(公告)号：US07799458B2
公开(公告)日：2010-09-21
申请号：US11429259
申请日：2006-05-08
申请人： Nobumichi Nishida , Shinya Miyazaki , Masatoshi Takahashi
发明人： Nobumichi Nishida , Shinya Miyazaki , Masatoshi Takahashi
IPC分类号： H01M4/52
CPC分类号： H01M4/485 , C01G45/1242 , C01G51/42 , C01P2002/32 , C01P2002/52 , C01P2002/54 , C01P2002/60 , C01P2006/12 , C01P2006/40 , C01P2006/80 , H01M4/1315 , H01M4/133 , H01M4/13915 , H01M4/525 , H01M4/582 , H01M4/661 , H01M10/0525 , H01M2004/021 , Y10T29/49108
摘要： In a nonaqueous electrolytic secondary battery according to the invention, hexagonal system lithium containing cobalt composite oxide having a crystallite size in a (110) vector direction of 1000 Å or more and having a halogen compound added thereto by burning at time of synthesis is used as a positive electrode active material. By measuring a pH value of a filtrate obtained by dispersing, in water, the lithium containing cobalt composite oxide having the halogen compound added thereto by the burning at time of the synthesis and a crystallite size in the (110) vector direction of 1000 Å or more, a value of 9.6 to 10.1 is obtained. By using the lithium containing cobalt composite oxide as a positive electrode active material, a high temperature cycle property can be enhanced.
摘要翻译：在根据本发明的非水电解质二次电池中，使用在（110）向量方向上的微晶尺寸为1000以上并且在合成时通过燃烧而添加有卤素化合物的六方晶系含锂复合氧化物，被用作正极活性物质。通过测量通过在合成时通过在合成时的燃烧和在（110）向量方向上的微晶尺寸将在其中分散有添加有卤素化合物的含锂钴复合氧化物而获得的滤液的pH值，更多地，获得9.6至10.1的值。通过使用含锂钴复合氧化物作为正极活性物质，可以提高高温循环特性。

39. 发明授权

US07672173B2 Non-volatile semiconductor memory device and semiconductor memory device 有权
标题翻译：非易失性半导体存储器件和半导体存储器件
公开(公告)号：US07672173B2
公开(公告)日：2010-03-02
申请号：US11902232
申请日：2007-09-20
申请人： Tsukasa Ooishi , Tomohiro Uchiyama , Shinya Miyazaki
发明人： Tsukasa Ooishi , Tomohiro Uchiyama , Shinya Miyazaki
IPC分类号： G11C7/00
CPC分类号： G11C8/10 , G11C16/08 , G11C16/28 , G11C16/32
摘要： For each memory block, a predecoder for predecoding an applied address signal, an address latch circuit for latching the output signal of the predecoder, and a decode circuit for decoding an output signal of the address latch circuit and performing a memory cell selecting operation in a corresponding memory block are provided. Propagation delay of latch predecode signals can be made smaller and the margin for the internal read timing can be enlarged. In addition, the internal state of the decoder and memory cell selection circuitry are reset to an initial state when a memory cell is selected and the internal data output circuitry is reset to an initial state in accordance with a state of internal data reading. Thus, a non-volatile semiconductor memory device that can decrease address skew and realize an operation with sufficient margin is provided.
摘要翻译：对于每个存储器块，用于对应用的地址信号进行预编码的预解码器，用于锁存预解码器的输出信号的地址锁存电路和用于解码地址锁存电路的输出信号的解码电路，并且执行存储器单元选择操作提供相应的存储块。可以使锁存器预解码信号的传播延迟更小，并且可以扩大内部读取定时的余量。此外，当选择存储单元并且根据内部数据读取的状态将内部数据输出电路复位到初始状态时，解码器和存储单元选择电路的内部状态被复位到初始状态。因此，提供了可以减少地址偏移并实现具有足够余量的操作的非易失性半导体存储器件。

40. 发明授权

US07381395B2 Non-aqueous electrolyte secondary battery and method of manufacturing the same 有权
标题翻译：非水电解质二次电池及其制造方法
公开(公告)号：US07381395B2
公开(公告)日：2008-06-03
申请号：US10951732
申请日：2004-09-29
申请人： Shinya Miyazaki , Nobumichi Nishida
发明人： Shinya Miyazaki , Nobumichi Nishida
IPC分类号： C01G51/04 , H01M4/52
CPC分类号： H01M4/525 , C01G51/006 , C01G51/42 , C01P2002/52 , C01P2004/61 , C01P2006/40 , H01M4/0471 , H01M4/131 , H01M4/133 , H01M4/485 , H01M10/0525 , H01M10/0587 , H01M2010/4292 , H01M2300/0037
摘要： A positive electrode used in the non-aqueous electrolyte secondary battery of the present invention includes a hexagonal system lithium-containing cobalt composite oxide represented by the general expression ┌LiCo1-XMXO2 (M=Zr, Mg, Al)┘ obtained by synthesizing a lithium compound as a lithium source with a cobalt compound as a cobalt source to which 0.01 mol % or more and 1.0 mol % or less of zirconium is added and magnesium and/or aluminum is added through coprecipitation, as the positive electrode active material, whereby the thermal stability, load performance and charging/discharging cycle performance characteristics of the non-aqueous electrolyte secondary battery are improved without lowering its capacity and charging/discharging efficiency.
摘要翻译：在本发明的非水电解质二次电池中使用的正极包括由以下通式表示的六方晶系的含锂钴复合氧化物：＆lt; 1＆lt; 1-X＆lt; 通过将作为锂源的锂化合物与钴化合物作为钴源合成而得到的“O 2”（M = Zr，Mg，Al），0.01mol％以上且1.0mol％或更少的锆，并且通过共沉淀加入镁和/或铝作为正极活性物质，从而提高非水电解质二次电池的热稳定性，负载性能和充放电循环性能，而不降低其容量和充放电效率。

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