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31. 发明授权

US06782987B1 Paper identification counter and paper identification and counting method 有权
标题翻译：纸张识别计数器和纸张识别和计数方法
公开(公告)号：US06782987B1
公开(公告)日：2004-08-31
申请号：US09625359
申请日：2000-07-25
申请人： Hideo Abe , Yoshikazu Takagi , Hiroyuki Shimada , Makoto Shinkai , Takahiro Ogawa
发明人： Hideo Abe , Yoshikazu Takagi , Hiroyuki Shimada , Makoto Shinkai , Takahiro Ogawa
IPC分类号： G07K700
CPC分类号： G07D11/0084 , B65H2404/5311
摘要： A paper identification counter comprises a counter body, a hopper which is formed to the counter body and to which papers to be identified and counted are fed, a paper conveyance unit including a conveyance passage along which the papers such as currency notes from the hopper is conveyed one by one in a direction of a short width side of the papers, a paper identification unit disposed on a way of the conveyance passage for identifying and counting the papers; and a stacker in which the papers delivered from the conveyance passage are stacked. The conveyance passage includes a U-shaped curvilinear conveyance region on a way between the hopper and the stacker.
摘要翻译：纸识别计数器包括对置体，料斗，其形成在对置主体上并被供给待识别和计数的纸张;纸输送单元，包括输送通道，诸如来自料斗的纸币等纸张沿着该输送通道在纸张的宽度方向一个接一个地传送的纸张识别单元，设置在输送通道的通路上，用于识别和计数纸张; 以及堆叠器，其中从输送通道输送的纸张堆叠在其中。输送通道包括在料斗和堆垛机之间的路上的U形曲线输送区域。

32. 发明授权

US06768529B2 Reflection-transmission double type liquid-crystal display device 失效
标题翻译：反射式双液晶显示装置
公开(公告)号：US06768529B2
公开(公告)日：2004-07-27
申请号：US09748212
申请日：2000-12-27
申请人： Seiji Umemoto , Toshihiko Ariyoshi , Hideo Abe
发明人： Seiji Umemoto , Toshihiko Ariyoshi , Hideo Abe
IPC分类号： G02F11335
CPC分类号： G02B6/0061 , G02B6/0036 , G02B6/0038 , G02F1/133615 , G02F2001/133616 , G02F2203/02
摘要： A reflection-transmission double type liquid-crystal display device has a transmission type liquid-crystal display panel including a liquid-crystal cell, at least one illuminator disposed on at least one side surface of the liquid-crystal display panel, an optical path changing sheet which has a refractive index exhibiting a refractive index difference of not higher than 0.15 from a refractive index of a nearest liquid-crystal cell substrate and is bonded onto a back side of the liquid-crystal display panel through an adhesive layer having a refractive index exhibiting a refractive index difference of not higher than 0.20 from the refractive index of the nearest liquid-crystal cell substrate, and a reflection layer disposed on a back side of the optical path changing sheet. The optical path changing sheet includes optical path changing slopes and flat surfaces. Each of the optical path changing slopes faces the illuminator at an inclination angle in a range of from 30 to 48 degrees with respect to a plane of the optical path changing sheet and being provided for reflecting incident light from the illuminator toward the visual side of the liquid-crystal display panel. Each of the flat surfaces is inclined at an inclination angle of not larger than 10 degrees with respect to the sheet plane, and a projected area of the flat surfaces on the sheet plane is not smaller than 10 times as large as a projected area of the optical path changing slopes.
摘要翻译：反射透射型双液晶显示装置具有包括液晶单元的透射型液晶显示面板，设置在液晶显示面板的至少一个侧面的至少一个照明器，片材，其具有从最近的液晶单元基板的折射率表现出不高于0.15的折射率差的折射率，并且通过具有折射率的粘合剂层粘合到液晶显示面板的背面从最近的液晶单元基板的折射率出现不高于0.20的折射率差，以及设置在光路改变片背面的反射层。光路改变片包括光路改变斜面和平坦表面。每个光路改变斜面相对于光路改变片的平面以30至48度的范围内的倾斜角度面向照明器，并且被设置成用于将来自照明器的入射光反射到照明器的视觉侧液晶显示面板。每个平坦表面相对于片材平面以不大于10度的倾斜角度倾斜，并且平面上的平坦表面的投影面积不小于该平面的投影面积的10倍光路改变斜率。

33. 发明授权

US06618491B1 Moving image processor capable of outputting moving image as still image 有权
标题翻译：能够将运动图像作为静止图像输出的运动图像处理器
公开(公告)号：US06618491B1
公开(公告)日：2003-09-09
申请号：US09443276
申请日：1999-11-18
申请人： Hideo Abe
发明人： Hideo Abe
IPC分类号： G06K900
CPC分类号： G06F17/30787 , G06F17/30805 , G06F17/30843 , G11B27/28
摘要： A moving image data fetch section extracts frame images as well as audio information from moving image data and stores them in a frame memory. A feature amount detection section detects the change of a feature amount included in the frame images constituting the moving image data, and an image selection section selects specific frame images based on the detected image changing characteristics or audio changing characteristics. An image processing section selects a frame image having particularly great change of the image or audio data from among the selected frame images as a to-be-processed image and processes the selected image to have a predetermined expression form. A monitor, a printer or the like outputs the specific frame images selected by the image selection section and the frame image selected and processed by the image processing section as still images.
摘要翻译：运动图像数据提取部分从运动图像数据中提取帧图像以及音频信息，并将它们存储在帧存储器中。特征量检测部分检测包括在构成运动图像数据的帧图像中的特征量的变化，并且图像选择部分基于检测到的图像改变特性或音频改变特性来选择特定帧图像。图像处理部从所选择的帧图像中选择具有特别大的图像或音频数据的变化的帧图像作为待处理图像，并处理所选择的图像以具有预定的表达形式。监视器，打印机等将由图像选择部选择的特定帧图像和由图像处理部选择并处理的帧图像作为静止图像输出。

34. 发明授权

US06366409B1 Light pipe unit, plane light source unit and liquid-crystal display device 有权
标题翻译：光管单元，平面光源单元和液晶显示装置
公开(公告)号：US06366409B1
公开(公告)日：2002-04-02
申请号：US09703652
申请日：2000-11-02
申请人： Seiji Umemoto , Toshihiro Ariyoshi , Takao Suzuki , Hideo Abe
发明人： Seiji Umemoto , Toshihiro Ariyoshi , Takao Suzuki , Hideo Abe
IPC分类号： G02B2710
CPC分类号： G02B6/0018 , G02B6/0028 , G02B6/0033 , G02F1/133615 , Y10S385/901
摘要： In a light pipe unit, a surface light pipe includes at least upper and lower surfaces and connected side surfaces constituted by an incident side surface formed between the upper and lower surfaces and side surfaces adjacent to the incident side surface. A linear light pipe includes a light supply surface, and the surface light pipe is connected to the linear light pipe through the connected side surfaces and the light supply surface so that the linear light pipe converts incident light from a point light source into a linear light source and outputs the light of the linear light source through the light supply surface. The surface light pipe converts incident light from the linear light source into a plane light source. In another light pipe unit, a linear light pipe for converting incident light from a point light source into a linear light source, and a surface light pipe for converting incident light from the linear light source into a plane light source are provided. The linear light pipe and the surface light pipe are partially connected to each other. Further, a plane light source unit wherein a point light source is disposed on the linear light pipe of one of the above light pipe units and a liquid-crystal display device provided with the above-mentioned plane light source unit and a liquid crystal cell are provided.
摘要翻译：在光管单元中，表面光管至少包括上表面和下表面以及由形成在上表面和下表面之间的入射侧表面和与入射侧表面相邻的侧表面构成的连接侧表面。线状光管包括光供给面，并且表面光管通过连接的侧面和供光面连接到线状光管，使得线状光管将来自点光源的入射光转换成线状光通过光源表面输出并输出线状光源的光。表面光管将来自线性光源的入射光转换成平面光源。在另一个光管单元中，设置有用于将来自点光源的入射光转换为线性光源的线性光管，以及用于将来自线性光源的入射光转换为平面光源的表面光管。线状光管和表面光管彼此部分连接。此外，其中点光源设置在上述光管单元之一的直线光管上的平面光源单元和设置有上述平面光源单元和液晶单元的液晶显示装置，提供。

35. 发明授权

US06321284B1 Multiprocessor system with multiple memory buses for access to shared memories 失效
标题翻译：具有多个存储器总线的多处理器系统，用于访问共享存储器
公开(公告)号：US06321284B1
公开(公告)日：2001-11-20
申请号：US09268426
申请日：1999-03-12
申请人： Akio Shinohara , Hideo Abe , Katsuichi Ohara
发明人： Akio Shinohara , Hideo Abe , Katsuichi Ohara
IPC分类号： G06F1336
CPC分类号： G06F13/1605 , G06F13/1663
摘要： A data processing system having one or more processor modules and a plurality of shared memory busses to increase its total system performance. Processor modules send bus requests to a bus arbiter, when they attempt to make access to shared memories or memory-mapped peripheral control modules. When such memory access requests are received, the bus arbiter checks the availability of each bus that will be used to reach the requested memories, and send bus grant signals to the requesting processor modules after resolving conflicts, if any. Since the system provides separate paths to reach the individual shared memories, two or more processor modules can be granted their access requests at the same time.
摘要翻译：具有一个或多个处理器模块和多个共享存储器总线的数据处理系统，以增加其总系统性能。处理器模块在总线仲裁器尝试访问共享存储器或内存映射外设控制模块时，将总线请求发送到总线仲裁器。当接收到这样的存储器访问请求时，总线仲裁器检查将用于到达所请求的存储器的每个总线的可用性，并且在解决冲突（如果有的话）之后向发出请求的处理器模块发送总线授权信号。由于系统提供单独的路径以到达各个共享存储器，因此可以同时授予两个或多个处理器模块的访问请求。

36. 发明授权

US5402381A Semiconductor memory circuit having bit clear and/or register initialize function 失效
标题翻译：具有位清除和/或寄存器初始化功能的半导体存储电路
公开(公告)号：US5402381A
公开(公告)日：1995-03-28
申请号：US894434
申请日：1992-06-05
申请人： Satoru Sonobe , Hideo Abe
发明人： Satoru Sonobe , Hideo Abe
IPC分类号： G06F15/78 , G11C7/20 , G11C11/41 , G11C7/00
CPC分类号： G11C7/20
摘要： A semiconductor memory circuit includes a plurality of memory cells arranged in an array form, a plurality of data lines for reading and writing data, a plurality of address lines each for transferring an address signal that specifies a corresponding specific memory cell, a control unit for controlling reading and writing of the data, a plurality of data input and data output terminals for inputting and outputting the data, a write enable signal input terminal to which a write enable signal for permitting writing of the data is applied, and at least one control signal input terminal to which either a cell clear signal for clearing the data stored or a cell initialization signal for performing the initialization of the data is applied. Data reading, data writing and data clearing or data initializing are performed through the plurality of data lines and the plurality of address lines. The hardware area to be occupied is reduced due to a reduction in the number of the cell transistors and also by a reduction in the number of signal lines.
摘要翻译：半导体存储器电路包括以阵列形式布置的多个存储单元，用于读取和写入数据的多条数据线，多条地址线，每条地址线用于传送指定对应的特定存储单元的地址信号;控制单元，控制数据的读取和写入，用于输入和输出数据的多个数据输入和数据输出端;施加用于允许写入数据的写使能信号的写使能信号输入端;以及至少一个控制用于清除存储的数据的单元清除信号或用于执行数据的初始化的单元初始化信号的信号输入端子。通过多条数据线和多条地址线执行数据读取，数据写入和数据清除或数据初始化。由于单元晶体管的数量的减少以及信号线的数量的减少，要占用的硬件区域减少。

37. 发明授权

US5152846A Method of producing steel sheets for porcelain enameling having improved enamel adhesion property 失效
标题翻译：生产钢板的方法，用于具有改进的ENAMEL粘合性能的电镀
公开(公告)号：US5152846A
公开(公告)日：1992-10-06
申请号：US651247
申请日：1991-03-13
申请人： Kazunori Osawa , Susumu Satoh , Hideo Abe
发明人： Kazunori Osawa , Susumu Satoh , Hideo Abe
IPC分类号： C21D8/02 , C23D3/00
CPC分类号： C21D8/0278 , C23D3/00 , C21D8/0273
摘要： Activation of steel sheet surface by subjecting to a pickling treatment after recrystallization annealing and before forming in the production steps of steel sheets for coating porcelain enameling. Continuously cast slabs are used as a starting steel, and the resulting sheet realizes an improved adhesion property, to porcelain glaze without causing fishscale, blistering and pinhole defects and the like even when using a glaze not requiring pickling with sulfuric acid, Ni flashing or the like as an enameling glaze.
摘要翻译： PCT No.PCT / JP90 / 00928 Sec。 371日期1991年3月13日 102（e）1991年3月13日PCT PCT 1990年7月18日PCT公布。第WO91 / 01390号公报日期：1991年2月7日。通过在再结晶退火后的酸洗处理和在用于涂覆瓷搪瓷的钢板的制造步骤中成形之前对钢板表面进行活化。使用连续铸造的板坯作为起始钢，并且所得到的片材实现了改善的粘合性能，即使使用不需要用硫酸酸洗的釉料，Ni闪光或者不使用酸洗的釉料，瓷砖也不会引起鱼鳞，起泡和针孔缺陷等像搪瓷釉。

38. 发明授权

US4565361A Bank note dispenser 失效
标题翻译：钞票分配器
公开(公告)号：US4565361A
公开(公告)日：1986-01-21
申请号：US598792
申请日：1984-04-10
申请人： Masaru Tanaka , Hideo Abe
发明人： Masaru Tanaka , Hideo Abe
IPC分类号： B65H1/02 , B07C3/00 , B65H1/14 , B65H3/06 , B65H3/52 , B65H43/00 , B65H83/00 , G07D1/00 , B65H7/08
CPC分类号： B65H3/5223 , B65H3/0661 , B65H3/0676 , B65H3/523 , B65H43/00 , B65H2701/1912
摘要： The bank notes in a bank note container are delivered one at a time by means of feed rollers and a delivery roller. The delivered bank notes are detected by sensor means. A signal from the sensor means is transferred to a control mechanism which drives or stops the delivery roller. The delivery roller is stopped and is driven again in response to a signal from an encoder carried by a supporting shaft of pull rollers. Therefore the bank notes are delivered from the bank note delivery container to the outside thereof in a predeterminedly spaced apart relationship.
摘要翻译：钞票容器中的钞票通过进纸辊和送纸辊一次一张。传送的钞票由传感器装置检测。来自传感器装置的信号被传送到驱动或停止输送辊的控制机构。输送辊停止，并响应于来自由拉辊的支撑轴承载的编码器的信号再次被驱动。因此，钞票以预定间隔的关系从钞票传送容器传送到其外部。

39. 发明授权

US08570839B2 Time-information obtaining apparatus and radio-controlled timepiece 有权
标题翻译：时间信息获取装置和无线电控制时计
公开(公告)号：US08570839B2
公开(公告)日：2013-10-29
申请号：US13297405
申请日：2011-11-16
申请人： Keiichi Nomura , Hideo Abe
发明人： Keiichi Nomura , Hideo Abe
IPC分类号： G04C11/02 , G04R20/12
CPC分类号： G04R20/12 , G04R20/10
摘要： A time-information obtaining apparatus is provided with an input waveform data pattern generating unit for sampling a received standard-time radio wave signal to generate an input waveform data pattern, an internal time counting unit for generate a base time, a calculation-waveform data pattern generating unit for generating plural calculation-waveform data patterns based on the base time, an invalid-bit detecting unit for detecting in the plural calculation-waveform data patterns, invalid bits not to be compared with the input waveform data pattern, an error counting unit for comparing the sample values of valid bits of the plural calculation-waveform data patterns with the invalid bits removed and the corresponding sample values of the input waveform data pattern to detect discrepancies between them, and a present-time correcting unit for correcting the base time based on the calculation-waveform data pattern having the smallest number of errors.
摘要翻译：时间信息获取装置具有输入波形数据模式产生单元，用于对接收的标准时间无线电波信号进行采样以产生输入波形数据模式，产生基准时间的内部时间计数单元，计算波形数据模式产生单元，用于基于基准时间产生多个计算波形数据模式;无效比特检测单元，用于在多个计算波形数据模式中检测不与输入波形数据模式比较的无效比特，错误计数单元，用于将多个计算波形数据模式中的有效位的采样值与去除的无效位相对应，以及相应的输入波形数据模式的采样值以检测它们之间的差异，以及校正基极的当前时间校正单元基于具有最小错误数的计算波形数据模式的时间。

40. 发明申请

US20130077510A1 APPARATUS AND METHOD FOR SWITCHING A PACKET 有权
标题翻译：用于切换分组的装置和方法
公开(公告)号：US20130077510A1
公开(公告)日：2013-03-28
申请号：US13595224
申请日：2012-08-27
申请人： Kazuto NISHIMURA , Hideo Abe , Satoshi Nemoto
发明人： Kazuto NISHIMURA , Hideo Abe , Satoshi Nemoto
IPC分类号： H04L12/50 , H04L12/26
CPC分类号： G06F11/2005 , H04L12/6418 , H04L47/24 , H04L47/56 , H04L47/6215 , H04L49/15 , H04L49/90
摘要： An apparatus includes a first switch circuit in an active mode and a second switch circuit in a standby mode. The apparatus receives high-priority packets and low-priority packets. Each switch circuit stores the high-priority packets and the low-priority packets into first and second buffers, respectively. The each switch circuit performs packet-readout processing reading out a packet from the first and second buffers where the packet-readout processing is performed on the first buffer on a priority basis. The apparatus controls the first switch circuit so that a back-pressure time for the high-priority packets becomes longer with increasing amount of data transmitted by the high-priority packets, when a low-priority packet outputted from the first switch circuit is determined to be a packet that has been received at a first time that is later than a second time at which another low-priority packet outputted from the second switch circuit has been received.
摘要翻译：一种装置包括处于待机模式的第一开关电路和处于待机模式的第二开关电路。该设备接收高优先级的报文和低优先级的报文。每个开关电路分别将高优先级分组和低优先级分组存储到第一和第二缓冲器中。每个开关电路执行分组读出处理，从第一和第二缓冲器读出分组，其中在第一缓冲器上优先执行分组读出处理。当从第一开关电路输出的低优先级分组被确定为：第一开关电路时，随着高优先级分组发送的数据量的增加，高优先级分组的背压时间变长，是在第一时间接收到的分组，该分组晚于在第二时间接收到从第二开关电路输出的另一低优先级分组的分组。

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