专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

31. 发明公开

US20230196994A1 SHIFT REGISTER UNIT, GATE DRIVING CIRCUIT, DISPLAY DEVICE AND DRIVING METHOD 审中-公开
公开(公告)号：US20230196994A1
公开(公告)日：2023-06-22
申请号：US18108730
申请日：2023-02-13
申请人： HEFEI BOE JOINT TECHNOLOGY CO., LTD. , BOE TECHNOLOGY GROUP CO., LTD.
发明人： Xuehuan FENG , Yongqian LI , Hao LIU
IPC分类号： G09G3/3225 , G11C19/28 , G09G3/3266
CPC分类号： G09G3/3225 , G11C19/28 , G09G3/3266 , G09G2310/0286
摘要： A shift register unit, a gate driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a first sub-circuit, a second sub-circuit, a leakage prevention circuit and a blanking input sub-circuit, wherein the first sub-circuit comprises a first input circuit and a first output circuit; the second sub-circuit comprises a second input circuit and a second output circuit; the leakage prevention circuit is configured to control a level of a leakage prevention node under control of the level of the first node, so as to turn off a circuit connected between the first node and the leakage prevention node; and the blanking input sub-circuit is connected to the first node and the second node, and is configured to receive a selection control signal and a first clock signal, and control the level of the first node and the level of the second node.

32. 发明公开

US20230154410A1 DISPLAY PANEL AND DISPLAY APPARATUS 审中-公开
公开(公告)号：US20230154410A1
公开(公告)日：2023-05-18
申请号：US17642983
申请日：2020-10-23
申请人： Hefei BOE Joint Technology Co.,Ltd. , BOE TECHNOLOGY GROUP CO., LTD.
发明人： Xuehuan FENG , Yongqian LI
IPC分类号： G09G3/3266 , G09G3/3233 , H10K59/131 , G11C19/28
CPC分类号： G09G3/3266 , G09G3/3233 , H10K59/131 , G11C19/28 , G09G2310/0286 , G09G2300/0426 , G09G2300/0842 , G09G2330/021
摘要： A display panel includes a plurality of rows of sub-pixels and at least one gate driver circuit that are disposed on a base substrate. Each sub-pixel includes a pixel driver circuit and a light-emitting device coupled to the pixel driver circuit, and a gate driver circuit includes a plurality of shift registers that are cascaded and a plurality of control signal lines. A shift register is coupled to a plurality of pixel driver circuits in at least one row of sub-pixels and at least a part of the plurality of control signal lines, and includes a plurality of first thin film transistors that are divided into a plurality of first thin film transistors. At least one thin film transistor group is located in the display region and distributed between adjacent sub-pixels in a same row of sub-pixels.

33. 发明申请

US20230125979A1 GATE DRIVING STRUCTURE HAVING OVERLAPPED SIGNAL WIRING AND CAPACITOR, ARRAY SUBSTRATE AND DISPLAY DEVICE 有权
公开(公告)号：US20230125979A1
公开(公告)日：2023-04-27
申请号：US18077269
申请日：2022-12-08
申请人： Hefei BOE Joint Technology Co., Ltd. , BOE TECHNOLOGY GROUP CO., LTD.
发明人： Xuehuan FENG , Pan XU
IPC分类号： G09G3/20 , G11C19/28
摘要： The present disclosure relates to the field of display technology, and in particular, to a gate driving structure, an array substrate and a display device. The gate driving structure may include: a base substrate; a shift register, formed on the base substrate, and including a plurality of thin film transistors and at least one capacitor, the capacitor being coupled to the thin film transistor; and a signal wiring group, formed on the base substrate, and including a plurality of signal wirings spaced apart from each other, the signal wiring being coupled to the thin film transistor. An orthographic projection of the capacitor on the base substrate is at least partially overlapped with an orthographic projection of the signal wiring group on the base substrate.

34. 发明申请

US20230084070A1 SHIFT REGISTER UNIT, SIGNAL GENERATION UNIT CIRCUIT, DRIVING METHOD AND DISPLAY DEVICE 有权
公开(公告)号：US20230084070A1
公开(公告)日：2023-03-16
申请号：US17770250
申请日：2021-04-15
申请人： Hefei BOE Joint Technology Co., Ltd. , BOE Technology Group Co., Ltd.
发明人： Xuehuan FENG , Yongqian LI
IPC分类号： G09G5/00 , G11C19/28
摘要： The present disclosure provides a shift register unit, a signal generation unit circuit, a driving method and a display device. The shift register unit includes a first node control circuit, a second node control circuit and an output circuit, the first node control circuit is used to control a potential of a first node; the second node control circuit controls a potential of a second node; the output circuit is used to control and maintain the potential of the first node and the potential of the second node, and control to connect the output terminal and the second clock signal terminal under the control of the potential of the first node, and control to connect the input terminal and the second voltage terminal under the control of the potential of the second node.

35. 发明申请

US20230033702A1 DISPLAY PANEL AND DISPLAY APPARATUS 有权
公开(公告)号：US20230033702A1
公开(公告)日：2023-02-02
申请号：US17791558
申请日：2020-12-23
申请人： Hefei BOE Joint Technology Co.,Ltd. , BOE TECHNOLOGY GROUP CO., LTD.
发明人： Xuehuan FENG , Yongqian LI
IPC分类号： G09G3/3266
摘要： A display panel (100), comprising: a substrate (1), a plurality of sub-pixels (2) and a gate driving circuit (3). The sub-pixels (2) comprise pixel driving circuits (21). The gate driving circuit (3) comprises multiple stages of cascaded shift registers (31), wherein one stage of shift registers (31) is electrically connected to a plurality of pixel driving circuits (21) in one row of sub-pixels (2). The gate driving circuit (3) further comprises: a plurality of cascaded input signal lines (34) and a plurality of cascaded display reset signal lines (35). Each cascaded input signal line (34) is configured to be connected to a shift signal end (CR ) of one stage of shift registers (31) and an input signal end (Iput) of another stage of shift registers (31); and each cascaded display reset signal line (35) is configured to be connected to the shift signal end (CR ) of one stage of shift registers (31) and a display reset signal end (STD) of another stage of shift registers. The display panel (100) is provided with a plurality of sub-pixel regions (S) used for arranging the plurality of sub-pixels (2), and first gap regions (D) located between two adjacent columns of sub-pixel regions (5); and the cascaded display reset signal lines (35) and the cascaded input signal lines (34) are both arranged in the first gap regions (D), and the two are arranged in different first gap regions (D).

36. 发明申请

US20220114970A1 SHIFT REGISTER UNIT CIRCUIT AND DRIVE METHOD, AND GATE DRIVER AND DISPLAY DEVICE 有权
公开(公告)号：US20220114970A1
公开(公告)日：2022-04-14
申请号：US17417675
申请日：2020-10-15
申请人： HEFEI BOE JOINT TECHNOLOGY CO., LTD. , BOE TECHNOLOGY GROUP CO., LTD.
发明人： Xuehuan FENG , Yongqian LI
IPC分类号： G09G3/3266
摘要： Provided are a shift register unit circuit and drive method, and a gate driver and a display device. The shift register unit circuit includes a first sub-unit circuit, a second sub-unit circuit, a third sub-unit circuit, and a fourth sub-unit circuit. Responsive to providing a corresponding input pulse and clock signal, the shift register unit circuit is configured output first, second, third, and fourth output signals. The shift register unit circuit is configured such that a fifth node is in conduction with a second node at least while the reset pulse is active.

37. 发明申请

US20220114938A1 SHIFT REGISTER UNIT COMPRISING INPUT CIRCUIT, FIRST CONTROL CIRCUIT, BLANKING CONTROL CIRCUIT, FIRST OUTPUT CIRCUIT, AND SECOND OUTPUT CIRCUIT, DRIVING METHOD, GATE DRIVING CIRCUIT, AND DISPLAY DEVICE 有权
公开(公告)号：US20220114938A1
公开(公告)日：2022-04-14
申请号：US17555695
申请日：2021-12-20
申请人： HEFEI BOE JOINT TECHNOLOGY CO., LTD. , BOE TECHNOLOGY GROUP CO., LTD.
发明人： Xuehuan FENG , Yongqian LI
IPC分类号： G09G3/20
摘要： A shift register unit, a gate driving circuit, a display device, and a driving method are provided. The shift register unit includes an input circuit, a first control circuit, a blanking control circuit, a first output circuit, and a second output circuit. The input circuit is configured to control a level of a first node in response to an input signal input; the first control circuit is configured to control a level of the second node; the blanking control circuit is configured to control the level of the first node and the level of the second node; the first output circuit is configured to output a first output signal at the first output terminal under control of the level of the first node; and the second output circuit is configured to output a second output signal at the second output terminal under control of the level of the second node.

38. 发明申请

US20220068190A1 GATE DRIVING CIRCUIT, DISPLAY DEVICE AND REPAIR METHOD 有权
公开(公告)号：US20220068190A1
公开(公告)日：2022-03-03
申请号：US17417282
申请日：2020-11-04
申请人： HEFEI BOE JOINT TECHNOLOGY CO., LTD. , BOE TECHNOLOGY GROUP CO., LTD.
发明人： Xuehuan FENG , Yongqian LI
IPC分类号： G09G3/20 , G09G3/00
摘要： The present disclosure relates to a gate drive circuit. The gate drive circuit includes: cascaded GOA units, first clock signal lines, second clock signal lines, connecting lines and electrostatic protection sub-circuits. The first clock signal lines are used to provide various clock signals to the GOA units. The second clock signal lines are used to, when any of the clock signal lines is broken, replace the broken clock signal line to transmit a corresponding clock signal. The electrostatic protection sub-circuits are electrically connected to corresponding first clock signal lines or corresponding second clock signal lines through the connecting lines. Orthographic projections of the connecting lines on a plane where corresponding first clock signal lines or corresponding second clock signal lines are located intersect with the corresponding first clock signal lines and the corresponding second clock signal lines, respectively.

39. 发明申请

US20220020322A1 ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE 有权
公开(公告)号：US20220020322A1
公开(公告)日：2022-01-20
申请号：US17309360
申请日：2020-08-12
申请人： HEFEI BOE JOINT TECHNOLOGY CO., LTD. , BOE TECHNOLOGY GROUP CO., LTD.
发明人： Zhongyuan WU , Yongqian LI , Can YUAN , Xuehuan FENG , Zhidong YUAN
IPC分类号： G09G3/3225 , G11C19/28
摘要： An array substrate and a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate, and a GOA circuit, a source electrode IC and PLG wires arranged on the base substrate, and the PLG wires connect the GOA circuit with the source electrode IC. The GOA circuit transmits a GOA signal, and the GOA signal comprises a cascade signal and a non-cascade signal. The PLG wires comprise a first PLG wire group and at least one second PLG wire group, the first PLG wire group transmits the cascade signal, the second PLG wire group transmits the non-cascade signal, a line width of the first PLG wire group is smaller than that of the second PLG wire group, and the first PLG wire group is located at a side of the second PLG wire group distal to an active area of the base substrate.

40. 发明申请

US20210210017A1 SHIFT REGISTER UNIT, GATE DRIVING CIRCUIT, DISPLAY DEVICE AND DRIVING METHOD 有权
公开(公告)号：US20210210017A1
公开(公告)日：2021-07-08
申请号：US16643280
申请日：2019-03-01
申请人： HEFEI BOE JOINT TECHNOLOGY CO., LTD. , BOE TECHNOLOGY GROUP CO., LTD.
发明人： Xuehuan FENG , Yongqian LI
IPC分类号： G09G3/3258 , G11C19/28
摘要： A shift register unit, a gate driving circuit, a display device and a driving method. The shift register unit includes a blank input circuit, a blank pull-up circuit, a display input circuit, and an output circuit. The blank input circuit charges and holds the level of the pull-up control node, the blank pull-up circuit uses a first clock signal to charge a pull-up node, the display input circuit charges the pull-up node, and the output circuit outputs a plurality of output clock signals respectively to a plurality of output terminals. The plurality of output terminals include a shift signal output terminal and a plurality of pixel signal output terminals. The plurality of pixel signal output terminals are configured to respectively output a plurality of pixel signals to a plurality of rows of pixel units.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式