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    • 33. 发明授权
    • Power network stacked via removal for congestion reduction
    • 电力网通过拆除堆叠,减少拥塞
    • US07984397B2
    • 2011-07-19
    • US12359091
    • 2009-01-23
    • Yan LinYi-Min JiangLin Yuan
    • Yan LinYi-Min JiangLin Yuan
    • G06F17/50
    • G06F17/5081G06F17/5068G06F2217/78Y02E60/76Y04S40/22
    • A method of automatically reducing stacked vias while minimizing voltage drop in a power network of an integrated circuit (IC) is provided. In this method, any feasible (i.e. other than connectivity-necessary and uncongested stacked vias) stacked vias of the power network can be virtually removed. If a target voltage drop of the power network is exceeded, then a measurement of the severity of at least a maximum voltage drop on the IC can be updated. After this updating, a set of voltage drop improvement stacked vias can be virtually returned to the power network. The steps of determining whether the target voltage drop is exceeded, updating the severity of the voltage drop at one or more hot spots, and virtually returning the set of additional stacked vias can be repeated until the target voltage drop is not exceeded.
    • 提供一种在集成电路(IC)的电力网络中最小化电压降的同时自动减少堆叠通孔的方法。 在该方法中,可以虚拟地去除电力网络的任何可行的(即,不是连通性必需的和未占用的堆叠通孔)堆叠的通孔。 如果超过电力网络的目标电压降,则可以更新IC上至少最大电压降的严重程度。 在该更新之后,可以将一组降压改进的堆叠过孔实际返回给电力网络。 可以重复确定是否超过目标电压降的步骤,更新一个或多个热点处的电压降的严重性,以及实际返回该组附加堆叠通孔的步骤,直到不超过目标电压降。
    • 35. 发明申请
    • Biochip detection system
    • 生物芯片检测系统
    • US20050110998A1
    • 2005-05-26
    • US10866747
    • 2004-06-15
    • Yan LinTeh TaoZu ChowDing Liu
    • Yan LinTeh TaoZu ChowDing Liu
    • G01N21/64
    • G01N21/6428G01N21/6456G01N2021/6419G01N2021/6441G01N2201/0631
    • The present invention discloses a biochip detection system for detecting a biochip labeled with multiple fluorophores. The biochip detection system comprises a broadband light source for generating a light beam, a stand for supporting the biochip, a light integrator positioned between the broadband light source and the biochip, a lens set for adjusting the cross-sectional area of the light beam, a first filter module positioned on the optical path of the light beam, a detector, e.g., CCD camera, photodiode array, for detecting a fluorescence beam emitted from the biochip, and a second filter module positioned on the optical path of the fluorescence beam. The light integrator can be a light tunnel, a lens array or a holographic diffuser for uniforming the intensity distribution of the light beam and changing the cross-sectional shape of the light beam into a rectangle.
    • 本发明公开了一种用于检测用多种荧光团标记的生物芯片的生物芯片检测系统。 生物芯片检测系统包括用于产生光束的宽带光源,用于支撑生物芯片的支架,位于宽带光源和生物芯片之间的光积分器,用于调节光束横截面积的透镜组, 定位在光束的光路上的第一滤光器模块,用于检测从生物芯片发射的荧光束的CCD相机,光电二极管阵列的检测器和位于荧光束的光路上的第二滤光器模块。 光积分器可以是光通道,透镜阵列或全息漫射器,用于使光束的强度分布均匀并将光束的横截面形状改变成矩形。
    • 39. 发明授权
    • Timing variation aware compilation
    • 定时变异意识编译
    • US07469394B1
    • 2008-12-23
    • US11502320
    • 2006-08-09
    • Michael D. HuttonYan Lin
    • Michael D. HuttonYan Lin
    • G06F17/50G06F9/45
    • G06F8/41
    • Design compilation software uses statistical analysis techniques to account for variations in device attributes. A compilation phase determines statistical attributes of edges and other elements of device, such as the mean and variance values of attributes. A compilation phase evaluates the suitability of a potential configuration of the device using a cost function. The cost function can be based on one or more independent criteria of the design, such wiring or routing costs, timing costs, and power consumption costs. The compilation phase can include clustering, placement, and routing of the design. One or more of the cost function criteria can include statistical attributes of the device. The compilation software can use statistical attributes of the device to predict device yields for a design. The compilation software can also predict device yields of a design using devices of different speed bin classifications.
    • 设计编译软件使用统计分析技术来解释设备属性的变化。 汇编阶段确定设备边缘和其他元素的统计属性,如属性的均值和方差值。 编译阶段使用成本函数来评估设备的潜在配置的适用性。 成本函数可以基于设计的一个或多个独立标准,例如布线或布线成本,定时成本和功耗成本。 编译阶段可以包括设计的聚类,布局和布线。 一个或多个成本函数标准可以包括设备的统计属性。 编译软件可以使用设备的统计属性来预测设计的设备收益。 编译软件还可以使用不同速度仓分类的设备来预测设计的产量。