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    • 32. 发明授权
    • Systems and methods for providing over-current protection in a switching power supply
    • 在开关电源中提供过流保护的系统和方法
    • US07595615B2
    • 2009-09-29
    • US11396859
    • 2006-03-31
    • Qiong M. LiMichael Joseph TsecourasDale James SkeltonJames Teng
    • Qiong M. LiMichael Joseph TsecourasDale James SkeltonJames Teng
    • G06F1/573
    • H02M1/32H02M3/156H05B6/06Y10S323/908
    • A system and method is provided for providing integrated over-current protection in a switching power supply. In one embodiment, a switching power supply could comprise a gate drive circuit operative to receive a pulse-width modulated (PWM) signal and to drive at least one power field effect transistor (FET) between alternating activated and deactivated states based on a pulse-width of the PWM signal. The switching power supply could also comprise a current sense circuit operative to measure a current associated with the at least one power FET during the activated state. The switching power supply could also comprise a first over-current protection circuit providing a first adjustment to the PWM signal in response to the current being substantially between a first threshold and a second threshold. The second threshold could be greater than the first threshold. The switching power supply could further comprise a second over-current protection circuit providing a second adjustment to the PWM signal in response to the current being substantially greater than the second threshold.
    • 提供了一种用于在开关电源中提供集成的过电流保护的系统和方法。 在一个实施例中,开关电源可以包括栅极驱动电路,其操作以接收脉冲宽度调制(PWM)信号并且基于脉冲宽度调制(PWM)信号来驱动交替的激活和去激活状态之间的至少一个功率场效应晶体管(FET) PWM信号的宽度。 开关电源还可以包括电流检测电路,其可操作以在激活状态期间测量与至少一个功率FET相关联的电流。 开关电源还可以包括第一过电流保护电路,其响应于大体上在第一阈值和第二阈值之间的电流而向PWM信号提供第一调整。 第二阈值可能大于第一阈值。 开关电源还可以包括响应于电流基本上大于第二阈值而向PWM信号提供第二调整的第二过电流保护电路。
    • 33. 发明申请
    • System and Method for Increasing Availability of an Index
    • 增加索引可用性的系统和方法
    • US20070226235A1
    • 2007-09-27
    • US11277355
    • 2006-03-23
    • You-Chin FuhSauraj GoswamiJeffrey JostenJames Teng
    • You-Chin FuhSauraj GoswamiJeffrey JostenJames Teng
    • G06F7/00
    • G06F17/30371G06F17/30336G06F17/30368
    • A partial index availability system places, in a restricted state, all pages in the index associated with a structure modification, when an error occurs in processing a log of the said structure modification. This maintains traversability of the rest of the index that is not in restricted state. The system locates and marks a left sentinel and a right sentinel associated with a non-leaf page that is in a restricted state preventing an undo of a transaction. The sentinels prevent a transaction from accessing an uncommitted change associated with the non-leaf page. After a recovery procedure is run the entire index is made available. During the period between the placement of the index pages in LPL or rebuild pending to the time of final removal of these pages from their restrictive states as a result of a recovery procedure being run, the users are given access to the non-restricted portion of the index.
    • 当处理所述结构修改的日志时,部分索引可用性系统将处于受限状态的所有索引中的与结构修改相关联的所有页面放置。 这样可以保持索引的其余部分的遍历不受限制。 系统定位并标记与处于限制状态的非叶页面相关联的左前哨和右哨兵,以防止撤消交易。 哨兵防止事务访问与非叶页面相关联的未提交的更改。 运行恢复过程后,整个索引可用。 在LPL中的索引页面的放置期间或由于正在运行恢复过程而将这些页面从其限制性状态最终移除到最终删除的时间期间,用户被访问到非限制部分 指数。
    • 35. 发明申请
    • Transistor overcurrent detection circuit with improved response time
    • 晶体管过流检测电路具有改善的响应时间
    • US20070171591A1
    • 2007-07-26
    • US11339786
    • 2006-01-25
    • Cetin KayaJames TengClaus Neesgaard
    • Cetin KayaJames TengClaus Neesgaard
    • H02H3/00
    • H03K17/082
    • A circuit and method for determining overcurrent in a FET detects an output voltage of the FET in both a positive and negative polarity. The related positive or negative currents through the FET can be measured to determine whether an overcurrent condition exists. By measuring positive and negative currents in the FET, the overcurrent detector can obtain twice as much information as when measuring a positive current alone, and can respond more readily to overcurrent conditions. The overcurrent detector avoids the constraints typically observed in cycle-by-cycle PWM control with single polarity Vds sensing, while permitting a relaxation in the timing requirements for current sensing. A spike suppression circuit also contributes to longer sensing intervals.
    • 用于确定FET中的过电流的电路和方法以正负极性检测FET的输出电压。 可以测量通过FET的相关正或负电流以确定是否存在过电流状况。 通过测量FET中的正电流和负电流,过电流检测器可以获得与单独测量正电流时相同的信息量的两倍,并且可以更容易地响应过电流条件。 过电流检测器避免了在单极性Vds感测的逐周期PWM控制中通常观察到的约束,同时允许电流感测的定时要求松弛。 尖峰抑制电路还有助于更长的感测间隔。
    • 38. 发明授权
    • Detection of DC output levels from a class D amplifier
    • 从D类放大器检测直流输出电平
    • US07078964B2
    • 2006-07-18
    • US10963239
    • 2004-10-12
    • Lars RisboJames Teng
    • Lars RisboJames Teng
    • H03F3/38
    • H03F3/217H03F1/52
    • A class AD audio amplifier system (10) with DC output detection logic (26) is disclosed. The amplifier system (10) includes multiple audio channels (20), each of which includes a pulse-width-modulator (PWM) (24). The DC detection logic (26) includes a sigma-delta modulator (60) and a digital low-pass filter (62) that monitors the PWM output signals from the PWM modulators (24). The sigma-delta modulator (60) operates at a first clock frequency, while the low-pass filter (62) operates at a much lower clock frequency, so that AC audio components, PWM harmonics, and sigma-delta quantization error is suppressed from the DC detection. The modulated filtered signal is compared against a threshold level (THRSH) to determine whether the amplitude of a DC component at the PWM output is sufficiently high to constitute a fault. If so, a fault detection signal (DC_DET) is issued, and the PWM modulators (24) are disabled to prevent unsafe conditions in the system (10).
    • 公开了具有DC输出检测逻辑(26)的AD类音频放大器系统(10)。 放大器系统(10)包括多个音频通道(20),每个音频通道包括脉宽调制器(PWM)(24)。 直流检测逻辑(26)包括一个Σ-Δ调制器(60)和数字低通滤波器(62),用于监视来自PWM调制器(24)的PWM输出信号。 Σ-Δ调制器(60)以第一时钟频率工作,而低通滤波器(62)以低得多的时钟频率工作,从而抑制AC音频分量,PWM谐波和Σ-Δ量化误差 直流检测。 将调制的滤波信号与阈值电平(THRSH)进行比较,以确定PWM输出处的DC分量的幅度是否足够高以构成故障。 如果是,则发出故障检测信号(DC_DET),并且PWM调制器(24)被禁用以防止系统(10)中的不安全状况。
    • 39. 发明申请
    • An Efficient Locking Protocol for Sub-Document Concurrency Control Using Prefix Encoded Node Identifiers in XML Databases
    • 使用XML数据库中的前缀编码节点标识符进行子文档并发控制的高效锁定协议
    • US20060004758A1
    • 2006-01-05
    • US10709416
    • 2004-05-04
    • James TengBrian VickeryGuogen Zhang
    • James TengBrian VickeryGuogen Zhang
    • G06F17/30
    • G06F17/30362
    • A system and method for concurrency control of hierarchically structured data is provided. Lock requests on a target node are processed by exploiting ancestor-descendant information encoded into prefix encoded node identifiers (IDs). A set of implicit locks on ancestor nodes along a path from an immediate parent of a target node to a root node is derived from an explicit lock request on a target node. A logical lock tree describing existing lock modes for ancestor nodes is consulted to determine compatibility with the derived set of implicit locks. If existing lock modes for ancestor nodes are compatible with the derived set of implicit locks, a lock request on a target node is granted. Otherwise, the lock request is denied. A lock release request follows the reverse process; a target node in a particular transaction is released, as are subsequent locks on its ancestors made by the same transaction.
    • 提供了一种用于分级结构化数据并发控制的系统和方法。 通过利用编码为前缀编码节点标识符(ID)的祖先 - 后代信息来处理目标节点上的锁定请求。 从目标节点的直接父节点到根节点的路径上的祖先节点上的一组隐式锁派生自目标节点上的显式锁定请求。 查询描述祖先节点的现有锁模式的逻辑锁树,以确定与导出的隐式锁定集的兼容性。 如果祖先节点的现有锁定模式与导出的隐式锁定集合兼容,则会授予目标节点上的锁定请求。 否则,锁请求被拒绝。 锁定释放请求遵循相反的过程; 特定事务中的目标节点被释放,同一事务由其祖先的后续锁也被释放。