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31. 发明申请

US20090179203A1 DISPLAY SUBSTRATE 有权
标题翻译：显示基板
公开(公告)号：US20090179203A1
公开(公告)日：2009-07-16
申请号：US12331138
申请日：2008-12-09
申请人： Hong-Long Ning , Chang-Oh Jeong , Je-Hun Lee , Yang-Ho Bae , Pil-Sang Yun , Hong-Sick Park , Joo-Ae Youn , Byeong-Beom Kim , Byeong-Jin Lee
发明人： Hong-Long Ning , Chang-Oh Jeong , Je-Hun Lee , Yang-Ho Bae , Pil-Sang Yun , Hong-Sick Park , Joo-Ae Youn , Byeong-Beom Kim , Byeong-Jin Lee
IPC分类号： H01L33/00 , H01L21/768 , G03F1/00 , G03F7/20
CPC分类号： G02F1/136286 , G02F2001/136295 , H01L27/124 , H01L29/41733 , H01L29/42384 , H01L29/4908
摘要： A display substrate includes an insulating substrate, a thin-film transistor (TFT), a pixel electrode, a signal line and a pad part. The insulating substrate has a display region and a peripheral region surrounding the display region. The TFT is in the display region of the insulating substrate. The pixel electrode is in the display region of the insulating substrate and electrically connected to the TFT. The signal line is on the insulating substrate and extends from the peripheral region toward the display region. The pad part is in the peripheral region and electrically connects to the signal line. The pad part is formed in a trench of the insulating substrate and includes a region that extends into the insulating substrate. Therefore, the signal line may be securely attached to the insulating substrate.
摘要翻译：显示基板包括绝缘基板，薄膜晶体管（TFT），像素电极，信号线和焊盘部分。绝缘基板具有显示区域和围绕显示区域的周边区域。 TFT位于绝缘基板的显示区域。像素电极在绝缘基板的显示区域中并与TFT电连接。信号线位于绝缘基板上，并从周边区域向显示区域延伸。焊盘部分在外围区域中并且电连接到信号线。衬垫部分形成在绝缘衬底的沟槽中，并且包括延伸到绝缘衬底中的区域。因此，信号线可以牢固地附接到绝缘基板。

32. 发明申请

US20080073674A1 Thin Film Transistor Array Panel and Method for Manufacturing the Same 有权
标题翻译：薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20080073674A1
公开(公告)日：2008-03-27
申请号：US11944130
申请日：2007-11-21
申请人： Beom-Seok Cho , Yang-Ho Bae , Je-Hun Lee , Chang-Oh Jeong
发明人： Beom-Seok Cho , Yang-Ho Bae , Je-Hun Lee , Chang-Oh Jeong
IPC分类号： H01L29/49
CPC分类号： G02F1/136286 , G02F2001/13629 , G02F2001/136295 , H01L27/3276 , Y10S438/924
摘要： The present invention provides a TFT array panel and a manufacturing method of the same, which has signal lines including a lower layer of an Al containing metal and an upper layer of a molybdenum alloy (Mo-alloy) comprising molybdenum (Mo) and at least one of niobium (Nb), vanadium (V), and titanium (Ti). Accordingly, undercut, overhang, and mouse bites which may arise in an etching process, are prevented, and TFT array panels that have signal lines having low resistivity and good contact characteristics are provided.
摘要翻译：本发明提供一种TFT阵列面板及其制造方法，其特征在于，具有含有Al的金属的下层和包含钼（Mo）的钼合金（Mo合金）的上层的信号线，至少包括铌（Nb），钒（V）和钛（Ti）之一。因此，防止在蚀刻工艺中可能出现的底切，突出和小鼠咬合，并且提供具有低电阻率和良好接触特性的信号线的TFT阵列面板。

33. 发明授权

US07276732B2 Thin film transistor array panel 有权
标题翻译：薄膜晶体管阵列面板
公开(公告)号：US07276732B2
公开(公告)日：2007-10-02
申请号：US11234470
申请日：2005-09-23
申请人： Je Hun Lee , Yang Ho Bae , Beom Seok Cho , Chang Oh Jeong
发明人： Je Hun Lee , Yang Ho Bae , Beom Seok Cho , Chang Oh Jeong
IPC分类号： H01L29/04
CPC分类号： H01L29/458 , G02F1/1368 , H01L27/12 , H01L27/124 , H01L27/1288
摘要： A thin film transistor array panel includes a source electrode and a drain electrode composed of a Mo alloy layer and a Cu layer, and an alloying element of the Mo alloy layer forms a nitride layer as a diffusion barrier against the Cu layer. The nitride layer can be formed between the Mo alloy layer and the Cu layer, between the Mo alloy layer and the semiconductor layer or in the Mo alloy layer. A method of fabricating a thin film transistor array panel includes forming a data line having a first conductive layer and a second conductive layer, the first conductive layer containing a Mo alloy and the second conductive layer containing Cu, and performing a nitrogen treatment so that an alloying element in the first conductive layer forms a nitride layer. The nitrogen treatment can be performed before forming the first conductive layer, after forming the first conductive layer, or during forming the first conductive layer.
摘要翻译：薄膜晶体管阵列面板包括由Mo合金层和Cu层构成的源电极和漏电极，Mo合金层的合金元素形成氮化物层作为对Cu层的扩散阻挡层。可以在Mo合金层和Cu层之间，Mo合金层和半导体层之间或Mo合金层中形成氮化物层。制造薄膜晶体管阵列面板的方法包括：形成具有第一导电层和第二导电层的数据线，所述第一导电层含有Mo合金，所述第二导电层含有Cu，并进行氮处理，使得第一导电层中的合金元素形成氮化物层。在形成第一导电层之前，在形成第一导电层之后，或者在形成第一导电层期间，可以进行氮处理。

34. 发明申请

US20070093005A1 Thin film transistor panel and method of manufacture 审中-公开
标题翻译：薄膜晶体管面板及其制造方法
公开(公告)号：US20070093005A1
公开(公告)日：2007-04-26
申请号：US11544738
申请日：2006-10-05
申请人： Joo-Han Kim , Soon-Kwon Lim , Hong-Sick Park , Shi-Yul Kim , Eun-Guk Lee , Yang-Ho Bae , Byeong-Jin Lee , Jong-Hyun Choung , Sun-Young Hong , Bong-Kyun Kim , Won-Suk Shin , Sung-Wook Kang
发明人： Joo-Han Kim , Soon-Kwon Lim , Hong-Sick Park , Shi-Yul Kim , Eun-Guk Lee , Yang-Ho Bae , Byeong-Jin Lee , Jong-Hyun Choung , Sun-Young Hong , Bong-Kyun Kim , Won-Suk Shin , Sung-Wook Kang
IPC分类号： H01L21/84 , H01L21/00 , H01L27/12 , H01L27/01 , H01L31/0392
CPC分类号： H01L27/124 , H01L21/32139 , H01L27/1288
摘要： A thin film transistor array panel includes a pixel electrode formed on a substrate, a gate line formed on the pixel electrode, a gate insulating film formed on the gate line, a semiconductor formed on the gate insulating film, a data line and a drain electrode formed on the gate insulating film, and a passivation layer formed on portions of the data line and the drain electrode. The gate line includes a first film formed on the same layer and with the same material as the pixel electrode and a second film formed on the first film.
摘要翻译：薄膜晶体管阵列面板包括形成在基板上的像素电极，形成在像素电极上的栅极线，形成在栅极线上的栅极绝缘膜，形成在栅极绝缘膜上的半导体，数据线和漏极形成在栅极绝缘膜上，以及形成在数据线和漏电极的部分上的钝化层。栅线包括形成在同一层上并具有与像素电极相同的材料的第一膜和形成在第一膜上的第二膜。

35. 发明申请

US20060269786A1 Wiring for display device and thin film transistor array panel including the same and method for manufacturing thereof 审中-公开
标题翻译：显示装置和薄膜晶体管阵列面板的布线及其制造方法
公开(公告)号：US20060269786A1
公开(公告)日：2006-11-30
申请号：US11437506
申请日：2006-05-18
申请人： Won-Suk Shin , Yang-Ho Bae , Hong-Sick Park
发明人： Won-Suk Shin , Yang-Ho Bae , Hong-Sick Park
IPC分类号： B32B19/00
CPC分类号： G02F1/136286 , G02F2001/136295 , H01L27/124 , H01L29/458 , H01L29/4908
摘要： A method of manufacturing a thin film transistor array panel, comprising forming a first signal line on a substrate, forming a gate insulating layer and a semiconductor layer on the first signal line in sequence, forming a second signal line on the gate insulating layer and the semiconductor layer, and forming a pixel electrode connected to the second signal layer. At least one of the first signal line and the second line comprise a first conductive oxide layer, a conductive layer containing silver (Ag), and a second conductive oxide layer formed at a lower temperature than that of the first conductive oxide layer.
摘要翻译：一种制造薄膜晶体管阵列面板的方法，包括在基板上形成第一信号线，在第一信号线上依次形成栅绝缘层和半导体层，在栅绝缘层上形成第二信号线，半导体层，并形成连接到第二信号层的像素电极。第一信号线和第二线中的至少一个包括第一导电氧化物层，含有银（Ag）的导电层和在比第一导电氧化物层低的温度下形成的第二导电氧化物层。

36. 发明申请

US20060205125A1 TFT substrate and display device having the same 失效
标题翻译： TFT基板和具有该TFT基板的显示装置
公开(公告)号：US20060205125A1
公开(公告)日：2006-09-14
申请号：US11371057
申请日：2006-03-08
申请人： Yang-Ho Bae , Chang-Oh Jeong , Min-Seok Oh , Je-Hun Lee , Beom-Seok Cho
发明人： Yang-Ho Bae , Chang-Oh Jeong , Min-Seok Oh , Je-Hun Lee , Beom-Seok Cho
IPC分类号： H01L21/84 , H01L21/00
CPC分类号： H01L29/4908 , H01L27/124 , H01L29/458
摘要： A TFT substrate includes a base substrate, a gate wiring formed on the base substrate, a gate insulation layer, an activation layer, an oxidation-blocking layer, a data wiring, a protection layer and a pixel electrode. The gate wiring includes a gate line and a gate electrode. The gate insulation layer is formed on the base substrate to cover the gate wiring. The activation layer is formed on the gate insulation layer. The oxidation-blocking layer is formed on the activation layer. The data wiring includes a data line, a source electrode and a drain electrode. The source and drain electrodes are disposed on the oxidation-blocking layer therefore lowering the on-current (“Ion”) for turning on the TFT and increasing the off-current (“Ioff”) for turning off the TFT due to the oxidation-blocking layer.
摘要翻译： TFT基板包括基底基板，形成在基底基板上的栅极布线，栅极绝缘层，激活层，氧化阻挡层，数据布线，保护层和像素电极。栅极布线包括栅极线和栅电极。栅极绝缘层形成在基底基板上以覆盖栅极布线。活化层形成在栅绝缘层上。氧化阻挡层形成在活化层上。数据线包括数据线，源电极和漏电极。源电极和漏电极设置在氧化阻挡层上，因此降低导通电流（“I”上“），以便导通TFT并增加截止电流（”I“ “），用于关闭由于氧化阻挡层而导致的TFT。

37. 发明申请

US20060113670A1 Multi-layer wiring, method of manufacturing the same and thin film transistor having the same 审中-公开
标题翻译：多层布线及其制造方法以及具有该多层布线的薄膜晶体管
公开(公告)号：US20060113670A1
公开(公告)日：2006-06-01
申请号：US11221492
申请日：2005-09-07
申请人： Je-Hun Lee , Beom-Seok Cho , Chang-Oh Jeong , Yang-Ho Bae
发明人： Je-Hun Lee , Beom-Seok Cho , Chang-Oh Jeong , Yang-Ho Bae
IPC分类号： H01L23/52
CPC分类号： H01L27/12 , H01L21/76838 , H01L23/5283 , H01L23/53209 , H01L29/4908 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： A multi-layer wiring for use with thin film transistors (TFTs), methods of manufacturing the multi-layer wiring, and TFTs employing the multi-layer wiring are provided. In one embodiment, the multi-layer wiring includes a main wiring and a sub-wiring on the main wiring. The main wiring includes a first metal and the sub-wiring includes an alloy wherein a majority of the alloy is the first metal. The multi-layer wiring can exhibit decreased electrical resistance and a reduced tendency to develop malfunctions such as hillocks or spiking. The multi-layer wiring can also exhibit improved contact characteristics with other conductive elements of TFT display devices.
摘要翻译：提供了用于薄膜晶体管（TFT）的多层布线，多层布线的制造方法以及采用多层布线的TFT。在一个实施例中，多层布线包括主布线和主布线上的副布线。主配线包括第一金属，并且子布线包括其中大部分合金是第一金属的合金。多层布线可以表现出降低的电阻和降低发展故障的倾向，如小丘或尖峰。多层布线也可以表现出与TFT显示装置的其它导电元件的接触特性的改善。

38. 发明申请

US20060050192A1 Thin film transistor array panel and method for manufacturing the same 失效
公开(公告)号：US20060050192A1
公开(公告)日：2006-03-09
申请号：US11180989
申请日：2005-07-12
申请人： Beom-Seok Cho , Yang-Ho Bae , Je-Hun Lee , Chang-Oh Jeong
发明人： Beom-Seok Cho , Yang-Ho Bae , Je-Hun Lee , Chang-Oh Jeong
IPC分类号： G02F1/136
CPC分类号： G02F1/136286 , G02F2001/13629 , G02F2001/136295 , H01L27/3276 , Y10S438/924
摘要： The present invention provides a TFT array panel and a manufacturing method of the same, which has signal lines including a lower layer of an Al containing metal and an upper layer of a molybdenum alloy (Mo-alloy) comprising molybdenum (Mo) and at least one of niobium (Nb), vanadium (V), and titanium (Ti). Accordingly, undercut, overhang, and mouse bites which may arise in an etching process, are prevented, and TFT array panels that have signal lines having low resistivity and good contact characteristics are provided.

39. 发明授权

US08273612B2 Display panel and method of manufacturing the same 有权
标题翻译：显示面板及其制造方法
公开(公告)号：US08273612B2
公开(公告)日：2012-09-25
申请号：US12981287
申请日：2010-12-29
申请人： Min-Seok Oh , Yang-Ho Bae , Pil-Sang Yun , Byeong-Beom Kim , Seung-Ha Choi , Sang-Gab Kim , Chang-Ho Jeong , Shin-Il Choi , Hong-Kee Chin , Yu-Gwang Jeong , Dong-Ju Yang
发明人： Min-Seok Oh , Yang-Ho Bae , Pil-Sang Yun , Byeong-Beom Kim , Seung-Ha Choi , Sang-Gab Kim , Chang-Ho Jeong , Shin-Il Choi , Hong-Kee Chin , Yu-Gwang Jeong , Dong-Ju Yang
IPC分类号： H01L21/84
CPC分类号： H01L27/12 , G02F2001/136295 , H01L27/124 , H01L29/458
摘要： In a display panel and a method of manufacturing the display panel, a gate line, a data line, and source and drain electrodes including a same material as the data line are formed on a substrate constituting the display panel, and the data line includes an aluminum based alloy containing sufficient nickel to inhibit corrosion during dry etching. The corrosion resistance of the AlNi-containing alloy helps prevent corrosion of the data line, the source electrode, and the drain electrode during selective dry etching that shapes these lines and electrodes.
摘要翻译：在显示面板和制造显示面板的方法中，在构成显示面板的基板上形成包括与数据线相同材料的栅极线，数据线以及源极和漏极，并且数据线包括铝基合金含有足够的镍以在干蚀刻期间抑制腐蚀。含有AlNi的合金的耐腐蚀性有助于防止在形成这些线和电极的选择性干蚀刻期间数据线，源电极和漏电极的腐蚀。

40. 发明申请

US20120037913A1 THIN-FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：US20120037913A1
公开(公告)日：2012-02-16
申请号：US13167668
申请日：2011-06-23
申请人： O-Sung SEO , Seong-Hun KIM , Yang-Ho BAE , Jean-Ho SONG
发明人： O-Sung SEO , Seong-Hun KIM , Yang-Ho BAE , Jean-Ho SONG
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/78618 , H01L29/458 , H01L29/66765
摘要： A thin-film transistor (TFT) and a method of manufacturing the same are disclosed herein. The TFT may include a gate electrode disposed on an insulating substrate, an insulating layer disposed on the insulating substrate and the gate electrode, an active layer pattern disposed on the insulating layer to overlap the gate electrode, a source electrode disposed on the insulating layer and at least part of which overlaps the active layer pattern, and a drain electrode which is separated from the source electrode and at least part of which overlaps the active layer pattern. A first ohmic contact layer pattern may be disposed between the active layer pattern and the source electrode and between the active layer pattern and the drain electrode. The first ohmic contact layer may have higher nitrogen content on its surface than in other portions of the first ohmic contact layer.
摘要翻译：本文公开了一种薄膜晶体管（TFT）及其制造方法。 TFT可以包括设置在绝缘基板上的栅电极，设置在绝缘基板上的绝缘层和栅电极，设置在绝缘层上的与栅电极重叠的有源层图案，设置在绝缘层上的源电极和其至少一部分与有源层图案重叠，以及与源电极分离并且其至少一部分与有源层图案重叠的漏电极。可以在有源层图案和源电极之间以及有源层图案和漏电极之间设置第一欧姆接触层图案。第一欧姆接触层在其表面上可以具有比在第一欧姆接触层的其它部分更高的氮含量。

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