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31. 发明授权

US06590694B2 Faraday rotator 失效
标题翻译：法拉第旋转器
公开(公告)号：US06590694B2
公开(公告)日：2003-07-08
申请号：US10112711
申请日：2002-04-02
申请人： Takeshi Matsushita , Mitsuteru Inoue , Hideki Kato , Akio Takayama
发明人： Takeshi Matsushita , Mitsuteru Inoue , Hideki Kato , Akio Takayama
IPC分类号： G02F109
CPC分类号： G02F1/09 , G02F2201/17 , G02F2203/02
摘要： A Faraday rotator is provided which obtains excellent optical characteristics with a small number of layers. In the Faraday rotator, a metal reflective film is formed on a substrate, then a first periodic dielectric multilayer film made of silicon dioxide SiO2 and tantalum pentaoxide Ta2O5, a magneto-optical thin film, and a second periodic dielectric multilayer film made of tantalum pentaoxide Ta2O5 and silicon dioxide SiO2 are formed sequentially. The number of layers of the first periodic dielectric multilayer film is larger than that of the second periodic dielectric multilayer film. Incident light from a polarizer passes through the periodic dielectric multilayer films, is reflected at the metal reflective film, returns through the periodic dielectric multilayer films, and passes through an analyzer to exit out.
摘要翻译：提供法拉第旋转器，其获得具有少量层的优异的光学特性。在法拉第旋转器中，在基板上形成金属反射膜，然后形成由二氧化硅SiO 2和五氧化钽Ta 2 O 5制成的第一周期性电介质多层膜，磁光薄膜和由五氧化钽制成的第二周期性电介质多层膜依次形成Ta2O5和二氧化硅SiO2。第一周期性电介质多层膜的层数大于第二周期性电介质多层膜的层数。来自偏振片的入射光通过周期性电介质多层膜，在金属反射膜处反射，通过周期性电介质多层膜返回，并通过分析仪退出。

32. 外观设计

USD474789S1 Binoculars 失效
公开(公告)号：USD474789S1
公开(公告)日：2003-05-20
申请号：US29160986
申请日：2002-05-21
申请人： Takeshi Matsushita
设计人： Takeshi Matsushita

33. 发明授权

US06426235B1 Method of manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US06426235B1
公开(公告)日：2002-07-30
申请号：US09689191
申请日：2000-10-12
申请人： Takeshi Matsushita , Shinichi Mizuno
发明人： Takeshi Matsushita , Shinichi Mizuno
IPC分类号： H01L2100
CPC分类号： H01L31/022425 , H01L31/022441 , H01L31/0682 , H01L31/1804 , Y02E10/547 , Y02P70/521 , Y10S438/96
摘要： The present invention provides a method of manufacturing a semiconductor device, particularly a solar cell, which is capable of forming a desired electrode pattern by a simple process at low cost. In the method, p-type semiconductor layers are formed on a silicon substrate, and a n-type semiconductor layer is formed on the p-type semiconductor layers, and partially removed in a predetermined pattern by laser abrasion to expose the p-type semiconductor layers, thereby forming an electrode pattern.
摘要翻译：本发明提供一种制造半导体器件的方法，特别是太阳能电池，其能够通过简单的工艺以低成本形成所需的电极图案。在该方法中，在硅衬底上形成p型半导体层，在p型半导体层上形成n型半导体层，并通过激光磨蚀以预定图案部分去除以暴露p型半导体从而形成电极图案。

34. 发明授权

US06214701B1 Semiconductor substrate and thin film semiconductor device, method of manufacturing the same, and anodizing apparatus 失效
标题翻译：半导体衬底和薄膜半导体器件，其制造方法和阳极氧化设备
公开(公告)号：US06214701B1
公开(公告)日：2001-04-10
申请号：US09215314
申请日：1998-12-18
申请人： Takeshi Matsushita , Misao Kusunoki , Takaaki Tatsumi
发明人： Takeshi Matsushita , Misao Kusunoki , Takaaki Tatsumi
IPC分类号： H01L2146
CPC分类号： H01L31/184 , H01L21/2007 , H01L21/7624 , H01L21/76259 , H01L31/1804 , Y02E10/544 , Y02E10/547 , Y02P70/521 , Y10S438/96 , Y10S438/977
摘要： A semiconductor substrate, a thin film semiconductor device, a manufacturing method thereof and an anodizing apparatus which can reduce the manufacturing cost and save the resources are provided. According to this invention, a semiconductor thin film is formed through a separation layer of a porous semiconductor on a substrate body of sapphire; the semiconductor thin film is separated from the porosity layer and used for a thin film semiconductor device; and the substrate body from which the semiconductor thin film is separated is used again after the separation layer attached thereto is removed by etching. Since sapphire has high strength, high rigidity, high resistance to wearing, high heat resistance, high abrasion resistance and high chemicals resistance, no deterioration and no damage occur even when the substrate body is repetitively used. Thus, the recycle frequency can be increased, and the reduction of the manufacturing cost and the saving of the resources can be promoted.
摘要翻译：提供了可以降低制造成本并节省资源的半导体衬底，薄膜半导体器件，其制造方法和阳极氧化设备。根据本发明，通过蓝宝石衬底主体上的多孔半导体的分离层形成半导体薄膜; 半导体薄膜与孔隙层分离并用于薄膜半导体器件; 并且在通过蚀刻去除附着于其上的分离层之后，再次使用分离有半导体薄膜的基板体。由于蓝宝石具有高强度，高刚性，高耐磨性，高耐热性，高耐磨性和高耐化学性，因此即使重复使用基板体也不会发生劣化和不损坏。因此，可以提高再循环频率，可以促进制造成本的降低和资源的节省。

35. 外观设计

USD439260S1 Binoculars 失效
公开(公告)号：USD439260S1
公开(公告)日：2001-03-20
申请号：US29116739
申请日：2000-01-11
申请人： Takeshi Matsushita
设计人： Takeshi Matsushita

36. 外观设计

USD432553S Focusing wheel for binoculars 失效
公开(公告)号：USD432553S
公开(公告)日：2000-10-24
申请号：US116740
申请日：2000-01-11
申请人： Takeshi Matsushita
设计人： Takeshi Matsushita

37. 发明授权

US5811348A Method for separating a device-forming layer from a base body 失效
标题翻译：从基体分离器件形成层的方法
公开(公告)号：US5811348A
公开(公告)日：1998-09-22
申请号：US595382
申请日：1996-02-01
申请人： Takeshi Matsushita , Hiroshi Tayanaka
发明人： Takeshi Matsushita , Hiroshi Tayanaka
IPC分类号： H01L21/8238 , H01L21/76 , H01L21/762 , H01L27/092 , H01L27/12 , H01L29/786 , H01L31/04 , H01L31/048 , H01L31/075 , H01L31/18 , H01S5/00 , H01S5/02 , H01L21/30
CPC分类号： H01L21/76251 , H01L21/02381 , H01L21/0245 , H01L21/02488 , H01L21/02513 , H01L21/02532 , H01L21/02658 , H01L21/02664 , H01L21/76259 , H01L31/048 , H01L31/077 , H01L31/1804 , H01L31/1892 , Y02E10/547 , Y02P70/521
摘要： A porous Si layer is formed on a single-crystal Si substrate, and then a p.sup.+ -type Si layer, p-type Si layer and n.sup.+ -type Si layer which all make up a solar cell layer. After a protective film is made on the n.sup.+ -type Si layer, the rear surface of the single-crystal Si substrate is bonded to a tool, and another tool is bonded to the front surface of the protective film. Then, the tools are pulled in opposite directions to mechanically rupture the porous Si layer and to separate the solar cell layer from the single-crystal substrate. The solar cell layer is subsequently sandwiched between two plastic substrates to make a flexible thin-film solar cell.
摘要翻译：在单晶Si衬底上形成多孔Si层，然后形成所有构成太阳能电池层的p +型Si层，p型Si层和n +型Si层。在n +型Si层上形成保护膜后，将单晶Si衬底的背面与刀具接合，另一工具与保护膜的前表面接合。然后，将工具沿相反方向拉动以机械破裂多孔Si层并将太阳能电池层与单晶衬底分开。随后将太阳能电池层夹在两个塑料基板之间以制造柔性薄膜太阳能电池。

38. 外观设计

USD377034S Digital camera 失效
公开(公告)号：USD377034S
公开(公告)日：1996-12-31
申请号：US49136
申请日：1996-01-18
申请人： Takeshi Matsushita
设计人： Takeshi Matsushita

39. 发明授权

US5581106A Semiconductor memory cell having information storage transistor and switching transistor 失效
公开(公告)号：US5581106A
公开(公告)日：1996-12-03
申请号：US541180
申请日：1995-10-11
申请人： Yutaka Hayashi , Takeshi Matsushita
发明人： Yutaka Hayashi , Takeshi Matsushita
IPC分类号： G11C11/405 , G11C11/404 , H01L21/8238 , H01L21/8242 , H01L27/092 , H01L27/108 , H01L29/786 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113
CPC分类号： H01L27/108 , G11C11/404
摘要： A semiconductor memory cell, or a semiconductor memory cell for ASICs, of the structure is provided which ensures stable transistor operation, which does not require a large-capacitance capacitor as required in conventional DRAMs, which ensures reliable reading and writing of information, that permits short-channel design, and that allows the cell area to be reduced. The semiconductor memory cell includes: an information storage transistor TR.sub.1 comprising a semiconductor channel layer Ch.sub.1, first and second conductive gates G.sub.1, G.sub.2, and first and second conductive layers L.sub.1, L.sub.2 ; and a switching transistor TR.sub.2 comprising a semiconductor channel forming region Ch.sub.2, a third conductive gate G.sub.3, and third and fourth conductive layers L.sub.3, L.sub.4, wherein the fourth conductive layer L.sub.4 is connected to the second conductive gate G.sub.2, the first conductive gate G.sub.1 and the third conductive gate G.sub.3 are connected to a first memory-cell-selection line, the first conductive layer L.sub.1 and the third conductive layer L.sub.3 are connected to a second memory-cell-selection line, the second conductive layer L.sub.2 is connected to a fixed potential, and the semiconductor channel forming region Ch.sub.2 is connected to a read/write selection line.

40. 发明授权

US5523254A Method for production of SOI transistor device and SOI transistor 失效
标题翻译：生产SOI晶体管器件和SOI晶体管的方法
公开(公告)号：US5523254A
公开(公告)日：1996-06-04
申请号：US230734
申请日：1994-04-21
申请人： Hiroshi Satoh , Yasunori Ohokubo , Takeshi Matsushita , Toshiyuki Nishihara , Makoto Hashimoto
发明人： Hiroshi Satoh , Yasunori Ohokubo , Takeshi Matsushita , Toshiyuki Nishihara , Makoto Hashimoto
IPC分类号： H01L29/772 , H01L21/762 , H01L23/544 , H01L27/108 , H01L21/76
CPC分类号： H01L23/544 , H01L21/76251 , H01L27/1082 , H01L27/10832 , H01L2223/54453 , H01L2924/0002 , Y10S148/012 , Y10S438/975 , Y10S438/977
摘要： A wafer bonding method for forming a SOI structure comprising the steps of bringing wafers into proximity in a state with one wafer a slight, substantially uniform clearance away from the other wafer and pressing one point of at least one wafer of the two wafers against the other wafer. In another aspect of the invention, there is provided a method of positioning for photolithography using an alignment mark portions and/or a vernier portions formed on a SOI substrate, which comprises the step of removing semiconductor layer portions corresponding to the alignment mark portions and/or the vernier portions. In further another aspect of the invention, there is provided a new DRAM semiconductor device formed by using SOI structure, which comprises a new pattern of a strage node formed longitudinally along a word line. Further, there is provided a new DRAM semiconductor device formed by using SOI structure, which comprises a unique strage node having a conductive side wall.
摘要翻译：一种用于形成SOI结构的晶片接合方法，包括以下步骤：使晶片在与一个晶片的状态相接近的状态下与另一个晶片略微，基本上均匀的间隙，并将两个晶片的至少一个晶片的一个点压在另一个晶片上晶圆。在本发明的另一方面，提供了一种使用在SOI衬底上形成的对准标记部分和/或游标部分进行光刻定位的方法，其包括以下步骤：去除对准标记部分对应的半导体层部分和/ 或游标部分。在本发明的另一方面，提供了一种通过使用SOI结构形成的新的DRAM半导体器件，其包括沿字线纵向形成的栅格节点的新图案。此外，提供了通过使用SOI结构形成的新的DRAM半导体器件，其包括具有导电侧壁的独特的栅栏节点。

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