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31. 发明申请

US20120126355A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE AND SUBSTRATE PROCESSING APPARATUS 有权
标题翻译：制造半导体器件，半导体器件和衬底加工设备的方法
公开(公告)号：US20120126355A1
公开(公告)日：2012-05-24
申请号：US13293636
申请日：2011-11-10
申请人： Norikazu Mizuno , Tomohide Kato , Takaaki Noda
发明人： Norikazu Mizuno , Tomohide Kato , Takaaki Noda
IPC分类号： H01L31/0232 , C23C16/46
CPC分类号： H01L27/14685 , C23C16/40 , C23C16/45534 , C23C16/45542 , C23C16/45544 , C23C16/45555 , C23C16/45557 , C23C16/52 , H01L21/02172 , H01L21/022 , H01L21/02205 , H01L21/02211 , H01L21/0223 , H01L21/02274 , H01L21/0228 , H01L27/1462 , H01L27/14627 , H01L31/0216 , H01L31/02161 , H01L31/02327
摘要： An oxide film capable of suppressing reflection of a lens is formed under a low temperature. A method of manufacturing a semiconductor device includes: (a) forming a lower layer oxide film on a lens formed on a substrate using a first processing source containing a first element, a second processing source containing a second element, an oxidizing source and a catalyst, the lower layer oxide film having a refractive index greater than that of air and less than that of the lens; and (b) forming an upper layer oxide film on the lower layer oxide film using the first processing source, the oxidizing source and the catalyst, the upper layer oxide film having a refractive index greater than that of the air and less than that of the lower layer oxide film.
摘要翻译：在低温下形成能够抑制透镜反射的氧化膜。一种制造半导体器件的方法包括：（a）使用包含第一元件的第一处理源，包含第二元件的第二处理源，氧化源和催化剂在形成在基板上的透镜上形成下层氧化膜，所述下层氧化膜的折射率大于空气的折射率，并且小于所述透镜的折射率; 和（b）使用第一处理源，氧化源和催化剂在下层氧化膜上形成上层氧化膜，上层氧化膜的折射率大于空气的折射率，并且小于下层氧化膜。

32. 发明授权

US08178428B2 Manufacturing method of semiconductor device and substrate processing apparatus 有权
标题翻译：半导体器件和衬底处理设备的制造方法
公开(公告)号：US08178428B2
公开(公告)日：2012-05-15
申请号：US12656415
申请日：2010-01-28
申请人： Takaaki Noda , Jie Wang , Kazuaki Tonari , Satoru Sugiyama
发明人： Takaaki Noda , Jie Wang , Kazuaki Tonari , Satoru Sugiyama
IPC分类号： H01L21/20
CPC分类号： H01L21/02425 , C23C16/0272 , C23C16/24 , H01L21/0245 , H01L21/02532 , H01L21/02579 , H01L21/0262
摘要： A manufacturing method of a semiconductor device is provided, comprising: loading a substrate into a processing chamber; forming a first film on the substrate by supplying silicon atom-containing gas, boron atom-containing gas, and germanium atom-containing gas into the processing chamber; forming a second film on the first film by supplying the silicon atom-containing gas and the boron atom-containing gas into the processing chamber; and unloading the substrate from the processing chamber.
摘要翻译：提供一种半导体器件的制造方法，包括：将衬底装载到处理室中; 通过将含硅原子的气体，含硼原子的气体和含锗原子的气体供给到所述处理室中，在所述基板上形成第一膜; 通过将含硅原子的气体和含硼原子的气体供给到处理室中，在第一膜上形成第二膜; 并从处理室卸载基板。

33. 发明申请

US20110045675A1 SUBSTRATE PROCESSING APPARATUS AND PRODUCING METHOD OF SEMICONDUCTOR DEVICE 审中-公开
标题翻译：基板加工装置及半导体器件的制造方法
公开(公告)号：US20110045675A1
公开(公告)日：2011-02-24
申请号：US12916920
申请日：2010-11-01
申请人： Hironobu MIYA , Taketoshi Sato , Norikazu Mizuno , Masanori Sakai , Takaaki Noda
发明人： Hironobu MIYA , Taketoshi Sato , Norikazu Mizuno , Masanori Sakai , Takaaki Noda
IPC分类号： H01L21/30 , C23C16/455
CPC分类号： C23C16/45536 , C23C16/345 , C23C16/452 , H01L21/0217 , H01L21/02211 , H01L21/02274 , H01L21/0228 , H01L21/3141 , H01L21/3185 , H01L21/67017 , H01L21/67109
摘要： Disclosed is a substrate processing apparatus, comprising a processing chamber, a holder to hold at least a plurality of product substrates, a heating member, a supplying member to alternately supply at least a first reactant and a second reactant, and a control unit, wherein the control unit executes forming thin films on the substrates by supplying the first reactant, removing a surplus of the first reactant after the first reactant has been adsorbed on the product substrates, subsequently supplying the second reactant, to cause the second reactant to react with the first reactant adsorbed on the substrates, and executes the forming the thin films in a state where a number of the product substrates is insufficient when a number of the product substrates is less than a maximum number of the product substrates which can be held by the holder.
摘要翻译：公开了一种基板处理装置，包括处理室，用于保持至少多个产品基板的保持器，加热构件，供应构件以交替地供应至少第一反应物和第二反应物，以及控制单元，其中所述控制单元通过供给所述第一反应物，在所述基板上形成薄膜，在所述第一反应物被吸附在所述产物基板上之后除去剩余的所述第一反应物，随后供给所述第二反应物，以使所述第二反应物与所述第二反应物反应第一反应物吸附在基板上，并且当产品基板的数量少于可由保持件保持的产品基板的最大数量时，在多个产品基板不足的状态下执行薄膜的形成。

34. 发明授权

US07892983B2 Substrate processing apparatus and producing method of semiconductor device 有权
标题翻译：基板加工装置及半导体装置的制造方法
公开(公告)号：US07892983B2
公开(公告)日：2011-02-22
申请号：US11664726
申请日：2005-10-05
申请人： Hironobu Miya , Taketoshi Sato , Norikazu Mizuno , Masanori Sakai , Takaaki Noda
发明人： Hironobu Miya , Taketoshi Sato , Norikazu Mizuno , Masanori Sakai , Takaaki Noda
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： C23C16/45536 , C23C16/345 , C23C16/452 , H01L21/0217 , H01L21/02211 , H01L21/02274 , H01L21/0228 , H01L21/3141 , H01L21/3185 , H01L21/67017 , H01L21/67109
摘要： Disclosed is a substrate processing apparatus, comprising a processing chamber, a holder to hold at least a plurality of product substrates, a heating member, a supplying member to alternately supply at least a first reactant and a second reactant, and a control unit, wherein the control unit executes forming thin films on the substrates by supplying the first reactant, removing a surplus of the first reactant after the first reactant has been adsorbed on the product substrates, subsequently supplying the second reactant, to cause the second reactant to react with the first reactant adsorbed on the substrates, and executes the forming the thin films in a state where a number of the product substrates is insufficient when a number of the product substrates is less than a maximum number of the product substrates which can be held by the holder.
摘要翻译：公开了一种基板处理装置，包括处理室，用于保持至少多个产品基板的保持器，加热构件，供应构件以交替地供应至少第一反应物和第二反应物，以及控制单元，其中所述控制单元通过供给所述第一反应物，在所述基板上形成薄膜，在所述第一反应物被吸附在所述产物基板上之后除去剩余的所述第一反应物，随后供给所述第二反应物，以使所述第二反应物与所述第二反应物反应第一反应物吸附在基板上，并且当产品基板的数量少于可由保持件保持的产品基板的最大数量时，在多个产品基板不足的状态下执行薄膜的形成。

35. 发明申请

US20100317174A1 Manufacturing method of semiconductor device and substrate processing apparatus 有权
标题翻译：半导体器件和衬底处理设备的制造方法
公开(公告)号：US20100317174A1
公开(公告)日：2010-12-16
申请号：US12656415
申请日：2010-01-28
申请人： Takaaki Noda , Jie Wang , Kazuaki Tonari , Satoru Sugiyama
发明人： Takaaki Noda , Jie Wang , Kazuaki Tonari , Satoru Sugiyama
IPC分类号： H01L21/205
CPC分类号： H01L21/02425 , C23C16/0272 , C23C16/24 , H01L21/0245 , H01L21/02532 , H01L21/02579 , H01L21/0262
摘要： A manufacturing method of a semiconductor device is provided, comprising: loading a substrate into a processing chamber; forming a first film on the substrate by supplying silicon atom-containing gas, boron atom-containing gas, and germanium atom-containing gas into the processing chamber; forming a second film on the first film by supplying the silicon atom-containing gas and the boron atom-containing gas into the processing chamber; and unloading the substrate from the processing chamber.
摘要翻译：提供一种半导体器件的制造方法，包括：将衬底装载到处理室中; 通过将含硅原子的气体，含硼原子的气体和含锗原子的气体供给到所述处理室中，在所述基板上形成第一膜; 通过将含硅原子的气体和含硼原子的气体供给到处理室中，在第一膜上形成第二膜; 并从处理室卸载基板。

36. 发明申请

US20090205567A1 Method of manufacturing semiconductor device and apparatus for processing substrate 审中-公开
公开(公告)号：US20090205567A1
公开(公告)日：2009-08-20
申请号：US12385662
申请日：2009-04-15
申请人： Takaaki Noda , Kenichi Suzaki
发明人： Takaaki Noda , Kenichi Suzaki
IPC分类号： B05C11/10
CPC分类号： C23C16/4408 , C23C16/24 , H01L21/02532 , H01L21/02579 , H01L21/0262
摘要： A process for producing a semiconductor device, in which in the formation of a boron doped silicon film from, for example, monosilane and boron trichloride by vacuum CVD technique, there can be produced a film excelling in inter-batch homogeneity with respect to the growth rate and concentration of a dopant element, such as boron. The process includes the step of performing the first purge through conducting at least once of while a substrate after treatment is housed in a reaction furnace, vacuuming of the reaction furnace and inert gas supply thereto and the steps of performing the second purge through conducting at least once of after carrying of the substrate after treatment out of the reaction furnace, prior to carrying of a substrate to be next treated into the reaction furnace and while at least no product substrate is housed in the reaction furnace, vacuuming of the reaction furnace and inert gas supply thereto.

37. 发明授权

US07556839B2 Method of manufacturing semiconductor device and apparatus for processing substrate 有权
标题翻译：半导体装置的制造方法以及基板的处理装置
公开(公告)号：US07556839B2
公开(公告)日：2009-07-07
申请号：US10587500
申请日：2005-03-28
申请人： Takaaki Noda , Kenichi Suzaki
发明人： Takaaki Noda , Kenichi Suzaki
IPC分类号： C23C16/00 , C23C16/22
CPC分类号： C23C16/4408 , C23C16/24 , H01L21/02532 , H01L21/02579 , H01L21/0262
摘要： A process for producing a semiconductor device, in which in the formation of a boron doped silicon film from, for example, monosilane and boron trichloride by vacuum CVD technique, there can be produced a film excelling in inter-batch homogeneity with respect to the growth rate and concentration of a dopant element, such as boron. The process includes the step of performing the first purge through conducting at least once of while a substrate after treatment is housed in a reaction furnace, vacuuming of the reaction furnace and inert gas supply thereto and the steps of performing the second purge through conducting at least once of after carrying of the substrate after treatment out of the reaction furnace, prior to carrying of a substrate to be next treated into the reaction furnace and while at least no product substrate is housed in the reaction furnace, vacuuming of the reaction furnace and inert gas supply thereto.
摘要翻译：一种制造半导体器件的方法，其中在通过真空CVD技术从例如甲硅烷和三氯化硼形成硼掺杂硅膜的过程中，可以产生相对于生长的批间同质性优异的膜速率和掺杂元素如硼的浓度。该方法包括以下步骤：通过将处理后的基板容纳在反应炉中，进行至少一次的进行第一吹扫，反应炉的抽真空和惰性气体的供给以及通过至少导通进行第二吹扫的步骤在将反应炉中处理后的基板一次运送到反应炉之前，在将待处理的基板运送到反应炉中之前，并且至少没有将产物基板容纳在反应炉中，将反应炉抽真空并且惰性供气。

38. 发明申请

US20090117752A1 Semiconductor device manufacturing method and substrate processing apparatus 有权
标题翻译：半导体装置的制造方法和基板处理装置
公开(公告)号：US20090117752A1
公开(公告)日：2009-05-07
申请号：US11667078
申请日：2005-11-02
申请人： Takashi Ozaki , Osamu Kasahara , Takaaki Noda , Kiyohiko Maeda , Atsushi Moriya , Minoru Sakamoto
发明人： Takashi Ozaki , Osamu Kasahara , Takaaki Noda , Kiyohiko Maeda , Atsushi Moriya , Minoru Sakamoto
IPC分类号： H01L21/02 , F23N5/22
CPC分类号： C23C16/54 , C23C16/4408 , C30B25/02 , C30B29/06 , H01L21/02046 , H01L21/02532 , H01L21/0262 , H01L21/02658 , H01L21/67017 , H01L21/67109
摘要： A high quality interface is formed at a low oxygen-carbon density between a substrate and a thin film while preventing heat damage on the substrate and increase of thermal budget. This method includes a step of loading a wafer into a reaction furnace, a step of pretreating the wafer in the reaction furnace, a step of performing a main processing of the pretreated wafer in the reaction furnace, and a step of unloading the wafer from the reaction furnace after the main processing. Hydrogen gas is continuously supplied to the reaction furnace in the period from the end of the pretreating step to the start of the main processing and at least during vacuum-exhausting an interior of the reaction furnace.
摘要翻译：在基板和薄膜之间以低的氧 - 碳密度形成高质量的界面，同时防止对基板的热损伤并增加热预算。该方法包括将晶片装载到反应炉中的步骤，在反应炉中预处理晶片的步骤，在反应炉中进行预处理的晶片的主要处理的步骤，以及将晶片从反应炉主要加工后。在从预处理步骤结束到主处理开始的时段内，至少在反应炉内部真空排气期间，将氢气连续供给到反应炉。

39. 发明授权

US06905963B2 Fabrication of B-doped silicon film by LPCVD method using BCI3 and SiH4 gases 有权
标题翻译：通过使用BCI3和SiH4气体的LPCVD方法制造B掺杂硅膜
公开(公告)号：US06905963B2
公开(公告)日：2005-06-14
申请号：US10255715
申请日：2002-09-27
申请人： Takaaki Noda , Akira Morohashi , Junji Asahi
发明人： Takaaki Noda , Akira Morohashi , Junji Asahi
IPC分类号： C23C16/24 , C23C16/452 , C23C16/46 , H01L21/3205 , H01L21/44
CPC分类号： C23C16/452 , C23C16/24 , C23C16/46 , H01L21/32055 , Y10S438/925 , Y10S438/935
摘要： A semiconductor device fabricating method for forming a boron doped silicon film includes the step of forming the boron doped silicon film on a substrate at an inner temperature of the reaction furnace ranging from about 460 to 600° C. or at an average velocity of reaction gases in the reaction furnace being not great than about 2200 cm/min. Further, a substrate processing apparatus for forming a boron doped silicon film on a substrate includes a gas supply line for supplying BCl3 to the reaction furnace. The gas supply line is installed in a portion of the reaction furnace opposite to a heater, and has an outlet for discharging BCl3. The outlet of the gas supply line is provided at an upstream side of gas flow in the reaction furnace.
摘要翻译：用于形成硼掺杂硅膜的半导体器件制造方法包括以下步骤：在反应炉的内部温度范围为约460-600℃或以平均反应气体速度在基底上形成硼掺杂硅膜在反应炉中不大于约2200cm / min。此外，在衬底上形成硼掺杂硅膜的衬底处理设备包括用于向反应炉供应BCl 3的气体供应管线。气体供给管线安装在与加热器相对的一部分反应炉中，并具有用于排出BCl 3 3的出口。气体供给管路的出口设置在反应炉内气流的上游侧。

40. 发明授权

US4994688A Semiconductor device having a reference voltage generating circuit 失效
标题翻译：具有基准电压发生电路的半导体装置
公开(公告)号：US4994688A
公开(公告)日：1991-02-19
申请号：US323966
申请日：1989-03-15
申请人： Masashi Horiguchi , Masakazu Aoki , Kiyoo Itoh , Yoshinobu Nakagome , Norio Miyake , Takaaki Noda , Jun Etoh , Hitoshi Tanaka , Shin'ichi Ikenaga
发明人： Masashi Horiguchi , Masakazu Aoki , Kiyoo Itoh , Yoshinobu Nakagome , Norio Miyake , Takaaki Noda , Jun Etoh , Hitoshi Tanaka , Shin'ichi Ikenaga
IPC分类号： G05F1/46 , G05F3/24 , G11C5/14 , G11C11/4074 , H01L27/02
CPC分类号： G11C5/147 , G05F1/465 , G05F3/245 , G05F3/247 , G11C11/4074 , H01L27/0203 , Y10S323/907
摘要： Practical structures of an ultra large scale semiconductor integrated (ULSI) circuit especially a dynamic random access memory of 16 M bits or more are involved. The ULSI circuit uses internal operating voltages and how to construct a reference voltage generating circuit and a voltage limiter circuit in the ULSI circuit is a matter of importance. The operation of the reference voltage generating circuit and voltage limiter circuit can be stabilized, characteristics of these circuits are improved, and layout of these circuits as applied to memory cell array, peripheral circuits and the like can be improved. Improved methods of testing these circuits are provided.
摘要翻译：涉及超大规模半导体集成（ULSI）电路的实际结构，特别是16M位以上的动态随机存取存储器。 ULSI电路使用内部工作电压，并且如何构造参考电压发生电路，并且ULSI电路中的限压器电路是重要的。可以使参考电压发生电路和限压器电路的动作稳定，提高这些电路的特性，能够提高应用于存储单元阵列，外围电路等的这些电路的布局。提供了改进的测试这些电路的方法。

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