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31. 发明申请

US20110175449A1 POWER SUPPLY CIRCUIT 有权
标题翻译：电源电路
公开(公告)号：US20110175449A1
公开(公告)日：2011-07-21
申请号：US13008414
申请日：2011-01-18
申请人： Shigeto KOBAYASHI , Kouichi Yamada , Yoshitaka Ueda , Atsushi Wada
发明人： Shigeto KOBAYASHI , Kouichi Yamada , Yoshitaka Ueda , Atsushi Wada
IPC分类号： H02J1/10
CPC分类号： H02J1/08 , G06F1/26 , H03K19/0175 , H03L5/00 , Y10T307/50
摘要： A power supply circuit generates the internal power supply voltage intVCC from a first power supply capable of supplying a first power supply voltage V1 and a second power supply capable of supplying a second power supply voltage V2, which is lower than the first power supply voltage V1. A first transistor TR1 is provided between the first power supply and an output node, whereas a second transistor TR2 is provided between the second power supply and the output node. A first supply unit supplies the inverted value of an output voltage of the first power supply or the inverted value of a voltage corresponding to the output voltage of the first power supply, to the gate input of the first transistor TR1. A second supply unit supplies the output voltage of the first power supply or the voltage corresponding to the output voltage of the first power supply, to the gate input of the second transistor TR2.
摘要翻译：电源电路从能够提供第一电源电压V1的第一电源和能够提供低于第一电源电压V1的第二电源电压V2的第二电源产生内部电源电压intVCC 。第一晶体管TR1设置在第一电源和输出节点之间，而第二晶体管TR2设置在第二电源和输出节点之间。第一供电单元将第一电源的输出电压的反相值或与第一电源的输出电压对应的电压的反相值提供给第一晶体管TR1的栅极输入。第二供应单元将第一电源的输出电压或与第一电源的输出电压相对应的电压提供给第二晶体管TR2的栅极输入。

32. 发明申请

US20090033534A1 ANALOG-TO-DIGITAL CONVERTER FOR CONVERTING INPUT ANALOG SIGNAL INTO DIGITAL SIGNAL THROUGH MULTIPLE CONVERSION PROCESSINGS 有权
标题翻译：用于通过多个转换处理将输入模拟信号转换为数字信号的模拟数字转换器
公开(公告)号：US20090033534A1
公开(公告)日：2009-02-05
申请号：US12183615
申请日：2008-07-31
申请人： Shigeto Kobayashi , Atsushi Wada
发明人： Shigeto Kobayashi , Atsushi Wada
IPC分类号： H03M1/66
CPC分类号： H03M1/0607 , H03M1/0695 , H03M1/162 , H03M1/167 , H03M1/362 , H03M1/804
摘要： A sub-A-D converter circuit converts a sampled analog signal into a digital signal of a predetermined number of bits. a D-A converter circuit converts the digital signal converted by the sub-A-D converter circuit into an analog signal to generate a residual signal to be processed by a subsequent conversion processing where the analog signal is to be removed from an analog signal to be sampled by the sub-A-D converter circuit. The D-A converter circuit is of a capacitor array type, and an offset compensation voltage used to compensate for at least part of an offset voltage added to the analog signal sampled by the sub-A-D converter circuit is supplied to at least one capacitor in the capacitor array.
摘要翻译：子A-D转换器电路将采样的模拟信号转换成预定位数的数字信号。 DA转换器电路将由副AD转换器电路转换的数字信号转换为模拟信号，以产生要通过随后的转换处理来处理的残留信号，其中模拟信号将从要由模拟信号采样的模拟信号中去除 sub-AD转换电路。 DA转换器电路是电容器阵列型，并且用于补偿添加到由亚AD转换器电路采样的模拟信号的偏移电压的至少一部分的偏移补偿电压被提供给电容器中的至少一个电容器数组。

33. 发明授权

US07474238B2 Analog-to-digital converter 有权
标题翻译：模数转换器
公开(公告)号：US07474238B2
公开(公告)日：2009-01-06
申请号：US11700130
申请日：2007-01-31
申请人： Shigeto Kobayashi
发明人： Shigeto Kobayashi
IPC分类号： H03M1/10
CPC分类号： H03M1/007 , H03M1/162 , H03M1/167
摘要： An A-D converter includes a group of resistors, a group of comparators, an encoder and an output unit. The output unit includes a correction circuit. An inverter constitutes the correction circuit. The encoder is shared in a case where the A-D converter converts an inputted analog signal to a two-bit binary code and a case where the A-D converter converts the inputted analog signal to a 4-bit binary code. The correction circuit corrects the output of the encoder when the A-D converter is to convert the inputted analog signal to the 2-bit binary code.
摘要翻译： A-D转换器包括一组电阻器，一组比较器，编码器和输出单元。输出单元包括校正电路。逆变器构成校正电路。在A-D转换器将输入的模拟信号转换为2位二进制码的情况下和A-D转换器将输入的模拟信号转换为4位二进制码的情况下，共享编码器。当A-D转换器将输入的模拟信号转换为2位二进制码时，校正电路校正编码器的输出。

34. 发明申请

US20080079492A1 Differential amplifier 有权
标题翻译：差分放大器
公开(公告)号：US20080079492A1
公开(公告)日：2008-04-03
申请号：US11902557
申请日：2007-09-24
申请人： Shigeto Kobayashi , Atsushi Wada
发明人： Shigeto Kobayashi , Atsushi Wada
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F1/26 , H03F3/45475 , H03F2200/372 , H03F2203/45508 , H03F2203/45534 , H03F2203/45726 , H03M1/0881 , H03M1/167
摘要： Connected to a differential transistor pair are a load current source and a tail current source. A bias circuit controls current generated by the load current source. A first self-bias switch is provided between a gate and a drain of a first input transistor; and a second self-bias switch is provided between a gate and a drain of a second input transistor, where the first input transistor and the second input transistor constitute the differential transistors pair. An external bias switch is provided between the bias circuit and the load current source.
摘要翻译：连接到差分晶体管对的是负载电流源和尾电流源。偏置电路控制负载电流源产生的电流。第一自偏压开关设置在第一输入晶体管的栅极和漏极之间; 并且第二自偏压开关设置在第二输入晶体管的栅极和漏极之间，其中第一输入晶体管和第二输入晶体管构成差分晶体管对。在偏置电路和负载电流源之间提供外部偏置开关。

35. 发明授权

US07248199B2 Analog-to-digital converter 有权
标题翻译：模数转换器
公开(公告)号：US07248199B2
公开(公告)日：2007-07-24
申请号：US11367792
申请日：2006-03-03
申请人： Takashi Asano , Atsushi Wada , Shigeto Kobayashi
发明人： Takashi Asano , Atsushi Wada , Shigeto Kobayashi
IPC分类号： H03M1/34
CPC分类号： H03M1/167 , H03M1/1205
摘要： In an analog-to-digital (A-D) converter, an A-D conversion circuit samples an analog signal and converts it to a digital value of a predetermined bit number less than a targeted bit number. An amplifier circuit is provided in parallel to the A-D conversion circuit, and holds the signal sampled by the A-D conversion circuit or amplifies it by a predetermined gain. A first source follower circuit for the amplifier circuit and a second source follower circuit for the A-D conversion circuit are provided separately at the output side of a sample-and-hold circuit.
摘要翻译：在模数（A-D）转换器中，A-D转换电路对模拟信号进行采样并将其转换成小于目标位数的预定位数的数字值。放大器电路与A-D转换电路并联提供，并且保持由A-D转换电路采样的信号或将其放大预定的增益。用于放大器电路的第一源极跟随器电路和用于A-D转换电路的第二源极跟随器电路分别设置在采样保持电路的输出侧。

36. 发明授权

US07119729B2 Analog-digital converter optimized for high speed operation 有权
标题翻译：模数转换器为高速运行而优化
公开(公告)号：US07119729B2
公开(公告)日：2006-10-10
申请号：US11060306
申请日：2005-02-18
申请人： Atsushi Wada , Kuniyuki Tani , Shigeto Kobayashi
发明人： Atsushi Wada , Kuniyuki Tani , Shigeto Kobayashi
IPC分类号： H03M1/38
CPC分类号： H03M1/164 , H03M1/162
摘要： A first analog-digital converter circuit in a preceding stage converts an input analog signal into a digital value and retrieves the higher 4 bits. A second analog-digital converter circuit in a subsequent stage converts an input analog signal into a digital value and retrieves 3 bits including the 5th through 6th highest bits and a redundant bit, 3 bits including the 7th through 8th highest bits and a redundant bit, and 3 bits including the 9th through 10th highest bits and a redundant bit. Thus, the number of bits produced by conversion by the second analog-digital converter circuit in the subsequent stage of a cyclic type is configured to be smaller than the number of bits produced by conversion by the first analog-digital converter circuit in the preceding stage.
摘要翻译：前一级的第一模数转换器电路将输入的模拟信号转换为数字值，并检索较高的4位。后续阶段的第二模拟数字转换器电路将输入的模拟信号转换为数字值，并且检索包括第5至第6高位的3位和冗余位，包括第7位至第8位的3位和冗余位，并且包括第9到第10最高位的3位和冗余位。因此，通过第二模拟数字转换器电路在循环类型的后续阶段的转换而产生的位数被配置为小于由前一级中的第一模数转换器电路的转换产生的位数。

37. 发明申请

US20060197693A1 Analog-to-digital converter 有权
标题翻译：模数转换器
公开(公告)号：US20060197693A1
公开(公告)日：2006-09-07
申请号：US11367792
申请日：2006-03-03
申请人： Takashi Asano , Atsushi Wada , Shigeto Kobayashi
发明人： Takashi Asano , Atsushi Wada , Shigeto Kobayashi
IPC分类号： H03M1/12
CPC分类号： H03M1/167 , H03M1/1205
摘要： In an analog-to-digital (A-D) converter, an A-D conversion circuit samples an analog signal and converts it to a digital value of a predetermined bit number less than a targeted bit number. An amplifier circuit is provided in parallel to the A-D conversion circuit, and holds the signal sampled by the A-D conversion circuit or amplifies it by a predetermined gain. A first source follower circuit for the amplifier circuit and a second source follower circuit for the A-D conversion circuit are provided separately at the output side of a sample-and-hold circuit.
摘要翻译：在模数（A-D）转换器中，A-D转换电路对模拟信号进行采样并将其转换成小于目标位数的预定位数的数字值。放大器电路与A-D转换电路并联提供，并且保持由A-D转换电路采样的信号或将其放大预定的增益。用于放大器电路的第一源极跟随器电路和用于A-D转换电路的第二源极跟随器电路分别设置在采样保持电路的输出侧。

38. 发明授权

US07088277B2 Analog-to-digital converter having cyclic configuration 有权
标题翻译：具有循环配置的模数转换器
公开(公告)号：US07088277B2
公开(公告)日：2006-08-08
申请号：US10945924
申请日：2004-09-22
申请人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada , Takafumi Nakamori
发明人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada , Takafumi Nakamori
IPC分类号： H03M1/12
CPC分类号： H03M1/06 , H03M1/162 , H03M1/365
摘要： A cyclic AD converter having a conversion processing speed or conversion accuracy designed no higher than necessary. In the AD converter, an input analog signal is held by a sample-and-hold circuit, and converted into a digital value by an AD conversion circuit. A DA conversion circuit converts the digital value output from the AD conversion circuit into an analog value. A subtractor circuit outputs the difference between the analog value output from the AD conversion circuit and the analog value held in the sample-and-hold circuit. An amplifier circuit amplifies the output of the subtractor circuit, and feeds back the resultant to the sample-and-hold circuit and the AD conversion circuit. In the course of this feedback-based cyclic processing, an amplification control circuit changes the gain of the amplifier circuit in accordance with the progress of the circulation.
摘要翻译：一种循环AD转换器，其转换处理速度或转换精度设定为不必要。在AD转换器中，输入模拟信号由采样保持电路保持，并由AD转换电路转换为数字值。 DA转换电路将从AD转换电路输出的数字值转换为模拟值。减法器电路输出从AD转换电路输出的模拟值与保持在采样保持电路中的模拟值之间的差。放大器电路放大减法器电路的输出，并将结果反馈到采样保持电路和AD转换电路。在基于反馈的循环处理的过程中，放大控制电路根据循环的进行改变放大器电路的增益。

39. 发明授权

US07084803B2 Analog-digital conversion method and analog-digital converter 有权
标题翻译：模拟数字转换方法和模数转换器
公开(公告)号：US07084803B2
公开(公告)日：2006-08-01
申请号：US11047706
申请日：2005-02-02
申请人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada
发明人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada
IPC分类号： H03M1/16 , H03M1/44
CPC分类号： H03M1/167 , H03M1/162
摘要： A first amplifier circuit amplifies an input signal by a factor of α. A first AD converter circuit is configured at an LSB voltage of VA and converts an input analog signal into a digital value of arbitrary N1 bits. A first DA converter circuit converts the digital value output from the first AD converter circuit into an analog signal. A subtracter circuit subtracts an output of the first DA converter circuit from an output of the first subtracter circuit. A second amplifier circuit amplifies an output of the subtracter circuit by a factor of β. A second AD converter is configured at an LSB voltage of VB and converts an input analog signal into a digital value of arbitrary N2 bits. In this circuit, the relation VA*α*β=VB*2N2 holds.
摘要翻译：第一放大器电路以α的因子放大输入信号。第一AD转换器电路配置为VA的LSB电压，并将输入的模拟信号转换成任意N 1位的数字值。第一DA转换器电路将从第一AD转换器电路输出的数字值转换为模拟信号。减法电路从第一减法器电路的输出中减去第一DA转换器电路的输出。第二放大器电路将减法器电路的输出放大倍数为β。第二AD转换器配置为VB的LSB电压，并将输入模拟信号转换为任意N 2位的数字值。在该电路中，VA *α*β= VB * 2 N 2的关系成立。

40. 发明授权

US07002507B2 Pipelined and cyclic analog-to-digital converters 有权
标题翻译：流水线和循环模数转换器
公开(公告)号：US07002507B2
公开(公告)日：2006-02-21
申请号：US10945880
申请日：2004-09-22
申请人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada
发明人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada
IPC分类号： H03M1/14 , H03M1/40
CPC分类号： H03M1/1225 , H03M1/162 , H03M1/167
摘要： A need exists to provide an AD converter which is well balanced between an increase in processing speed and a decrease in circuit area. The AD converter performs an analog-to-digital conversion separately in four steps, while performing pipelined processing on an AD conversion of the first stage by a first AD conversion circuit and AD conversions of the second to fourth steps by a second AD conversion circuit. A DA conversion circuit, a subtractor circuit, and an amplifier circuit are utilized in a DA conversion, subtraction, and amplification in the first step as well as in DA conversions, subtractions, and amplifications in the second to fourth steps, thus shared in all the steps.
摘要翻译：需要提供在处理速度的提高和电路面积的减小之间良好平衡的AD转换器。 AD转换器分四步执行模数转换，同时通过第一AD转换电路对第一级的AD转换进行流水线处理，并通过第二AD转换电路对第二至第四步进行AD转换。在第一步中的DA转换，减法和放大以及第二至第四步中的DA转换，减法和放大中都使用DA转换电路，减法器电路和放大器电路，因此共享步骤。

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