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    • 33. 发明授权
    • Phase jitter tracker
    • 相位抖动跟踪器
    • US4953186A
    • 1990-08-28
    • US157986
    • 1988-02-19
    • Steve LevyDave HedbergOscar Agazzi
    • Steve LevyDave HedbergOscar Agazzi
    • H04B1/12
    • H04B1/123
    • The jitter tracker of the present invention uses a decision-directed error signal as an input to a feedback loop. The error signal is filtered and coupled to a phase locked loop centered at the center of the jitter tracking frequency range, which in the preferred embodiment is 55 Hz. The frequency width and center track and lock frequencies are set by a loop filter. A second order loop is used to acquire the frequency and phase jitter within an acceptable range. Once within this range, a first order loop is used to lock the amplitude to the input signal. The amplitude and phase values are subtracted from the incoming signal so that a new error may be calculated. In the preferred embodiment, the jitter tracker of the present invention is implemented in a digital signal processor. The jitter tracker of the preferred embodiment of the present invention comprises two filter loops. The first loop is used to generate the magnitude of the jitter error. The second loop generates the phase of the jitter error. The input to the jitter tracker is the quadrature portion of a normalized error term. This quadrature portion is multiplied by the cosine of the output of the error loops to generate the magnitude of the error signal. This term is multiplied by a scaling factor and is then integrated to generate a magnitude error term. The quadrature portion of the normalized error signal is multiplied in the second loop by the sine of the loop output. This phase error signal is coupled to a first order filter within a range in the preferred embodiment of plus or minus 10 Hz from a 55 Hz nominal frequency. The output of this first filter is multiplied by nominal 55 Hz vector and integrated to produce a phase error output. The real portion of this phase error signal is generated and combined with the magnitude error to produce a jitter correction factor for use in the receive channel circuitry.
    • 本发明的抖动跟踪器使用决策误差信号作为反馈回路的输入。 误差信号被滤波并耦合到以抖动跟踪频率范围的中心为中心的锁相环,其在优选实施例中为55Hz。 频率宽度和中心轨道和锁定频率由环路滤波器设置。 使用二阶环路来获取可接受范围内的频率和相位抖动。 一旦在该范围内,使用一阶循环将幅度锁定到输入信号。 从输入信号中减去振幅和相位值,从而可以计算新的误差。 在优选实施例中,本发明的抖动跟踪器在数字信号处理器中实现。 本发明的优选实施例的抖动跟踪器包括两个滤波器回路。 第一个循环用于产生抖动误差的大小。 第二个循环产生抖动误差的相位。 抖动跟踪器的输入是归一化误差项的正交部分。 该正交部分乘以误差环的输出的余弦以产生误差信号的幅度。 该项乘以缩放因子,然后被积分以产生幅度误差项。 归一化误差信号的正交部分在第二个循环中乘以循环输出的正弦。 该相位误差信号在55Hz额定频率的正或负10Hz的优选实施例的范围内耦合到一阶滤波器。 该第一个滤波器的输出乘以标称的55 Hz矢量并积分以产生相位误差输出。 该相位误差信号的实际部分被产生并与幅度误差组合以产生在接收信道电路中使用的抖动校正因子。