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21. 发明授权

US09256121B2 Mask plate and a method for producing a substrate mark 有权
标题翻译：掩模板及其制造方法
公开(公告)号：US09256121B2
公开(公告)日：2016-02-09
申请号：US14501194
申请日：2014-09-30
申请人： BOE Technology Group Co., Ltd. , Chengdu Boe Optoelectronics Technology Co., Ltd.
发明人： Xiaodan Wei , Xingqiang Zhang , Wei Zhao , Hongxu Yan
IPC分类号： G03F1/40 , G03F1/42 , G03F1/38 , G03F7/40 , G03F7/42 , G03F7/20
CPC分类号： G03F1/38 , G03F1/44 , G03F7/20 , G03F7/40 , G03F7/42 , G03F7/70466 , G03F7/70633
摘要： The general inventive concepts relate to the field of display technology, and provide a mask plate and a method for producing a substrate mark to increase the accuracy of the production of a substrate mark, and decrease the difficulty in monitoring products and the production cost. An exemplary mask plate comprises: a display region mask part; at least one pair of test mark mask parts, a test mark mask part being located on either side of the display region mask part and their positions being opposite to each other; and a protection mark mask part correspondingly disposed on the outside of each test mark mask part relative to the display region mask part, wherein the pattern outline of the protection mark mask part is larger than that of the test mark mask part.
摘要翻译：总体发明构思涉及显示技术领域，并且提供掩模板和制造基板标记的方法，以提高基板标记的制造精度，并且降低了监视产品的难度和生产成本。示例性掩模板包括：显示区域掩模部分; 至少一对测试标记掩模部分，测试标记掩模部分位于显示区掩模部分的任一侧上，它们的位置彼此相对; 以及保护标记掩模部，相对于显示区域掩模部对应地配置在各检验标记掩模部的外侧，其中，保护标记掩模部的图案轮廓大于检验标记掩模部的图形轮廓。

22. 发明申请

US20050164128A1 Mask for manufacturing semiconductor device and method of manufacture thereof 审中-公开
标题翻译：用于制造半导体器件的掩模及其制造方法
公开(公告)号：US20050164128A1
公开(公告)日：2005-07-28
申请号：US11077008
申请日：2005-03-11
申请人： Yoshihiko Okamoto
发明人： Yoshihiko Okamoto
IPC分类号： G03F1/68 , G03F1/00 , G03F1/26 , G03F1/29 , G03F1/30 , G03F1/40 , G03F1/80 , G03F7/20 , H01L21/027 , H01L21/30 , G03F7/00
CPC分类号： G03F1/29 , G03F1/26 , G03F1/30 , Y10S438/948
摘要： The present invention relates to a microminiaturization technique to achieve the miniaturization and higher integration of IC chip and to the improvement of a mask used in its manufacturing process. In other words, the phases of lights transmitted through the mask is controlled within one mask pattern. Specifically, a transparent film is formed in such a manner that it covers a mask pattern along a pattern formed by magnifying or demagnifying the mask pattern or otherwise a groove is formed in a mask substrate. A phase difference of 180° is generated between the lights transmitted through the mask substrate and the transparent film or the groove, causing interference with each light to offset each other. Therefore, the pattern transferred onto a wafer has an improved resolution, being used in the invention.
摘要翻译：本发明涉及实现IC芯片的小型化和更高集成化以及改进其制造工艺中使用的掩模的微小型化技术。换句话说，通过掩模传输的光的相位被控制在一个掩模图案内。具体地，透明膜形成为沿着通过放大或缩小掩模图案而形成的图案覆盖掩模图案，否则在掩模基板中形成凹槽。在透过掩模基板的光和透明膜或凹槽之间产生180°的相位差，导致每个光的干涉彼此抵消。因此，转印到晶片上的图案具有改进的分辨率，用于本发明。

23. 发明授权

US5399398A Photomask container 失效
标题翻译：光掩模容器
公开(公告)号：US5399398A
公开(公告)日：1995-03-21
申请号：US111056
申请日：1993-08-24
申请人： Watanabe Toshimitsu , Y. Matsuzawa
发明人： Watanabe Toshimitsu , Y. Matsuzawa
IPC分类号： C08J7/12 , B65D25/10 , B65D85/86 , G03F1/40 , G03F1/66 , G03F7/20 , B65D85/48
CPC分类号： G03F1/66 , B65D25/107 , G03F7/70741 , Y10S428/922 , Y10T428/1352 , Y10T428/239 , Y10T428/8305
摘要： The improved photomask container which is molded and fabricated from a thermoplastic resin is characterized in that the thermoplastic resin comprises a cellulose ester and that the surface of the molded and fabricated article is saponified with an alkali. The container does not give off malodor, has electric conductivity and is free from the problem of sodium release.
摘要翻译：由热塑性树脂模制和制造的改进的光掩模容器的特征在于，热塑性树脂包括纤维素酯，并且模制制品的表面用碱皂化。容器不发出恶臭，具有导电性，不会释放钠的问题。

24. 发明授权

US5358807A Mask for manufacturing semiconductor device and method of manufacture thereof 失效
公开(公告)号：US5358807A
公开(公告)日：1994-10-25
申请号：US87074
申请日：1993-07-07
申请人： Yoshihiko Okamoto
发明人： Yoshihiko Okamoto
IPC分类号： G03F1/68 , G03F1/00 , G03F1/26 , G03F1/29 , G03F1/30 , G03F1/40 , G03F1/80 , G03F7/20 , H01L21/027 , H01L21/30 , G03F9/00
CPC分类号： G03F1/29 , G03F1/30 , G03F1/26 , Y10S438/948
摘要： The present invention relates to a microminiaturization technique to achieve the miniaturization and higher integration of IC chips and to the improvement of a mask used in its manufacturing process. In other words, the phases of lights transmitted through the mask is controlled within one mask pattern. Specifically, a transparent film is formed in such a manner that it covers a mask pattern along a pattern formed by magnifying or demagnifying the mask pattern, or otherwise a groove is formed in a mask substrate. A phase difference of 180.degree. is generated between the lights transmitted through the mask substrate and the transparent film or the groove, causing interference with each light to offset each other. Therefore, the pattern transferred onto a wafer has an improved resolution, being used in the invention.

25. 发明授权

US5045417A Mask for manufacturing semiconductor device and method of manufacture thereof 失效
标题翻译：用于制造半导体器件的掩模及其制造方法
公开(公告)号：US5045417A
公开(公告)日：1991-09-03
申请号：US437268
申请日：1989-11-16
申请人： Yoshihiko Okamoto
发明人： Yoshihiko Okamoto
IPC分类号： G03F1/68 , G03F1/00 , G03F1/26 , G03F1/29 , G03F1/30 , G03F1/40 , G03F1/80 , G03F7/20 , H01L21/027 , H01L21/30
CPC分类号： G03F1/29 , G03F1/30 , G03F1/26 , Y10S438/948
摘要： The present invention relates to a microminiaturization technique to achieve the miniaturization and higher integration of IC chips and to the improvement of a mask used in its manufacturing process. In other words, the phase of lights transmitted through the mask is controlled within one mask pattern. Specifically, a transparent film is formed in such a manner that it covers a mask pattern along a pattern formed by magnifying or demagnifying the mask pattern or otherwise a groove is formed in a mask substrate. A phase difference of 180.degree. is generated between the lights transmitted through the mask substrate and the transparent film or the groove, causing interference with each light to offset each other. Therefore, the pattern transferred onto a wafer has an improved resolution, being used in the invention.
摘要翻译：本发明涉及实现IC芯片的小型化和更高集成化以及改进其制造过程中使用的掩模的微型化技术。换句话说，通过掩模传输的光的相位被控制在一个掩模图案内。具体地，透明膜形成为沿着通过放大或缩小掩模图案而形成的图案覆盖掩模图案，否则在掩模基板中形成凹槽。在透过掩模基板的光与透明膜或槽之间产生180°的相位差，导致每个光的干涉彼此抵消。因此，转印到晶片上的图案具有改进的分辨率，用于本发明。

26. 发明授权

US4556608A Photomask blank and photomask 失效
标题翻译：光掩模空白和光掩模
公开(公告)号：US4556608A
公开(公告)日：1985-12-03
申请号：US565611
申请日：1983-12-27
申请人： Satoru Kaneki , Kazuhiro Tabuchi
发明人： Satoru Kaneki , Kazuhiro Tabuchi
IPC分类号： G03F1/00 , G03F1/40 , H01L21/027 , B32B9/00 , H01L21/302
CPC分类号： G03F1/50 , G03F1/40 , Y10T428/12611 , Y10T428/12618 , Y10T428/12833 , Y10T428/12847 , Y10T428/12854
摘要： A photomask is fabricated by forming, in a photomask (hard mask) produced by forming a patternized film of a masking material comprising (a) a layer of metallic chromium and (b) a layer of chromium oxides superposed thereon, a film of a translucent and electroconductive material selected from Nb, Ta and V, between the masking film and the transparent substrate. At the time of pattern transferring by photolithography, dropping off of parts of the pattern of this photomask does not occur even when it includes isolated island-like parts, and, at the time of inspection by electron-beam exposure, the precision of inspection does not lower. This photomask is obtained by patternizing by selective etching the masking film of a photomask blank produced by successively forming, on the transparent substrate, the translucent and electroconductive film and the masking film.
摘要翻译：通过在通过形成掩模材料的图案化膜制造的光掩模（硬掩模）中形成光掩模来制造光掩模，掩模材料包括（a）金属铬层和（b）叠层在其上的铬氧化物层，半透明的膜以及选自Nb，Ta和V中的导电材料，在掩模膜和透明基板之间。在通过光刻的图案转印时，即使在包含隔离的岛状部件的情况下也不会发生该光掩模的图案的部分的脱落，并且在通过电子束曝光检查时，检查精度不低该光掩模通过选择性蚀刻通过在透明基板上连续形成半透明导电膜和掩模膜而产生的光掩模坯料的掩模膜进行图案化而获得。

27. 发明授权

US4368230A Photomask 失效
标题翻译：光掩模
公开(公告)号：US4368230A
公开(公告)日：1983-01-11
申请号：US127319
申请日：1980-03-05
申请人： Koichiro Mizukami , Masatoshi Migitaka
发明人： Koichiro Mizukami , Masatoshi Migitaka
IPC分类号： G03F1/00 , G03F1/40 , H01L21/027 , B32B3/00
CPC分类号： G03F1/86 , Y10T428/24868 , Y10T428/24917 , Y10T428/24926 , Y10T428/31678
摘要： A photomask comprises a transparent film of conductive material and a light shielding film of predetermined pattern on a transparent substrate. The pattern film is made of a metallic element having its atomic number not smaller than 25 or a composition containing the metallic element. The photomask structure is suited to the case where the pattern formed on the mask is inspected with an electron beam. With the mask structure, the contrast of a pattern related information signal (backscattered electrons, secondary electrons, absorption current, etc.) derived from the mask upon irradiation thereof with the electron beam is improved.
摘要翻译：光掩模包括导电材料的透明膜和在透明基板上的预定图案的遮光膜。图案膜由其原子序数不小于25的金属元素或含有金属元素的组合物制成。光掩模结构适合于用电子束检查形成在掩模上的图案的情况。利用掩模结构，改善了与电子束照射时从掩模得到的图案相关信息信号（背散射电子，二次电子，吸收电流等）的对比度。

28. 发明授权

US3949131A Photomasks with antistatic control 失效
标题翻译：防静电控制光掩模
公开(公告)号：US3949131A
公开(公告)日：1976-04-06
申请号：US480618
申请日：1974-06-19
申请人： David Bruce Fraser
发明人： David Bruce Fraser
IPC分类号： H01L21/027 , C23F1/00 , G03F1/40 , G03F1/48 , B05D5/12
CPC分类号： G03F1/40 , G03F1/48 , Y10T428/24851
摘要： In high resolution lithography, resolution impairment sometimes occurs due to dust collecting on the mask. The dust is often attracted to the mask by static electricity. The solution proposed is to coat the entire photomask with a transparent, electrically conductive coating. The coating is electrically grounded to drain static charge. Conductive materials are often used for lithographic masks, but the patterns cannot be grounded effectively because there are island regions in the pattern.If the pattern is itself conducting, there is the added option of applying the antistatic layer under the pattern.If the pattern is formed of a photographic emulsion of a patterned photoresist, it is protected from damage and wear in handling by the harder conductive coating.
摘要翻译：在高分辨率光刻中，由于掩模上的灰尘收集，有时会发生分辨率损伤。灰尘常常被静电吸引到面具上。所提出的解决方案是用透明的导电涂层涂覆整个光掩模。涂层电接地以排出静电。导电材料通常用于光刻掩模，但是由于图案中存在岛状区域，所以图案不能有效地接地。

29. 发明授权

US11315882B2 Alignment mark, substrate and manufacturing method therefor, and exposure alignment method 有权
公开(公告)号：US11315882B2
公开(公告)日：2022-04-26
申请号：US16634741
申请日：2018-09-07
申请人： ORDOS YUANSHENG OPTOELECTRONICS CO., LTD. , BOE TECHNOLOGY GROUP CO., LTD.
发明人： Qinglin Ma , Baojie Zhao , Conghui Zhou , Li Wang , Jian Li , Yan Zhao , Xiang Hui , Xiongwei Wang , Chunhong Ma
IPC分类号： H01L23/544 , G03F1/40 , G03F1/42 , G03F9/00
摘要： An alignment mark includes an alignment region, a peripheral region and a shielding region. The alignment region has an outer contour; the peripheral region is disposed around at least a part of the outer contour of the alignment region; the shielding region is disposed around at least a part of the outer contour of the alignment region and is non-overlapped with the peripheral region; and the alignment region and the shielding region are opaque, and the peripheral region is at least partially transparent.

30. 发明授权

US11036127B2 Reflective mask blank and reflective mask 有权
公开(公告)号：US11036127B2
公开(公告)日：2021-06-15
申请号：US16056765
申请日：2018-08-07
申请人： AGC INC.
发明人： Hirotomo Kawahara , Hiroshi Hanekawa , Toshiyuki Uno
IPC分类号： G03F1/24 , G03F1/38 , G03F1/40 , G03F1/48 , G03F1/52 , G03F1/54
摘要： A reflective mask blank includes a backside conductive film on a back surface of a substrate. The backside conductive film has a laminated structure including a stress compensation layer and a conductive layer in this order from the substrate side. The conductive layer includes a metal nitride. The stress compensation layer has a compressive stress and the stress compensation layer includes at least one compound selected from the group consisting of oxides, oxynitrides, and nitrides, each having an absorption coefficient (k) over the wavelength range of 400 nm to 800 nm being 0.1 or less. The conductive layer has a thickness of 5 nm or more and 30 nm or less. The backside conductive film has a total thickness of 50 nm or more.

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