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    • 21. 发明授权
    • Time counting circuit, sampling circuit, skew adjusting circuit, and
logic analyzing circuit
    • 时间计数电路,采样电路,偏斜调整电路和逻辑分析电路
    • US5973523A
    • 1999-10-26
    • US99456
    • 1998-06-18
    • Keiichi KusumotoAkira Matsuzawa
    • Keiichi KusumotoAkira Matsuzawa
    • G01R23/10G01R29/02G06F1/10G06F11/25H03K23/00H03K23/54H03M1/50H03M1/64H03L7/00
    • G04F10/005G01R29/02G06F1/10G06F11/25
    • There is provided a time counting circuit which measures a pulse spacing of a pulse signal with a high accuracy and exhibits high resistance to variations in power-source voltage.A delay circuit ring consists of a plurality of delay circuits connected in a ring configuration and signal transition is caused to circulate around the delay circuit ring by oscillation. A switch-signal generating circuit outputs first and second switch signals based on the time at which a pulse signal to be measured rises. A row of sampling circuits consists of a plurality of sampling circuits connected to the output terminals of the respective delay circuits and samples the output signals from the delay circuits in response to a direction indicated by the first switch signal. A row of holding circuits consists of a plurality of holding circuits connected to the output terminals of the respective sampling circuits and holds the output signals from the sampling circuits in response to a direction indicated by the second switch signal. An operating circuit calculates the pulse spacing of the pulse signal to be measured based on a logic level signal outputted from the row of holding circuits.
    • 提供了一种时间计数电路,其高精度地测量脉冲信号的脉冲间隔,并且对电源电压的变化表现出高的抵抗能力。 延迟电路环由以环形配置连接的多个延迟电路组成,并且使信号转变通过振荡在延迟电路环周围循环。 开关信号发生电路基于要测量的脉冲信号上升的时间输出第一和第二开关信号。 一行采样电路由连接到各个延迟电路的输出端的多个采样电路组成,并响应于第一开关信号指示的方向对来自延迟电路的输出信号进行采样。 一行保持电路由多个保持电路组成,多个保持电路连接到相应采样电路的输出端,并响应于第二开关信号指示的方向保持来自采样电路的输出信号。 操作电路基于从保持电路行输出的逻辑电平信号来计算要测量的脉冲信号的脉冲间隔。
    • 22. 发明授权
    • Method of measurement and compensation of an inaccurate clock signal
    • 不准确的时钟信号的测量和补偿方法
    • US5915108A
    • 1999-06-22
    • US885408
    • 1997-06-30
    • Michael James FreyR. Brooks ReedCharles Stuart Tosch
    • Michael James FreyR. Brooks ReedCharles Stuart Tosch
    • G01R23/10F02P7/077G04G3/02G06F1/10G06F1/04
    • G04G3/02F02P7/0775
    • A method for determining the actual frequency of an inaccurate clock signal then using the actual frequency to generate a compensation factor to correct calculations using the clock signal. The method includes counting the number of clock pulses in the clock signal over a predetermined and programmable period of time, and based on the clock pulse count, determining the actual frequency of the clock signal. Once the actual frequency of the clock signal is determined, this value is used to generate the compensation factor based on the expected or rated frequency of the clock signal to compensate for the calculations using the clock signal. The method has a particular application for use in a powertrain control module incorporating a low frequency resonator and a high frequency system clock, where the resonator generates an inaccurate clock signal which is highly stable for short periods of time and the system clock is relatively stable over long term but suffers from short term jitter.
    • 一种用于确定不准确时钟信号的实际频率的方法,然后使用实际频率来产生补偿因子以使用时钟信号来校正计算。 该方法包括在预定和可编程的时间段内对时钟信号中的时钟脉冲数进行计数,并且基于时钟脉冲计数,确定时钟信号的实际频率。 一旦确定了时钟信号的实际频率,则该值用于根据时钟信号的预期或额定频率产生补偿因子,以补偿使用时钟信号的计算。 该方法具有用于包含低频谐振器和高频系统时钟的动力系控制模块中的特定应用,其中谐振器产生在短时间内高度稳定的不准确的时钟信号,并且系统时钟相对稳定 长期但遭受短期抖动。
    • 23. 发明授权
    • Frequency measuring apparatus
    • 频率测量仪
    • US5764045A
    • 1998-06-09
    • US705154
    • 1996-08-29
    • Mishio Hayashi
    • Mishio Hayashi
    • G01R23/10G01R23/02
    • G01R23/10
    • A fractional time frequency measuring apparatus includes a divider for dividing a frequency of a signal to be measured with a predetermined division factor; a counter unit for counting the divided signal with a standard clock for every period of the divided signal and outputting count results; a fractional time measuring unit for measuring fractional times produced by the counting with the standard clock; a sequence control unit to form a sequence circuit for sequentially counting the divided signal with the standard clock; a memory unit for holding the count results from the counter unit; a microprocessor for determining a value of the divisional factor, generating a reset signal, and calculating the frequency of the signal to be measured from the count results stored in the memory unit. The sequence control unit counts a predetermined number of pulses of the standard clock while it generates a write signal of count results in the memory unit, a reset signal for the counter unit, and an address signal for the memory unit; and the counter unit is preset at a value equal to the predetermined number of pulses.
    • 分数时间频率测量装置包括用于以预定的分频因子分频待测信号的频率的分频器; 计数器单元,用于对分割信号的每个周期的标准时钟进行计数,并输出计数结果; 分数时间测量单元,用于测量用标准时钟计数产生的分数时间; 序列控制单元,用于形成用于以标准时钟顺序计数分频信号的序列电路; 存储单元,用于保持来自计数器单元的计数结果; 用于确定分割因子的值的微处理器,产生复位信号,以及从存储在存储器单元中的计数结果计算要测量的信号的频率。 顺序控制单元计数标准时钟的预定数量的脉冲,同时产生存储单元中的计数结果写入信号,计数器单元的复位信号和存储单元的地址信号; 并且计数器单元预设为等于预定脉冲数的值。
    • 24. 发明授权
    • Frequency measuring apparatus and frequency measuring method
    • 频率测量仪和频率测量方法
    • US5719782A
    • 1998-02-17
    • US481266
    • 1995-06-07
    • Teruyoshi Mitsuoka
    • Teruyoshi Mitsuoka
    • G01R23/10H03B5/32H03L1/00
    • G01R23/10
    • A frequency measuring apparatus for measuring the frequency of an input signal to be measured with high accuracy. The apparatus includes a crystal oscillator for generating an internal reference frequency, a temperature sensor provided on the crystal oscillator, a writable memory and an estimation control device for storing in the memory a correspondence relationship between an absolute frequency to be taken as a reference at a predetermined temperature measured by the temperature sensor and the internal reference frequency as error correction information and estimating the frequency ortho input signal in conformity with the internal reference frequency corrected by the error correction information upon the input signal.
    • PCT No.PCT / JP94 / 01758 Sec。 371日期:1995年6月7日 102(e)日期1995年6月7日PCT 1994年10月19日PCT PCT。 出版物WO95 / 11456 日期1995年04月27日一种用于以高精度测量要测量的输入信号的频率的频率测量装置。 该装置包括用于产生内部参考频率的晶体振荡器,设置在晶体振荡器上的温度传感器,可写入存储器和估计控制装置,用于在存储器中存储作为参考的绝对频率之间的对应关系 由温度传感器测量的预定温度和内部参考频率作为误差校正信息,并根据输入信号通过纠错信息校正的内部基准频率估计频率邻近输入信号。
    • 25. 发明授权
    • Frequency counter with reduced false correlations
    • 频率计数器减少虚假相关性
    • US5710710A
    • 1998-01-20
    • US561692
    • 1995-11-22
    • William P. OwenJudd Sheets
    • William P. OwenJudd Sheets
    • G01R23/02G01R23/10G01R23/00G06F17/00
    • G01R23/10G01R23/02
    • An improved frequency counter for more reliably reading the frequency of low level signals by employing a method of separating the desired signal from undesirable noise related signals, wherein the frequency counter comprises signal input amplifier circuitry, a frequency modulator circuit for phase shifting the self-oscillation frequency of the undesired signal to isolate it from the valid signal, a prescaler circuit, a frequency or pulse counter driven by the output of the prescaler, and a correlator circuit for differentiating the self-oscillation frequencies from the main signal frequency so as to reduce false correlations between the self-oscillation, or noise, and valid signals.
    • 一种改进的频率计数器,用于通过采用将期望信号与不期望的噪声相关信号分离的方法更可靠地读取低电平信号的频率,其中频率计数器包括信号输入放大器电路,用于相位自振荡的频率调制器电路 不需要的信号的频率使其与有效信号隔离,预分频器电路,由预分频器的输出驱动的频率或脉冲计数器,以及用于将自振荡频率与主信号频率区分开来的相关器电路,以便减少 自振荡或噪声与有效信号之间的假相关。
    • 26. 发明授权
    • Period measuring device
    • 周期测量装置
    • US5487097A
    • 1996-01-23
    • US291285
    • 1994-08-16
    • Makoto HatakenakaHaruo SakuraiHideo Nagano
    • Makoto HatakenakaHaruo SakuraiHideo Nagano
    • G01R23/00G01R23/10H03K21/00
    • G01R23/005G01R23/10
    • It is an object to accurately obtain the period of the horizontal synchronizing signal in the video signal. The number of internal pulses are measured in a predetermined measurement period defined by the horizontal synchronizing signal. It is assumed that the periods of the horizontal synchronizing signal and the internal pulse are denoted as T.sub.H and T.sub.S, and the measurement period is defined by one period of a divided signal NS which is obtained by N-dividing the horizontal synchronizing signal. In this case, the length of the measurement period is N.multidot.T.sub.H. The period of the horizontal synchronizing signal is obtained when the internal pulse is activated K times in the measurement period. After the measurement period is started, the divided signal NS transits between the Kth activation of the internal pulse and the (K+1)th activation, and the measurement period is ended. Accordingly, there is the relation of T.sub.S .multidot.K
    • 其目的在于准确地获得视频信号中的水平同步信号的周期。 在由水平同步信号定义的预定测量周期内测量内部脉冲的数量。 假设水平同步信号和内部脉冲的周期被表示为TH和TS,并且测量周期由通过N分割水平同步信号获得的分频信号NS的一个周期来定义。 在这种情况下,测量周期的长度为N×TH。 在测量周期内内部脉冲激活K次时,获得水平同步信号的周期。 在测量周期开始之后,分频信号NS在内部脉冲的第K次激活和第(K + 1)激活之间转换,并且测量周期结束。 因此,存在TSxK