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21. 发明授权

US09591217B2 Camera system encoder/decoder architecture 有权
标题翻译：相机系统编码器/解码器架构
公开(公告)号：US09591217B2
公开(公告)日：2017-03-07
申请号：US15282326
申请日：2016-09-30
申请人： GoPro, Inc.
发明人： Scott Patrick Campbell , Paul Mobbs , Balineedu Chowdary Adsumilli , Sumit Chawla
IPC分类号： H04N5/232 , H04N19/102 , H04N19/44 , H04N19/423 , G06T3/40 , H04N5/247 , H04N1/60 , H04N9/09 , H04N9/73 , H04N19/172 , H04N19/169 , H04N19/91 , H04N19/63
CPC分类号： G06T1/20 , G06T3/4015 , H04N1/6019 , H04N1/6027 , H04N5/232 , H04N5/23212 , H04N5/23216 , H04N5/23222 , H04N5/23229 , H04N5/23241 , H04N5/23245 , H04N5/23254 , H04N5/23267 , H04N5/23296 , H04N5/2353 , H04N5/247 , H04N5/374 , H04N5/378 , H04N9/045 , H04N9/09 , H04N9/735 , H04N9/8042 , H04N19/102 , H04N19/12 , H04N19/132 , H04N19/156 , H04N19/164 , H04N19/172 , H04N19/186 , H04N19/1883 , H04N19/33 , H04N19/42 , H04N19/423 , H04N19/44 , H04N19/517 , H04N19/63 , H04N19/91
摘要： An image capture accelerator performs accelerated processing of image data. In one embodiment, the image capture accelerator includes accelerator circuitry including a pre-processing engine and a compression engine. The pre-processing engine is configured to perform accelerated processing on received image data, and the compression engine is configured to compress processed image data received from the pre-processing engine. In one embodiment, the image capture accelerator further includes a demultiplexer configured to receive image data captured by an image sensor array implemented within, for example, an image sensor chip. The demultiplexer may output the received image data to an image signal processor when the image data is captured by the image sensor array in a standard capture mode, and may output the received image data to the accelerator circuitry when the image data is captured by the image sensor array in an accelerated capture mode.
摘要翻译：图像捕获加速器执行图像数据的加速处理。在一个实施例中，图像捕获加速器包括包括预处理引擎和压缩引擎的加速器电路。预处理引擎被配置为对接收的图像数据执行加速处理，并且压缩引擎被配置为压缩从预处理引擎接收的经处理的图像数据。在一个实施例中，图像捕获加速器还包括解复用器，其被配置为接收由例如图像传感器芯片内实现的图像传感器阵列捕获的图像数据。当图像数据以标准捕捉模式被图像传感器阵列捕获时，解复用器可以将接收的图像数据输出到图像信号处理器，并且当图像数据被图像捕获时，可以将接收到的图像数据输出到加速器电路传感器阵列处于加速捕获模式。

22. 发明授权

US09525872B2 Video coding based on first order prediction and pre-defined second order prediction mode 有权
标题翻译：基于一阶预测和预定义二阶预测模式的视频编码
公开(公告)号：US09525872B2
公开(公告)日：2016-12-20
申请号：US14067231
申请日：2013-10-30
申请人： QUALCOMM Incorporated
发明人： Rajan Laxman Joshi , Peisong Chen , Marta Karczewicz
IPC分类号： H04N7/18 , H04N19/567 , H04N19/105 , H04N19/176 , H04N19/147 , H04N19/102 , H04N19/61 , H04N19/11 , H04N19/109
CPC分类号： H04N19/567 , H04N19/102 , H04N19/105 , H04N19/109 , H04N19/11 , H04N19/147 , H04N19/176 , H04N19/61
摘要： This disclosure describes video encoding and decoding techniques in which a first order prediction process and a second order prediction process are used in combination to generate predictive video blocks for video coding. First order prediction may be similar to conventional motion estimation and motion compensation that generates residual video blocks. The second order prediction may involve a process similar to conventional intra-prediction, but is performed on the residual video blocks. The techniques of this disclosure may pre-define the second order prediction to a specific mode, such as a mode similar to the intra-DC mode used in intra coding. In addition, the techniques of this disclosure may combine aspects of the first order and second order prediction into a single process so that the effects of second order prediction on the residuals are taken into account during the first order prediction process, which may improve compression.
摘要翻译：本公开描述了视频编码和解码技术，其中组合使用一阶预测处理和二阶预测处理以产生用于视频编码的预测视频块。第一阶预测可以类似于产生残余视频块的常规运动估计和运动补偿。二阶预测可以涉及与常规帧内预测类似的处理，但是对剩余视频块执行。本公开的技术可以预定义到特定模式的二阶预测，例如类似于帧内编码中使用的DC内模式的模式。此外，本公开的技术可以将一阶和二阶预测的方面组合成单个过程，使得在第一阶预测过程期间考虑二阶预测对残差的影响，这可以改善压缩。

23. 发明授权

US09485418B2 Camera system transmission in bandwidth constrained environments 有权
标题翻译：带宽约束环境中的相机系统传输
公开(公告)号：US09485418B2
公开(公告)日：2016-11-01
申请号：US15049012
申请日：2016-02-20
申请人： GoPro, Inc.
发明人： Scott Patrick Campbell , Paul Mobbs , Balineedu Chowdary Adsumilli , Sumit Chawla
IPC分类号： H04N5/232 , H04N19/102 , H04N19/91 , H04N19/63 , H04N19/169 , G06T3/40 , H04N5/378 , H04N9/04 , H04N5/235 , H04N9/73 , H04N19/164 , H04N19/172 , H04N5/247
CPC分类号： G06T1/20 , G06T3/4015 , H04N1/6019 , H04N1/6027 , H04N5/232 , H04N5/23212 , H04N5/23216 , H04N5/23222 , H04N5/23229 , H04N5/23241 , H04N5/23245 , H04N5/23254 , H04N5/23267 , H04N5/23296 , H04N5/2353 , H04N5/247 , H04N5/374 , H04N5/378 , H04N9/045 , H04N9/09 , H04N9/735 , H04N9/8042 , H04N19/102 , H04N19/12 , H04N19/132 , H04N19/156 , H04N19/164 , H04N19/172 , H04N19/186 , H04N19/1883 , H04N19/33 , H04N19/42 , H04N19/423 , H04N19/44 , H04N19/517 , H04N19/63 , H04N19/91
摘要： An image capture accelerator performs accelerated processing of image data. In one embodiment, the image capture accelerator includes accelerator circuitry including a pre-processing engine and a compression engine. The pre-processing engine is configured to perform accelerated processing on received image data, and the compression engine is configured to compress processed image data received from the pre-processing engine. In one embodiment, the image capture accelerator further includes a demultiplexer configured to receive image data captured by an image sensor array implemented within, for example, an image sensor chip. The demultiplexer may output the received image data to an image signal processor when the image data is captured by the image sensor array in a standard capture mode, and may output the received image data to the accelerator circuitry when the image data is captured by the image sensor array in an accelerated capture mode.
摘要翻译：图像捕获加速器执行图像数据的加速处理。在一个实施例中，图像捕获加速器包括包括预处理引擎和压缩引擎的加速器电路。预处理引擎被配置为对接收的图像数据执行加速处理，并且压缩引擎被配置为压缩从预处理引擎接收的经处理的图像数据。在一个实施例中，图像捕获加速器还包括解复用器，其被配置为接收由例如图像传感器芯片内实现的图像传感器阵列捕获的图像数据。当图像数据以标准捕捉模式被图像传感器阵列捕获时，解复用器可以将接收的图像数据输出到图像信号处理器，并且当图像数据被图像捕获时，可以将接收到的图像数据输出到加速器电路传感器阵列处于加速捕获模式。

24. 发明申请

US20160316226A1 Resource Efficient Video Processing via Prediction Error Computational Adjustments 有权
标题翻译：通过预测误差计算调整的资源高效视频处理
公开(公告)号：US20160316226A1
公开(公告)日：2016-10-27
申请号：US15198947
申请日：2016-06-30
申请人： Freescale Semiconductor, Inc.
发明人： Zhong Li He , Yong Yan
IPC分类号： H04N19/65 , H04N19/513 , H04N19/124
CPC分类号： H04N19/65 , H04N19/102 , H04N19/124 , H04N19/134 , H04N19/14 , H04N19/152 , H04N19/156 , H04N19/162 , H04N19/176 , H04N19/513 , H04N19/523 , H04N19/61
摘要： A video processing system dynamically adjusts video processing prediction error reduction computations in accordance with the amount of motion represented in a set of image data and/or available memory resources to store compressed video data. In at least one embodiment, video processing system adjusts utilization of prediction error computational resources based on the size of a prediction error between a first set of image data, such as current set of image data being processed, and a reference set of image data relative to an amount of motion in a current set of image data. Additionally, in at least one embodiment, the video processing adjusts utilization of prediction error computation resources based upon a fullness level of a data buffer relative to the amount of motion in the current set of image data.
摘要翻译：视频处理系统根据在一组图像数据和/或可用存储器资源中表示的运动量来动态地调整视频处理预测误差减少计算以存储压缩视频数据。在至少一个实施例中，视频处理系统基于第一组图像数据（例如正在处理的图像数据的当前集合）与相关图像数据的参考集合之间的预测误差的大小来调整预测误差计算资源的利用到当前图像数据集合中的运动量。另外，在至少一个实施例中，视频处理基于数据缓冲器相对于当前图像数据集合中的运动量的饱和度来调整预测误差计算资源的利用率。

25. 发明授权

US09479453B2 Vehicle network node module 有权
公开(公告)号：US09479453B2
公开(公告)日：2016-10-25
申请号：US14803942
申请日：2015-07-20
申请人： BROADCOM CORPORATION
发明人： Nariman Yousefi , Yongbum Kim , John Walley , Sherman (Xuemin) Chen , Wael W. Diab , Nicholas Ilyadis
IPC分类号： H04J3/06 , H04L12/911 , H04N7/18 , G07C5/08 , H04W4/04 , H04L12/947 , H04L12/865 , B60R16/03 , H04L12/917 , H04L12/741 , H04L12/54 , H04L29/06 , G06F1/26 , H04L29/08 , H04W72/08 , H04W72/10 , H04N19/102 , G08G1/16 , H04L12/851 , H04W24/08 , H04W28/08 , B60R16/023 , H04W88/02 , G06F7/76 , H04L12/46 , H04L12/10
CPC分类号： H04L47/821 , B60R16/023 , B60R16/03 , B60R16/0315 , G06F1/26 , G06F1/266 , G06F7/76 , G07C5/0866 , G08G1/16 , H04B1/3822 , H04L12/10 , H04L12/46 , H04L12/4625 , H04L12/56 , H04L29/0653 , H04L45/74 , H04L47/2433 , H04L47/6275 , H04L47/76 , H04L49/25 , H04L67/12 , H04L69/08 , H04N7/181 , H04N7/183 , H04N19/102 , H04W4/046 , H04W4/40 , H04W24/08 , H04W28/08 , H04W72/082 , H04W72/10 , H04W88/02 , Y02D70/1224 , Y02D70/1242 , Y02D70/1244 , Y02D70/1246 , Y02D70/1262 , Y02D70/142 , Y02D70/144 , Y02D70/146 , Y02D70/162 , Y02D70/164 , Y02D70/166 , Y02D70/168 , Y02D70/26
摘要： A vehicle network node module includes device buffers, a network buffer, a switch circuit, and a processing module. The device buffers temporarily store outgoing device packets from, and temporarily store incoming device packets for, vehicle devices in accordance with a locally managed prioritization scheme. The network buffer receives incoming network packets from, and outputs the outgoing network packets to, a vehicle network fabric in accordance with a global vehicle network protocol. The network buffer also temporarily stores the incoming network packets and the outgoing network packets in accordance with the locally managed prioritization scheme. The switching circuit selectively couples the network buffer to individual ones of the device buffers in accordance with the locally managed prioritization scheme. The processing module interprets the outgoing device packets and the incoming network packets to determine types of packets and determines the locally managed prioritization scheme based on the types of packets.

26. 发明申请

US20160173780A1 MOTION ESTIMATION AND DETECTION IN A CAMERA SYSTEM ACCELERATOR ARCHITECTURE 有权
标题翻译：摄像机系统加速器架构中的运动估计与检测
公开(公告)号：US20160173780A1
公开(公告)日：2016-06-16
申请号：US15049016
申请日：2016-02-20
申请人： GoPro, Inc.
发明人： Scott Patrick Campbell , Paul Mobbs , Balineedu Chowdary Adsumilli , Sumit Chawla
IPC分类号： H04N5/232
CPC分类号： G06T1/20 , G06T3/4015 , H04N1/6019 , H04N1/6027 , H04N5/232 , H04N5/23212 , H04N5/23216 , H04N5/23222 , H04N5/23229 , H04N5/23241 , H04N5/23245 , H04N5/23254 , H04N5/23267 , H04N5/23296 , H04N5/2353 , H04N5/247 , H04N5/374 , H04N5/378 , H04N9/045 , H04N9/09 , H04N9/735 , H04N9/8042 , H04N19/102 , H04N19/12 , H04N19/132 , H04N19/156 , H04N19/164 , H04N19/172 , H04N19/186 , H04N19/1883 , H04N19/33 , H04N19/42 , H04N19/423 , H04N19/44 , H04N19/517 , H04N19/63 , H04N19/91
摘要： An image capture accelerator performs accelerated processing of image data. In one embodiment, the image capture accelerator includes accelerator circuitry including a pre-processing engine and a compression engine. The pre-processing engine is configured to perform accelerated processing on received image data, and the compression engine is configured to compress processed image data received from the pre-processing engine. In one embodiment, the image capture accelerator further includes a demultiplexer configured to receive image data captured by an image sensor array implemented within, for example, an image sensor chip. The demultiplexer may output the received image data to an image signal processor when the image data is captured by the image sensor array in a standard capture mode, and may output the received image data to the accelerator circuitry when the image data is captured by the image sensor array in an accelerated capture mode.
摘要翻译：图像捕获加速器执行图像数据的加速处理。在一个实施例中，图像捕获加速器包括包括预处理引擎和压缩引擎的加速器电路。预处理引擎被配置为对接收的图像数据执行加速处理，并且压缩引擎被配置为压缩从预处理引擎接收的经处理的图像数据。在一个实施例中，图像捕获加速器还包括解复用器，其被配置为接收由例如图像传感器芯片内实现的图像传感器阵列捕获的图像数据。当图像数据以标准捕捉模式被图像传感器阵列捕获时，解复用器可以将接收的图像数据输出到图像信号处理器，并且当图像数据被图像捕获时，可以将接收到的图像数据输出到加速器电路传感器阵列处于加速捕获模式。

27. 发明授权

US09332261B2 Network management module for a vehicle communication network 有权
标题翻译：车辆通信网络的网络管理模块
公开(公告)号：US09332261B2
公开(公告)日：2016-05-03
申请号：US14253296
申请日：2014-04-15
申请人： BROADCOM CORPORATION
发明人： Nariman Yousefi , Yongbum Kim , John Walley , Sherman (Xuemin) Chen , Wael W. Diab , Nicholas Ilyadis
IPC分类号： H04L12/26 , H04N19/102 , H04N7/18 , G07C5/08 , H04W4/04 , H04L12/947 , H04L12/865 , B60R16/03 , H04L12/917 , H04L12/911 , H04L12/741 , H04L12/54 , H04L29/06 , G06F1/26 , H04L29/08 , H04W72/08 , H04W72/10 , G08G1/16 , H04W88/02 , G06F7/76 , H04L12/46 , H04L12/10
CPC分类号： H04L47/821 , B60R16/023 , B60R16/03 , B60R16/0315 , G06F1/26 , G06F1/266 , G06F7/76 , G07C5/0866 , G08G1/16 , H04B1/3822 , H04L12/10 , H04L12/46 , H04L12/4625 , H04L12/56 , H04L29/0653 , H04L45/74 , H04L47/2433 , H04L47/6275 , H04L47/76 , H04L49/25 , H04L67/12 , H04L69/08 , H04N7/181 , H04N7/183 , H04N19/102 , H04W4/046 , H04W4/40 , H04W24/08 , H04W28/08 , H04W72/082 , H04W72/10 , H04W88/02 , Y02D70/1224 , Y02D70/1242 , Y02D70/1244 , Y02D70/1246 , Y02D70/1262 , Y02D70/142 , Y02D70/144 , Y02D70/146 , Y02D70/162 , Y02D70/164 , Y02D70/166 , Y02D70/168 , Y02D70/26
摘要： A network management module includes a network interface module, memory, and a processing module. The network interface module is operable for coupling the network management module to a vehicle communication network. The processing module is operable to manage a global vehicle network communication protocol that includes instituting a content-based network packet processing protocol and managing the vehicle communication network to support the network packet processing protocol. The content-based network packet processing protocol includes determining content type of a packet, determining a processing requirement of the packet, and prioritizing execution of the processing requirement based on the content type.
摘要翻译：网络管理模块包括网络接口模块，存储器和处理模块。网络接口模块可操作以将网络管理模块耦合到车辆通信网络。处理模块可操作以管理全球车辆网络通信协议，其包括建立基于内容的网络分组处理协议并管理车辆通信网络以支持网络分组处理协议。基于内容的网络分组处理协议包括确定分组的内容类型，确定分组的处理需求，以及基于内容类型来优先执行处理需求。

28. 发明授权

US09313510B2 Use of objective quality measures of streamed content to reduce streaming bandwidth 有权
标题翻译：使用流内容的客观质量度量来减少流带宽
公开(公告)号：US09313510B2
公开(公告)日：2016-04-12
申请号：US13731949
申请日：2012-12-31
申请人： Sonic IP, Inc.
发明人： Abhishek Shivadas , William Amidei
IPC分类号： H04N19/85 , H04N19/177 , H04N19/46 , H04N19/102 , H04N19/154 , H04N19/164
CPC分类号： H04N19/177 , H04N19/102 , H04N19/154 , H04N19/164 , H04N19/46
摘要： A method includes encoding video at a first bitrate to produce first encoded sections, and at a second bitrate that is less than the first bitrate to produce second encoded sections. The method further includes measuring levels of objective quality, indicative of perceptual quality, of the first and second encoded sections. The method includes determining, based on the measured objective quality levels, replaceable sections among the first encoded sections, and replacement sections among the second encoded sections, each of the replacement sections to replace a corresponding one of the replaceable sections. The method includes streaming the first encoded sections except for the replaceable sections, and the replacement sections instead of their corresponding replaceable sections.
摘要翻译：一种方法包括以第一比特率编码视频以产生第一编码部分，并且以小于第一比特率的第二比特率产生第二编码部分。该方法还包括测量第一和第二编码部分的客观质量水平，指示感知质量。该方法包括基于所测量的目标质量水平来确定第一编码部分中的可更换部分和第二编码部分中的替换部分，每个替换部分替换相应的一个可替换部分。该方法包括将除可更换部分之外的第一编码部分和替换部分而不是其相应的可替换部分流式化。

29. 发明申请

US20160088051A1 FRAME PRIORITY SYSTEM 有权
标题翻译：框架优先系统
公开(公告)号：US20160088051A1
公开(公告)日：2016-03-24
申请号：US14493408
申请日：2014-09-23
申请人： Cisco Technology, Inc.
发明人： Sijia CHEN , Li YAO , Huade SHI , Yang HU
IPC分类号： H04L29/06 , H04N19/172 , H04N19/136
CPC分类号： H04L65/607 , H04L65/602 , H04N19/102 , H04N19/136 , H04N19/137 , H04N19/164 , H04N19/172 , H04N19/37
摘要： In one embodiment, a system for setting frame priority according to priority levels includes a video encoder to encode a first video frame of a live video stream yielding an encoded first video frame having a first priority level, and a processor to read, from a memory, an estimate of a time delay, the time delay being a time for data in the live video stream to be transferred from a first device to a second device, and determine if the estimate of the time delay exceeds a pre-defined delay, and wherein if the estimate of the time delay exceeds the pre-defined delay, the video encoder is operative to encode a second video frame with a higher priority level than the first priority level, the second video frame being a most recent video frame to be presented from the live video stream for encoding after the first video frame. Related apparatus and methods are also described.
摘要翻译：在一个实施例中，用于根据优先级设置帧优先级的系统包括视频编码器，用于编码实时视频流的第一视频帧，产生具有第一优先级的经编码的第一视频帧，以及处理器，用于从存储器，时间延迟的估计，作为实时视频流中的数据从第一设备传送到第二设备的时间的时间延迟，以及确定延迟的估计是否超过预定义的延迟，以及其中如果所述时间延迟的估计超过所述预定义的延迟，则所述视频编码器可操作地编码具有比所述第一优先级更高的优先级的第二视频帧，所述第二视频帧是要呈现的最新视频帧从实时视频流在第一视频帧之后进行编码。还描述了相关装置和方法。

30. 发明申请

US20160065957A1 Overlapped Rate Control for Video Splicing Applications 有权
标题翻译：视频拼接应用的重叠速率控制
公开(公告)号：US20160065957A1
公开(公告)日：2016-03-03
申请号：US14938653
申请日：2015-11-11
申请人： Dolby Laboratories Licensing Corporation
发明人： Athanasios Leontaris , Alexandros Tourapis
IPC分类号： H04N19/102 , H04N19/177
CPC分类号： H04N19/146 , H04N19/102 , H04N19/115 , H04N19/14 , H04N19/154 , H04N19/177 , H04N19/192 , H04N19/436
摘要： Rate control techniques are provided for encoding an input video sequence into a compressed coded bitstream with multiple coding passes. The final coding pass may comprise final splices with non-overlapping frames that do not extend into neighboring final splices. A final splice in the final coding pass may correspond to at least one non-final splice in a non-final coding pass. A non-final splice may have overlapping frames that extend into neighboring final splices in the final coding pass. The overlapping frames in the non-final splice may be used to derive complexity information about the neighboring final splices. The complexity information about the neighboring final splices, as derived from the overlapping frames, may be used to allocate or improve rate control related budgets in encoding the final splice into the compressed coded bitstream in the final coding pass.
摘要翻译：提供了速率控制技术，用于将输入视频序列编码成具有多个编码遍的压缩编码比特流。最终的编码通道可以包括具有不延伸到相邻的最终接头中的非重叠帧的最终接合。最终编码通路中的最终拼接可以对应于非最终编码通道中的至少一个非最终拼接。在最终的编码过程中，非最终的拼接可以具有延伸到相邻的最终拼接中的重叠的帧。非最终拼接中的重叠帧可用于导出关于相邻最终拼接的复杂度信息。关于从重叠帧导出的邻近最终拼接的复杂性信息可用于在最终编码通过中将最终拼接编码为压缩编码比特流中的速率控制相关预算分配或改进。

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