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21. 发明授权

US08913483B2 Fault tolerant managed switching element architecture 有权
标题翻译：容错管理型交换机架构
公开(公告)号：US08913483B2
公开(公告)日：2014-12-16
申请号：US13218468
申请日：2011-08-26
申请人： Benjamin L. Pfaff , Ethan J. Jackson , Teemu Koponen , Pankaj Thakkar
发明人： Benjamin L. Pfaff , Ethan J. Jackson , Teemu Koponen , Pankaj Thakkar
IPC分类号： H04J3/14 , H04L12/26 , H04L12/54 , G06F11/07 , G06F15/16 , H04L12/931 , H04L12/24
CPC分类号： H04L41/0893 , G06F11/07 , G06F15/17312 , H04L12/4633 , H04L41/0816 , H04L41/0853 , H04L41/0896 , H04L45/00 , H04L45/586 , H04L47/783 , H04L49/00 , H04L49/1546 , H04L49/3063 , H04L49/70 , H04L61/2007 , H04L61/6022
摘要： In a hierarchical switching architecture that includes at least one lower level managed switching element that connects to several higher level managed switching elements, some embodiments provide a method of identifying a higher level managed switching element to which the lower level managed switching element forwards a packet for further processing. The method computes a value based on a set of attributes of the packet. The method identifies a record from a hierarchy traversal table based on the computed value. The record specifies (1) a first higher level managed switching element as a primary higher level managed switching element and (2) a second higher level managed switching element as a secondary higher level managed switching element. The primary and secondary higher level managed switching elements are for forwarding the packet for further processing. The method forwards the packet to one of the higher level managed switching elements.
摘要翻译：在包括连接到几个更高级别的被管理交换单元的至少一个较低层管理的交换单元的分级交换体系结构中，一些实施例提供了一种识别较低层管理的交换单元的方法，下层管理交换单元向进一步处理。该方法基于数据包的一组属性计算一个值。该方法基于计算的值从层次结构遍历表中识别记录。该记录指定（1）第一较高级别的管理的交换元件作为主要的较高级别的管理的交换元件，以及（2）第二较高级别的管理的交换元件作为次要的上级管理的交换元件。主要和次要上级管理的交换元件用于转发数据包以进行进一步处理。该方法将数据包转发到较高层管理的交换元件之一。

22. 发明授权

US08842679B2 Control system that elects a master controller instance for switching elements 有权
标题翻译：选择用于切换元件的主控制器实例的控制系统
公开(公告)号：US08842679B2
公开(公告)日：2014-09-23
申请号：US13177543
申请日：2011-07-06
申请人： Teemu Koponen , Martin Casado
发明人： Teemu Koponen , Martin Casado
IPC分类号： H04L12/28 , H04L12/54 , G06F15/16 , G06F15/173 , H04L12/931 , H04L12/24 , G06F11/07
CPC分类号： H04L41/0893 , G06F11/07 , G06F15/17312 , H04L12/4633 , H04L41/0816 , H04L41/0853 , H04L41/0896 , H04L45/00 , H04L45/586 , H04L47/783 , H04L49/00 , H04L49/1546 , H04L49/3063 , H04L49/70 , H04L61/2007 , H04L61/6022
摘要： Some embodiments provide a control system for managing a network that includes several switching elements managed by the control system. The system includes several controller instances for managing the switching elements. Each particular controller instance includes a coordination manager for communicating with the coordination managers of the other controllers in order to partition control of the plurality of switching elements by electing a master controller for different sets of switching elements. The particular controller instance also includes a storage for storing control data for controlling the set of managed switching elements managed by the controller instance, and a switch interface for passing the control data to the set of managed switching elements.
摘要翻译：一些实施例提供了一种用于管理包括由控制系统管理的多个交换元件的网络的控制系统。该系统包括用于管理开关元件的几个控制器实例。每个特定控制器实例包括协调管理器，用于与其他控制器的协调管理器进行通信，以便通过为不同组的交换单元选择主控制器来分配多个交换单元的控制。特定控制器实例还包括用于存储控制数据的存储器，用于控制由控制器实例管理的一组被管理交换单元，以及切换接口，用于将控制数据传送到一组管理的交换元件。

23. 发明申请

US20140241359A1 PACKET PROCESSING VLIW ACTION UNIT WITH OR-MULTI-PORTED INSTRUCTION MEMORY 有权
标题翻译：分组处理具有多重指令记忆的VLIW动作单元
公开(公告)号：US20140241359A1
公开(公告)日：2014-08-28
申请号：US14190770
申请日：2014-02-26
申请人： Texas Instruments Incorporated
发明人： Patrick W. Bosshart , Hun-Seok Kim
IPC分类号： H04L12/741
CPC分类号： H04L45/745 , H04L45/74 , H04L45/7457 , H04L49/3063
摘要： An embodiment of the invention includes a memory and apparatus for packet processing in a switching network. The memory includes a plurality of words where each word includes a plurality of bits. Each word in the plurality of words is addressed by separate and distinct read address. A logic circuit performs a logical “OR” function on all the bit in all the words addressed by the separate and distinct read addresses and outputs a result.
摘要翻译：本发明的实施例包括用于交换网络中的分组处理的存储器和装置。存储器包括多个单词，其中每个单词包括多个位。多个单词中的每个单词通过单独和不同的读取地址来寻址。逻辑电路对由单独和不同读取地址寻址的所有单词中的所有位执行逻辑“或”功能，并输出结果。

24. 发明授权

US08718051B2 System and method for high speed packet transmission 有权
公开(公告)号：US08718051B2
公开(公告)日：2014-05-06
申请号：US12608985
申请日：2009-10-29
申请人： Yuen Fai Wong
发明人： Yuen Fai Wong
IPC分类号： H04L12/50
CPC分类号： H04L49/352 , H04L5/14 , H04L12/4645 , H04L45/745 , H04L45/7453 , H04L49/30 , H04L49/3063 , H04Q11/0428
摘要： The present invention provides systems and methods for providing data transmission speeds at or in excess of 10 gigabits per second between one or more source devices and one or more destination devices. According to one embodiment, the system of the present invention comprises a first and second media access control (MAC) interfaces to facilitate receipt and transmission of packets over an associated set of physical interfaces. The system also contemplates a first and second field programmable gate arrays (FPGA) coupled to the MAC interfaces and an associated first and second memory structures, the first and second FPGAs are configured to perform initial processing of packets received from the first and second MAC interfaces and to schedule the transmission of packets to the first and second MAC interface for transmission to one or more destination devices. The first and second FPGAs are further operative to dispatch and retrieve packets to and from the first and second memory structures. A third FPGA, coupled to the first and second memory structures and a backplane, is operative to retrieve and dispatch packets to and from the first and second memory structures, compute appropriate destinations for packets and organize packets for transmission. The third FPGA is further operative to receive and dispatch packets to and from the backplane.

25. 发明申请

US20140078902A1 Scalable Low Latency Multi-Protocol Networking Device 有权
标题翻译：可扩展的低延迟多协议网络设备
公开(公告)号：US20140078902A1
公开(公告)日：2014-03-20
申请号：US13767172
申请日：2013-02-14
申请人： CISCO TECHNOLOGY, INC.
发明人： Thomas J. Edsall , Putu Harry Subagio , Alessandro Fulli , Christopher A. Wildman , Mingzhe Li , Wei-Jen Huang , Chih-Tsung Huang
IPC分类号： H04L12/70
CPC分类号： H04L49/25 , H04L29/0653 , H04L43/04 , H04L45/74 , H04L45/745 , H04L47/12 , H04L47/70 , H04L49/251 , H04L49/253 , H04L49/3009 , H04L49/3063 , H04L49/355 , H04L49/9057 , H04L69/22
摘要： A network device receives a packet that includes a plurality of sets of fields. Sets of fields of the packet are parsed and the field sets are evaluated as soon as they are available to determine whether a processing decision can be made on the packet. Additional field sets may be parsed from the packet and obtained in parallel with determining whether a processing decision can be made, but once it is determined that a processing decision can be made, the evaluating of field sets is terminated such that any further field sets of the packet are ignored for purposes of making a processing decision for the packet.
摘要翻译：网络设备接收包括多组字段的分组。对数据包的字段进行解析，并且一旦可用，即可对字段集进行评估，以确定是否可以对数据包进行处理决定。可以从分组中分析附加的字段集，并且与确定是否可以进行处理决定并行获得，但是一旦确定可以进行处理决定，则终止场集合的评估，使得任何另外的字段集合为了对分组进行处理决定，该分组被忽略。

26. 发明授权

US08571031B2 Configurable frame processing pipeline in a packet switch 有权
标题翻译：可配置的帧处理流水线在分组交换机中
公开(公告)号：US08571031B2
公开(公告)日：2013-10-29
申请号：US12575175
申请日：2009-10-07
申请人： Michael Davies , Robert Southworth
发明人： Michael Davies , Robert Southworth
IPC分类号： H04L12/28 , H04L12/56
CPC分类号： H04L49/1546 , H04L49/3009 , H04L49/3063 , H04L49/9094
摘要： Highly configurable frame processing pipelines are enabled in packet switches in an efficient manner which satisfies stringent area and power requirements. Frame processing pipelines are described that enable dynamic processing of different types of frames on a per frame basis.
摘要翻译：以高效的方式在分组交换机中启用高度可配置的帧处理流水线，满足严格的区域和功率要求。描述了帧处理管线，其能够以每帧为基础来动态处理不同类型的帧。

27. 发明授权

US08514855B1 Extensible packet processing architecture 有权
标题翻译：可扩展包处理架构
公开(公告)号：US08514855B1
公开(公告)日：2013-08-20
申请号：US12773120
申请日：2010-05-04
申请人： Perry J. Robertson , Jason R. Hamlet , Lyndon G. Pierson , Ronald R. Olsberg , Guy D. Chun
发明人： Perry J. Robertson , Jason R. Hamlet , Lyndon G. Pierson , Ronald R. Olsberg , Guy D. Chun
IPC分类号： H04L12/28
CPC分类号： H04L49/3063
摘要： A technique for distributed packet processing includes sequentially passing packets associated with packet flows between a plurality of processing engines along a flow through data bus linking the plurality of processing engines in series. At least one packet within a given packet flow is marked by a given processing engine to signify by the given processing engine to the other processing engines that the given processing engine has claimed the given packet flow for processing. A processing function is applied to each of the packet flows within the processing engines and the processed packets are output on a time-shared, arbitered data bus coupled to the plurality of processing engines.
摘要翻译：一种用于分布式分组处理的技术包括在多个处理引擎之间沿着连接多个处理引擎串联的数据总线的流程顺序地传递与分组流相关联的分组。给定分组流中的至少一个分组由给定的处理引擎标记，由给定的处理引擎指示给定处理引擎已经要求给定的分组流进行处理的其他处理引擎。处理功能被应用于处理引擎内的每个分组流，并且处理的分组在耦合到多个处理引擎的时间共享的仲裁数据总线上输出。

28. 发明申请

US20130060738A1 DISTRIBUTED NETWORK CONTROL SYSTEM WITH A DISTRIBUTED HASH TABLE 有权
标题翻译：分布式网络控制系统
公开(公告)号：US20130060738A1
公开(公告)日：2013-03-07
申请号：US13218433
申请日：2011-08-25
申请人： Teemu Koponen , Martin Casado , Jeremy Stribling , Natasha Gude
发明人： Teemu Koponen , Martin Casado , Jeremy Stribling , Natasha Gude
IPC分类号： G06F17/30
CPC分类号： H04L41/0893 , G06F11/07 , G06F15/17312 , H04L12/4633 , H04L41/0816 , H04L41/0853 , H04L41/0896 , H04L45/00 , H04L45/586 , H04L47/783 , H04L49/00 , H04L49/1546 , H04L49/3063 , H04L49/70 , H04L61/2007 , H04L61/6022
摘要： A network control system that includes several controllers for managing several switching elements and a distributed hash table (DHT) formed across the controllers for storing data regarding the switching elements that is accessible by the controllers. Each hash table serves as a DHT instance. In some embodiments, the DHT instances of all controller instances collectively store one set of records that is indexed based on hashed indices for quick access. These records are distributed across the different controller instances to minimize the size of the records within each instance and to allow for the size of the DHT to be increased by adding other DHT instances. According to this scheme, each DHT record is not stored in each controller instance. In fact, in some embodiments, each DHT record is stored in at most one controller instance.
摘要翻译：一种网络控制系统，其包括用于管理多个交换元件的多个控制器和跨越控制器形成的分布式哈希表（DHT），用于存储关于控制器可访问的交换元件的数据。每个哈希表用作DHT实例。在一些实施例中，所有控制器实例的DHT实例共同地存储基于用于快速访问的散列索引进行索引的一组记录。这些记录分布在不同的控制器实例之间，以最小化每个实例中记录的大小，并允许通过添加其他DHT实例来增加DHT的大小。根据该方案，每个DHT记录不存储在每个控制器实例中。事实上，在一些实施例中，每个DHT记录被存储在至多一个控制器实例中。

29. 发明申请

US20130058357A1 DISTRIBUTED NETWORK VIRTUALIZATION APPARATUS AND METHOD 有权
标题翻译：分布式网络虚拟化设备和方法
公开(公告)号：US20130058357A1
公开(公告)日：2013-03-07
申请号：US13177531
申请日：2011-07-06
申请人： Teemu Koponen , Pankaj Thakkar , Martin Casado , W. Andrew Lambeth
发明人： Teemu Koponen , Pankaj Thakkar , Martin Casado , W. Andrew Lambeth
IPC分类号： H04L12/56 , H04L12/54
CPC分类号： H04L41/0893 , G06F11/07 , G06F15/17312 , H04L12/4633 , H04L41/0816 , H04L41/0853 , H04L41/0896 , H04L45/00 , H04L45/586 , H04L47/783 , H04L49/00 , H04L49/1546 , H04L49/3063 , H04L49/70 , H04L61/2007 , H04L61/6022
摘要： Some embodiments provide a distributed control system for controlling managed switching elements of a network. The distributed control system comprises a first network virtualizer for converting a first set of input logical forwarding plane data to a first set of output physical control plane data. It also includes a second network virtualizer for converting a second set of input logical forwarding plane data to a second set of output physical control plane data. In some embodiments, the physical control plane data is translated into physical forwarding behaviors that direct the forwarding of data by the managed switching elements.
摘要翻译：一些实施例提供用于控制网络的被管理交换单元的分布式控制系统。分布式控制系统包括用于将第一组输入逻辑转发平面数据转换为第一组输出物理控制平面数据的第一网络虚拟器。它还包括用于将第二组输入逻辑转发平面数据转换为第二组输出物理控制平面数据的第二网络虚拟器。在一些实施例中，物理控制平面数据被转换成物理转发行为，其指导被管理的交换元件转发数据。

30. 发明申请

US20130058331A1 DEPLOYMENT OF HIERARCHICAL MANAGED SWITCHING ELEMENTS 有权
标题翻译：分配管理的开关元件的部署
公开(公告)号：US20130058331A1
公开(公告)日：2013-03-07
申请号：US13288023
申请日：2011-11-02
申请人： Pankaj Thakkar , Teemu Koponen , Paul S. Ingram , Peter J. Balland, III
发明人： Pankaj Thakkar , Teemu Koponen , Paul S. Ingram , Peter J. Balland, III
IPC分类号： H04L12/56
CPC分类号： H04L41/0893 , G06F11/07 , G06F15/17312 , H04L12/4633 , H04L41/0816 , H04L41/0853 , H04L41/0896 , H04L45/00 , H04L45/586 , H04L47/783 , H04L49/00 , H04L49/1546 , H04L49/3063 , H04L49/70 , H04L61/2007 , H04L61/6022
摘要： Some embodiments provide a method that identifies several higher level switching elements for facilitating lower level switching elements to forward packets among network hosts. The method establishes a set of tunnels among the lower level switching elements and the higher level switching elements. At least one tunnel is established between a lower level switching element and a higher level switching element. For each higher level switching element in the several higher level switching elements, the method identifies a first set of forwarding data that specifies forwarding of packets between the higher level switching element and the several lower level switching elements. For each lower level switching element in the several lower level switching elements, the method identifies a second set of forwarding data that specifies forwarding of packets between the lower level switching element, the several of network hosts, and the several higher level switching elements.
摘要翻译：一些实施例提供了一种识别多个更高级别的交换元件以促进下层交换元件在网络主机之间转发分组的方法。该方法在较低级别的开关元件和较高级别的开关元件之间建立一组隧道。在较低级别的开关元件和较高级别的开关元件之间建立至少一个通道。对于多个较高级别的交换单元中的每个较高级别的交换单元，该方法识别第一组转发数据，该第一组转发数据指定在较高级别的开关元件和多个较低级别的开关元件之间转发分组。对于多个下层交换单元中的每个下级交换单元，该方法识别第二组转发数据，该第二组转发数据指定在下层交换单元，若干网络主机与多个较高级别的交换单元之间转发分组。

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