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21. 发明授权

US07091725B2 Fast, high-resolution, indirect measurement of a physical value 有权
标题翻译：快速，高分辨率，间接测量物理价值
公开(公告)号：US07091725B2
公开(公告)日：2006-08-15
申请号：US10810340
申请日：2004-03-26
申请人： Pavel Horsky , Ivan Koudar
发明人： Pavel Horsky , Ivan Koudar
IPC分类号： G01R27/02 , G01R27/08
CPC分类号： G01D3/028 , H03M3/324 , H03M3/356
摘要： A measurement method or system for measuring a physical value comprises, during a same clock cycle, forming an input signal, a reference signal and an offset signal, the input signal including a parasitic value and a useful measurement value. A relationship between the input signal where the parasitic value has been cancelled out, and the reference signal is derived. From this relationship, a value relating to the physical value is determined. The input signal, reference signal and offset signal are respectively associated with an input element, a reference element and a parasitic element. All elements have a common driving signal, and the parasitic value is depending on the common driving signal. The fact that different signals are formed during a same measurement cycle, and that these signals are sufficient to obtain the desired physical value, makes the measurement method or system of the present invention faster than prior art measurement methods or systems: only one conversion cycle is needed against two cycles needed for dual slope analog-to-digital conversion.
摘要翻译：用于测量物理值的测量方法或系统包括在同一时钟周期内形成输入信号，参考信号和偏移信号，所述输入信号包括寄生值和有用测量值。导出寄生值已被抵消的输入信号与参考信号之间的关系。根据该关系，确定与物理值有关的值。输入信号，参考信号和偏移信号分别与输入元件，参考元件和寄生元件相关联。所有元件均具有公共驱动信号，寄生值取决于公共驱动信号。在相同测量周期内形成不同信号，并且这些信号足以获得所需物理值的事实使得本发明的测量方法或系统比现有技术的测量方法或系统更快：只有一个转换周期是需要双斜率模数转换所需的两个周期。

22. 发明申请

US20060164273A1 Self-tuning output digital filter for direct conversion delta-sigma transmitter 失效
标题翻译：自调谐输出数字滤波器，用于直接转换delta-sigma发射器
公开(公告)号：US20060164273A1
公开(公告)日：2006-07-27
申请号：US11337189
申请日：2006-01-20
申请人： Ronald Hickling
发明人： Ronald Hickling
IPC分类号： H03M3/00
CPC分类号： H03H15/00 , H03H2015/007 , H03M3/324 , H03M3/41 , H03M3/504 , H04B1/0475 , H04B1/30
摘要： A self-tuning filter that is well suited for use as a output digital filter in a direct conversion delta-sigma transmitter is constructed as a high pass finite impulse response filter having a cutoff frequency of twice the desired carrier frequency. The filter is clocked using the same clock as used for the commutatation within the transmitter. The aliasing effect of the digital filter produces a passband centered around the carrier frequency which allows the information contained in the spectrum around the passband to be transmitted, while effectively filtering out the quantization noise produced by the commutation. When the commutator clock frequency is changed in order to change the carrier frequency, the passband automatically moves to track the new carrier frequency. The output filter may be constructed using series connected flip-flops with analog taps and an analog summer connected to respective Q and {overscore (Q)} outputs, thereby producing an analog output.
摘要翻译：非常适合用作直接转换Δ-Σ发射器中的输出数字滤波器的自调谐滤波器被构造为具有两倍于期望载波频率的截止频率的高通有限脉冲响应滤波器。滤波器使用与发射机内通信所使用的时钟相同的时钟。数字滤波器的混叠效应产生以载波频率为中心的通带，其允许在通带周围的频谱中包含的信息被发送，同时有效地滤除由换向产生的量化噪声。当换向器时钟频率改变以改变载波频率时，通带自动移动以跟踪新的载波频率。输出滤波器可以使用具有模拟抽头和模拟加法器的串联连接的触发器连接到相应的Q和（过滤（Q输出，从而产生模拟输出）。

23. 发明申请

US20050024248A1 Sigma-delta modulator having a clocked delay line 有权
标题翻译：具有时钟延迟线的Σ-Δ调制器
公开(公告)号：US20050024248A1
公开(公告)日：2005-02-03
申请号：US10909182
申请日：2004-07-30
申请人： Rudolf Koch
发明人： Rudolf Koch
IPC分类号： H03K5/14 , H03M1/12 , H03M3/00 , H03M3/02
CPC分类号： H03M3/324 , H03M3/43 , H03M3/454
摘要： A sigma-delta modulator is provided with a filter for noise shaping, with the filter having at least one delay line (DL). The delay line (DL) is a clocked line.
摘要翻译： Σ-Δ调制器设置有用于噪声整形的滤波器，滤波器具有至少一个延迟线（DL）。延迟线（DL）是时钟线。

24. 发明授权

US4951052A Correction of systematic error in an oversampled analog-to-digital converter 失效
标题翻译：过采样模数转换器中的系统误差校正
公开(公告)号：US4951052A
公开(公告)日：1990-08-21
申请号：US378557
申请日：1989-07-10
申请人： Philippe L. Jacob , Steven L. Gaverick
发明人： Philippe L. Jacob , Steven L. Gaverick
IPC分类号： H03M3/04 , H03M3/02 , H04B14/06
CPC分类号： H03M3/324 , H04B14/062 , H03M3/43 , H03M3/456
摘要： A method for performing oversampled analog-to-digital conversion of an input signal to generate a conversion result signal essentially free of systematic errors in accordance with the invention includes the steps of: performing oversampled analog-to-digital conversion of the input signal to generate a preliminary conversion result signal accompanied by systematic error, performing oversampled analog-to-digital conversion of a zero-valued signal to generate a correction signal essentially consisting of a corresponding systematic error, and differentially combining the correction signal and the preliminary conversion result signal to generate the conversion result essentially free of systematic errors. In a structural embodiment of the invention the systematic error in an oversampled analog-to-digital converter is suppressed by subtracting from the conversion response the response of a similar oversampled analog-to-digital converter to the reference voltage as its analog input signal.

25. 发明申请

US20190089368A1 APPARATUS FOR REDUCING WANDERING SPURS IN A FRACTIONAL-N FREQUENCY SYNTHESIZER 审中-公开
公开(公告)号：US20190089368A1
公开(公告)日：2019-03-21
申请号：US16041648
申请日：2018-07-20
申请人： UNIVERSITY COLLEGE CORK - NATIONAL UNIVERSITY OF IRELAND, CORK
发明人： Hongjia Mo , Michael Peter Kennedy
IPC分类号： H03M3/00
CPC分类号： H03M3/414 , H03M3/324 , H03M3/33 , H03M3/394 , H03M3/434
摘要： The present invention provides a fractional-N frequency synthesizer comprising a divider controller comprising a multistage noise Shaping (MASH) digital delta-sigma modulator comprising L stages, wherein the Lth stage is configured to receive as an input a high amplitude dither signal.

26. 发明申请

US20170134039A1 Delta-Sigma ADC With Wait-For-Sync Feature 有权
公开(公告)号：US20170134039A1
公开(公告)日：2017-05-11
申请号：US15281354
申请日：2016-09-30
申请人： Texas Instruments Incorporated
发明人： Robert James Landers
IPC分类号： H03M3/00 , G06F13/16 , G06F13/24
CPC分类号： H03M3/462 , G06F13/1673 , G06F13/1689 , G06F13/24 , H03M3/324
摘要： An integrated circuit (IC) chip containing a Delta-Sigma (ΔΣ) filter module for a ΔΣ analog-to-digital converter and a method of providing analog to digital conversion are disclosed. The IC chip includes a ΔΣ filter that is connected to receive a digital data stream created by a ΔΣ modulator, provide a multibit data value when a counter reaches a selected number of received bits, and reset the counter responsive to receiving a synchronization pulse. The IC chip also includes a FIFO buffer connected to store the multibit data value only when a synchronization flag is on and to send an interrupt towards a processing unit only after storing a selected number of multibit data values. The IC chip further includes a synchronization module connected to turn on the synchronization flag responsive to receiving the synchronization pulse and to turn off the synchronization flag responsive to the sending of the interrupt.

27. 发明授权

US09231613B2 Idle tone dispersion device and frequency measurement device 有权
标题翻译：空闲音分离装置和频率测量装置
公开(公告)号：US09231613B2
公开(公告)日：2016-01-05
申请号：US14712087
申请日：2015-05-14
申请人： Seiko Epson Corporation
发明人： Masayoshi Todorokihara
IPC分类号： H03M3/00
CPC分类号： H03M3/346 , G01R23/12 , H03M3/30 , H03M3/324 , H03M3/396 , H03M3/466 , H03M3/472
摘要： An idle tone dispersion device includes n FDSM (1) to FDSM (n), a phase adjustment unit which relatively adjusts a phase between a measured signal and a reference signal such that a phase of an idle tone is completely different, and generates and supplies n sets of output measured signals and output reference signals to each of the n FDSM (1) to FDSM (n), and an adder which adds output data of the n FDSM (1) to FDSM (n) and outputs a frequency delta-sigma modulation signal.
摘要翻译：空闲色散分散装置包括nFDSM（1）至FDSM（n），相位调整单元，其相对调节测量信号和参考信号之间的相位，使得空闲音调的相位完全不同，并产生和提供 n个输出测量信号和输出参考信号到n FDSM（1）至FDSM（n）中的每一个，以及将n个FDSM（1）的输出数据加到FDSM（n）的加法器，并输出频率Δ- Σ调制信号。

28. 发明授权

US08779704B2 Motor control apparatus equipped with delta-sigma modulation AD converter 有权
标题翻译：配有Δ-Σ调制AD转换器的电机控制装置
公开(公告)号：US08779704B2
公开(公告)日：2014-07-15
申请号：US13793346
申请日：2013-03-11
申请人： Fanuc Corporation
发明人： Yasusuke Iwashita , Taku Sasaki
IPC分类号： H02P6/06
CPC分类号： H02P6/14 , H03M3/324 , H03M3/458
摘要： A motor control apparatus includes a power conversion unit which supplies drive power to a motor, a current detection unit which detects the value of a current flowing from the power conversion unit to the motor, a delta-sigma modulation AD converter which converts the current value into digital data by using a modulation clock as a system clock, and which starts to count the number of clock pulses of the modulation clock upon reception of a reference signal and, when the number of clock pulses counted reaches a predetermined count value, outputs the digital data obtained during a prescribed time interval which contains the reception time of the reference signal, and a command generating unit which generates, using the digital data supplied from the delta-sigma modulation AD converter, a drive command for commanding the power conversion unit to output commanded drive power.
摘要翻译：电动机控制装置包括向电动机供给驱动电力的电力转换单元，检测从电力转换单元流向电动机的电流的值的电流检测单元，将该电流值转换为电流值的Δ-Σ调制AD转换器通过使用调制时钟作为系统时钟转换为数字数据，并且在接收到参考信号时开始对调制时钟的时钟脉冲数进行计数，当计数的时钟脉冲数达到预定计数值时，输出在包含参考信号的接收时间的规定时间间隔内获得的数字数据，以及命令产生单元，其使用从Δ-Σ调制AD转换器提供的数字数据产生用于将功率转换单元命令的驱动命令输出指令驱动电源。

29. 发明授权

US08018364B2 Control apparatus for a load supply device 有权
标题翻译：用于负载供应装置的控制装置
公开(公告)号：US08018364B2
公开(公告)日：2011-09-13
申请号：US12646813
申请日：2009-12-23
申请人： Giuseppe Maiocchi
发明人： Giuseppe Maiocchi
IPC分类号： H03M3/00
CPC分类号： H03M1/0845 , H03M1/822 , H03M3/324 , H03M3/506
摘要： A control apparatus for a supply device of a load, the supply device is of switching type and connected between a supply voltage and a reference voltage, the apparatus including a sigma-delta device having an input terminal at which is present a first digital signal and adapted to provide a pulse-density modulation signal at the output terminal; the sigma-delta device including a feedback circuit capable of sending to the input terminal of the sigma-delta device a second digital signal whose value depends on the value of the output signal, and the apparatus including a device capable of digitalizing the supply voltage and of providing a further digital signal. The feedback circuit includes a terminal capable of receiving the further digital signal, and the sigma-delta device having a gain such that the output digital signal is proportional to the inverse of the further digital signal.
摘要翻译：一种用于负载的供应装置的控制装置，所述供应装置是开关型的并且连接在电源电压和参考电压之间，所述装置包括具有输入端的Σ-Δ装置，所述输入端存在第一数字信号，适于在输出端提供脉冲密度调制信号; 所述Σ-Δ器件包括能够向Σ-Δ器件的输入端子发送其值取决于输出信号的值的第二数字信号的反馈电路，并且该器件包括能够对电源电压进行数字化的器件;以及提供另一个数字信号。反馈电路包括能够接收另外的数字信号的终端，以及具有增益的Σ-Δ装置，使得输出数字信号与另外的数字信号的反比成比例。

30. 发明申请

US20100156687A1 CONTROL APPARATUS FOR A LOAD SUPPLY DEVICE 有权
标题翻译：负载供电装置的控制装置
公开(公告)号：US20100156687A1
公开(公告)日：2010-06-24
申请号：US12646813
申请日：2009-12-23
申请人： Giuseppe Maiocchi
发明人： Giuseppe Maiocchi
IPC分类号： H03M3/00
CPC分类号： H03M1/0845 , H03M1/822 , H03M3/324 , H03M3/506
摘要： A control apparatus for a supply device of a load, the supply device is of switching type and connected between a supply voltage and a reference voltage, the apparatus including a sigma-delta device having an input terminal at which is present a first digital signal and adapted to provide a pulse-density modulation signal at the output terminal; the sigma-delta device including a feedback circuit capable of sending to the input terminal of the sigma-delta device a second digital signal whose value depends on the value of the output signal, and the apparatus including a device capable of digitalizing the supply voltage and of providing a further digital signal. The feedback circuit includes a terminal capable of receiving the further digital signal, and the sigma-delta device having a gain such that the output digital signal is proportional to the inverse of the further digital signal.
摘要翻译：一种用于负载的供应装置的控制装置，所述供应装置是开关型的并且连接在电源电压和参考电压之间，所述装置包括具有输入端的Σ-Δ装置，所述输入端存在第一数字信号，适于在输出端提供脉冲密度调制信号; 所述Σ-Δ器件包括能够向Σ-Δ器件的输入端子发送其值取决于输出信号的值的第二数字信号的反馈电路，并且该器件包括能够对电源电压进行数字化的器件;以及提供另一个数字信号。反馈电路包括能够接收另外的数字信号的终端，以及具有增益的Σ-Δ装置，使得输出数字信号与另外的数字信号的反比成比例。

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