专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明授权

US4550308A Signal converting apparatus 失效
标题翻译：信号转换装置
公开(公告)号：US4550308A
公开(公告)日：1985-10-29
申请号：US486840
申请日：1983-04-20
申请人： Norihito Tokura , Hisasi Kawai , Tokio Kohama , Kenji Kanehara
发明人： Norihito Tokura , Hisasi Kawai , Tokio Kohama , Kenji Kanehara
IPC分类号： H03M1/52 , H03K7/08 , H03M1/00 , H03K13/20
CPC分类号： H03K7/08 , H03M1/504
摘要： A signal converting apparatus for converting voltage into a pulse signal with a corresponding pulse-width comprises a switching circuit for selecting either one of an input voltage to be converted or a constant voltage depending upon a binary switching signal. The selected voltage is integrated with respect to time by an integrating circuit. When the output from the integrating circuit has reached an upper limit voltage or a lower limit voltage, the above-mentioned binary switching signal which is an output signal of this signal converting apparatus is inverted by a comparator/inverter circuit.
摘要翻译：用于将电压转换成具有相应脉冲宽度的脉冲信号的信号转换装置包括用于根据二进制切换信号选择要转换的输入电压或恒定电压中的任一个的开关电路。所选择的电压通过积分电路相对于时间积分。当积分电路的输出达到上限电压或下限电压时，作为该信号转换装置的输出信号的上述二进制开关信号由比较器/反相器电路反相。

22. 发明授权

US4118696A Precision voltage to frequency converter for use in A/D converter 失效
标题翻译：用于A / D转换器的精密电压到变频器
公开(公告)号：US4118696A
公开(公告)日：1978-10-03
申请号：US745036
申请日：1976-11-24
申请人： Donald Paul Warther
发明人： Donald Paul Warther
IPC分类号： H03K7/06 , H03M1/00 , H03K13/20
CPC分类号： H03K7/06 , H03M1/504
摘要： An analog-to-frequency converter to provide an open-loop encoder of analog signals. An analog signal is injected into a voltage-to-frequency (VFO) converter to change the analog signal to a duty cycle having an UP-time to DOWN-time ratio equal to the ratio between the input analog voltage and an externally applied precision voltage level. The duty cycle signal is then "ANDED" with a clock signal to form a VFO signal pulse train which is essentially the clock signal during the UP time of the duty cycle signal. The maximum count of a clock signal counter determines the sampling period. The VFO pulses are accumulated during the sampling period so that when the clock signal counter reaches the maximum count, the accumulated number is transferred to a storage register and the accumulator reset to zero in preparation to receive and accumulate the VFO signals of the next sample period. This transfer is made in response to signals from a time-gate generator. The clock signal synchronizes the VFO converter and the time-gate generator so that the overall accuracy is a function of the clock's short-term stability rather than an accurate time-base signal pulse width. High VFO input to output isolation may be achieved by optically coupling the input to the output signal and providing transformer coupling between the power source and the output signal ground to thereby achieve a floating output voltage.
摘要翻译：模拟 - 频率转换器，用于提供模拟信号的开环编码器。模拟信号被注入到电压 - 频率（VFO）转换器中，以将模拟信号改变为具有等于输入模拟电压和外部施加的精密电压之间的比率的UP时间到下降时间比的占空比水平。占空比信号随时钟信号“ANDED”，以形成一个VFO信号脉冲串，它在占空比信号的UP时间内基本上是时钟信号。时钟信号计数器的最大计数确定采样周期。在采样周期期间累积VFO脉冲，使得当时钟信号计数器达到最大计数时，累加数被传送到存储寄存器，并且累加器复位为零以准备接收并累积下一采样周期的VFO信号。响应于来自时间门发生器的信号进行该传送。时钟信号使VFO转换器和时间栅极发生器同步，使得整体精度是时钟的短期稳定性的函数，而不是准确的时基信号脉冲宽度。可以通过将输入光耦合到输出信号并且在电源和输出信号地之间提供变压器耦合从而实现浮动输出电压来实现高VFO输入到输出隔离。

23. 发明授权

US4064504A Digital coding of angles 失效
标题翻译：角度数字编码
公开(公告)号：US4064504A
公开(公告)日：1977-12-20
申请号：US562082
申请日：1975-03-26
申请人： Marc Lepetit , Philippe Angelle , Jacques Bodin , Dominique DU Boisbaudry
发明人： Marc Lepetit , Philippe Angelle , Jacques Bodin , Dominique DU Boisbaudry
IPC分类号： H03M1/00 , G08C9/06
CPC分类号： H03M1/504 , H03M1/305
摘要： In a digital angle coder, a revolving disc bears a first series of marks ularly spaced around its axis, capable of being read by two diametrically-opposed fixed heads, and a second series of marks equal in number to the first, regularly spaced around the axis and capable of being read by two diametrically opposed movable heads. Each of the heads includes, for example, a grid reproducing a portion of the series of marks, a photo-emission element and a photo-receiving element. A first auxiliary mark may be read by a fixed auxiliary head and a second auxiliary mark may be read by a movable auxiliary head.
摘要翻译：在数字角度编码器中，旋转盘承载围绕其轴规则间隔的第一系列标记，能够被两个直径相对的固定头读取，并且第二系列的标记数量等于第一组，并且能够被两个直径相对的可移动头读取。每个头包括例如再现该系列标记的一部分的网格，光发射元件和光接收元件。第一辅助标记可以由固定辅助头读取，并且第二辅助标记可以由可移动辅助头读取。

24. 发明授权

US11658673B2 Driver circuitry 有权
公开(公告)号：US11658673B2
公开(公告)日：2023-05-23
申请号：US17380176
申请日：2021-07-20
申请人： Cirrus Logic International Semiconductor Ltd.
发明人： Ross C. Morgan , Tahir Rashid , Jonathan Taylor
IPC分类号： H03M1/10 , H02P7/295 , G05F3/26 , H02J7/00 , H03K7/08 , H02M3/156 , H03M1/50 , H02P7/29
CPC分类号： H03M1/1071 , G05F3/262 , H02J7/0063 , H02J7/007182 , H02M3/156 , H02P7/29 , H02P7/295 , H03K7/08 , H03M1/504
摘要： The present disclosure relates to circuitry comprising: digital circuitry configured to generate a digital output signal; and monitoring circuitry configured to monitor a supply voltage to the digital circuitry and to output a control signal for controlling operation of the digital circuitry, wherein the control signal is based on the supply voltage.

25. 发明公开

US20230155604A1 SINGLE-ENDED ANALOG SIGNAL RECEIVER APPARATUS 审中-公开
公开(公告)号：US20230155604A1
公开(公告)日：2023-05-18
申请号：US17982352
申请日：2022-11-07
申请人： HARMAN INTERNATIONAL INDUSTRIES, INCORPORATED
发明人： Jason Anthony GREENSLADE
IPC分类号： H03M1/80 , H03M1/20 , H03M1/50
CPC分类号： H03M1/808 , H03M1/205 , H03M1/504
摘要： A single-ended analog signal receiver apparatus is provided, which can cope with an external ground current and an undefined impedance through an AC bootstrap input impedance, while considering electromagnetic compatibility, convert a received single-ended analog signal into a balanced output differential signal, and may provide at a post-stage circuit output an output signal with lower noise through common mode rejection.

26. 发明授权

US10491234B1 Configurable oversampling for an analog-to-digital converter 有权
公开(公告)号：US10491234B1
公开(公告)日：2019-11-26
申请号：US16200236
申请日：2018-11-26
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Manish Bhardwaj , Devin Allen Cottier , David Peter Foley
IPC分类号： H03M1/50 , H03M3/00 , H03M1/36
CPC分类号： H03M3/34 , H03M1/361 , H03M1/504
摘要： A system includes a central processing unit (CPU) core, and a pulse width modulator (PWM) controller configured to generate a PWM control signal having a PWM cycle. The system also includes an analog-to-digital converter (ADC), an accumulator, a sum register, and an oversampling register set. The oversampling register set is configurable by the CPU core to specify time points during each PWM cycle when the ADC is to convert an analog signal to a digital sample to produce a plurality of digital samples. The time spacing between consecutive digital samples varies among the specified time points. The accumulator accumulates digital samples from the ADC and stores an accumulated sum in the sum register. The CPU core reads the accumulated sum from the sum register, and can use the accumulated sum to calculate a metric (e.g., an average) of the digital samples.

27. 发明申请

US20180351569A1 MODULATORS 审中-公开
公开(公告)号：US20180351569A1
公开(公告)日：2018-12-06
申请号：US15991619
申请日：2018-05-29
申请人： Cirrus Logic International Semiconductor Ltd.
发明人： John Paul LESSO , David Paul SINGLETON
IPC分类号： H03M1/50 , H03M1/08 , H03M1/06 , H03M1/34
CPC分类号： H03M1/504 , H03M1/0604 , H03M1/0626 , H03M1/0854 , H03M1/182 , H03M1/34 , H03M1/508
摘要： This application relates time-encoding modulators such as may be used as part of analogue-to-digital conversion. A time-encoding modulator (100) receives an analogue input signal (SIN) at an input node (102) and outputs a corresponding time-encoded signal (SOUT) at an output node (103). A hysteretic comparator (101) has a first comparator input connected to the input node and a comparator output connected to the output node. A feedback path extends between the output node and a second comparator input of the hysteretic comparator; with a filter arrangement (104) arranged to apply filtering to the feedback path. The hysteretic comparator (101) compares the input signal (SIN) to the feedback signal (SFB) with hysteresis. This provides a pulse-width modulated output signal (SOUT) where the duty cycle encodes the input signal (SIN).

28. 发明申请

US20160370410A1 SENSOR DEVICE AND SENSING METHOD USING THE SAME 有权
标题翻译：传感器装置和使用该传感器的传感方法
公开(公告)号：US20160370410A1
公开(公告)日：2016-12-22
申请号：US14751528
申请日：2015-06-26
申请人： ELSSEN
发明人： Ji Man Park
IPC分类号： G01R27/26 , A61B5/0402 , G01R27/02
CPC分类号： G01R27/2605 , A61B5/0428 , G01R27/02 , H03M1/00 , H03M1/123 , H03M1/504
摘要： Provided are a sensor device and a sensing method using the same. The sensor device according to the present invention includes: a sensing voltage generating unit outputting different voltage values depending on an external environment; a pulse generating unit generating a pulse having a period which is proportional to an input voltage; a divider dividing an output of the pulse generating unit; and a counter unit measuring a length of an output pulse of the divider in a clock unit. As a result, the sensor device including an analog-digital converter (ADC) using a pulse width modulation technology is a miniature device and has high resolution.
摘要翻译：提供了一种传感器装置和使用该传感器装置的感测方法。根据本发明的传感器装置包括：感测电压产生单元，其根据外部环境输出不同的电压值; 产生具有与输入电压成比例的周期的脉冲的脉冲发生单元; 除法器，分割脉冲发生单元的输出; 以及计数器单元，测量时钟单元中分频器的输出脉冲的长度。结果，包括使用脉冲宽度调制技术的模数转换器（ADC）的传感器装置是微型装置并且具有高分辨率。

29. 发明申请

US20160359500A1 ANALOGUE-TO-DIGITAL CONVERTER 有权
公开(公告)号：US20160359500A1
公开(公告)日：2016-12-08
申请号：US15243305
申请日：2016-08-22
申请人： Cirrus Logic International Semiconductor Ltd.
发明人： John Paul LESSO , Emmanuel Philippe Christian HARDY
IPC分类号： H03M7/30
CPC分类号： H03M7/30 , H03K7/08 , H03K9/08 , H03M1/18 , H03M1/181 , H03M1/50 , H03M1/504 , H03M3/484 , H03M2201/00
摘要： This application relates to analogue-to-digital converters (ADCs). An ADC 200 has a first converter (201) for receiving an analogue input signal (AIN) and outputting a time encode signal (DT), such as a pulse-width-modulated (PWM) signal, based on input signal and a first conversion gain setting (GIN). In some embodiments the first converter has a PWM modulator (401) for generating a PWM signal such that the input signal is encoded by pulse widths that can vary continuously in time. A second converter (202) receives the time encoded signal and outputs a digital output signal (DOUT) based on the time encoded signal (DT) and a second conversion gain setting (GO). The second converter may have a first PWM-to-digital modulator (403). A gain allocation block (204) generates the first and second conversion gain settings based on the time encoded signal (DT). The gain allocation block (204) may have a second PWM-to-digital modulator (203) which may be of lower latency and/or lower resolution that the first PWM-to-digital modulator (403).

30. 发明授权

US09000345B2 Ambient light sensing module with signal generation function 有权
标题翻译：具有信号发生功能的环境光感测模块
公开(公告)号：US09000345B2
公开(公告)日：2015-04-07
申请号：US13116052
申请日：2011-05-26
申请人： Ming-Huang Liu , Meng-Yung Lin
发明人： Ming-Huang Liu , Meng-Yung Lin
IPC分类号： G01J1/44 , G01J1/46 , G01J1/42 , H03K4/50 , H03K7/08 , H03M1/50
CPC分类号： G01J1/46 , G01J1/4204 , H03K4/50 , H03K7/08 , H03M1/504
摘要： The present invention provides an ambient light sensing module, which comprises a sawtooth signal generating circuit, an optical sensing unit, and a comparing unit. The sawtooth signal generating circuit produces a sawtooth signal. The optical sensing unit senses a light source and produces a light-sensing signal. The comparing unit produces a pulse-width modulation (PWM) signal related to the intensity of the light source according to the light-sensing signal and the sawtooth signal so that the PWM signal can be used as the control signal of the electronic device. The ambient light sensing module further comprises at least a fuse for determining a processing parameter. A signal processing unit processes the light-sensing signal according to the processing parameter for outputting a converting signal. The comparing unit compares the converting signal with the sawtooth signal for producing the PWM signal. An adjusting unit produces an adjusting signal according to the PWM signal and the light intensity or according to the converting signal and the light intensity for controlling a trimming unit to trim the fuse and thus modifying the processing parameter.
摘要翻译：本发明提供一种环境光感测模块，其包括锯齿波信号发生电路，光学感测单元和比较单元。锯齿波信号产生电路产生锯齿波信号。光学感测单元感测光源并产生光感测信号。比较单元根据光感测信号和锯齿波信号产生与光源的强度相关的脉冲宽度调制（PWM）信号，使得PWM信号可以用作电子设备的控制信号。环境光感测模块还包括用于确定处理参数的至少一个熔丝。信号处理单元根据用于输出转换信号的处理参数对感光信号进行处理。比较单元将转换信号与锯齿波信号进行比较，以产生PWM信号。调整单元根据PWM信号和光强度或根据转换信号和光强度产生调节信号，用于控制修整单元以修整熔丝并因此修改处理参数。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式