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    • 21. 发明授权
    • High precision charge pump regulation
    • 高精度电荷泵调节
    • US06774710B2
    • 2004-08-10
    • US10672823
    • 2003-09-25
    • Bo Li
    • Bo Li
    • G05F110
    • H02M3/073H02M2001/0032H02M2001/0041Y02B70/16
    • A method for high precision charge pump regulation. The method of one embodiment comprises comparing an output feedback voltage with a reference voltage to determine whether the output feedback voltage is greater than or less than the reference voltage. In response to the comparison, either increasing a frequency for a clock signal if the output feedback voltage is less than the reference voltage, decreasing the frequency for the clock signal if the output feedback voltage is greater than the reference voltage; or disabling the clock signal if the output feedback voltage is much greater than the reference voltage. A pumped voltage is generated in response to changes to the clock signal.
    • 一种高精度电荷泵调节方法。 一个实施例的方法包括将输出反馈电压与参考电压进行比较,以确定输出反馈电压是否大于或小于参考电压。 响应于比较,如果输出反馈电压小于参考电压,则增加时钟信号的频率,如果输出反馈电压大于参考电压,则降低时钟信号的频率; 或者如果输出反馈电压远大于参考电压,则禁止时钟信号。 响应于时钟信号的变化产生泵浦电压。
    • 22. 发明授权
    • Voltage regulator for a charge pump circuit
    • 电荷泵电路的电压调节器
    • US06774709B2
    • 2004-08-10
    • US10379416
    • 2003-03-04
    • Enrico CastaldoAntonino Conte
    • Enrico CastaldoAntonino Conte
    • G05F110
    • H02M3/073H02M2001/0032H02M2001/0041Y02B70/16
    • A circuit for regulating an output voltage of a charge pump includes a regulator connected to an output of the charge pump. The regulator includes a voltage divider for dividing the output voltage. A filter has a first input for receiving the divided output voltage, a second input for receiving a control signal, and an output for providing a filtered divided output voltage. A comparator has a first input for receiving the divided output voltage, a second input for receiving a reference voltage, a third input for receiving the filtered divided output voltage, and an output for providing a digital signal based upon a comparison of the divided output signal, the reference voltage and the filtered divided output voltage. A logic control circuit has a first input for receiving a clock signal, a second input for receiving the digital signal from the comparator, and an output for providing a timing signal. A phase generator circuit has an input for receiving the timing signal from the logic control circuit for generating control phases for the charge pump.
    • 用于调节电荷泵的输出电压的电路包括连接到电荷泵的输出的调节器。 调节器包括用于分压输出电压的分压器。 滤波器具有用于接收分压输出电压的第一输入端,用于接收控制信号的第二输入端和用于提供经滤波的分压输出电压的输出端。 比较器具有用于接收分压输出电压的第一输入端,用于接收参考电压的第二输入端,用于接收经滤波的分压输出电压的第三输入端和用于根据分压输出信号的比较提供数字信号的输出端 ,参考电压和滤波后的分频输出电压。 逻辑控制电路具有用于接收时钟信号的第一输入端,用于从比较器接收数字信号的第二输入端和用于提供定时信号的输出端。 相位发生器电路具有用于接收来自逻辑控制电路的定时信号用于产生电荷泵的控制相位的输入端。
    • 24. 发明授权
    • Multi-stage charge pump
    • 多级电荷泵
    • US06486728B2
    • 2002-11-26
    • US09809878
    • 2001-03-16
    • Bendik Kleveland
    • Bendik Kleveland
    • G05F302
    • H02M3/073H02M2001/0041
    • An integrated voltage source includes a charge pump having multiple charge pump stages connected in series. A first one of the these charge pump stages is connected to the high voltage output of the charge pump, and the remaining charge pump stages are coupled to this first charge pump stage in a manner such that substantially all the charge pumped by all of the additional charge pump stages is also pumped by the first charge pump stage. In one mode of operation, the first charge pump stage and at least one additional charge pump stage are enabled. In another mode of operation, the first charge pump stage and at least two additional charge pump stages are enabled. A control circuit determines the mode of operation and, therefore, the number of charge pump stages that are enabled.
    • 集成电压源包括具有串联连接的多个电荷泵级的电荷泵。 这些电荷泵级中的第一级连接到电荷泵的高电压输出,并且剩余的电荷泵级以这样的方式耦合到该第一电荷泵级,使得基本上所有的电荷被所有额外的 电荷泵级也由第一电荷泵级泵送。 在一种操作模式中,启用第一电荷泵级和至少一个额外的电荷泵级。 在另一种操作模式中,启用第一电荷泵级和至少两个额外的电荷泵级。 控制电路确定操作模式,因此确定启用的电荷泵级数。
    • 26. 发明申请
    • SWITCHING DC-TO-DC CONVERTER WITH DISCONTINUOUS PULSE SKIPPING AND CONTINUOUS OPERATING MODES WITHOUT EXTERNAL SENSE RESISTOR
    • US20020074975A1
    • 2002-06-20
    • US09738609
    • 2000-12-14
    • Barry James CulpepperHidehiko Suzuki
    • G05F001/10
    • H02M3/156H02M3/1588H02M2001/0032H02M2001/0041Y02B70/1466Y02B70/16
    • A switching DC-to-DC converter having at least one power channel including an inductor and a controller which generates at least one power switch control signal for at least one power switch of each power channel. The converter is configured to operate in a continuous mode when the inductor current remains above zero, to enter a discontinuous pulse skipping mode of operation when the inductor current falls to zero (which occurs when the load current is below a threshold value), and to leave the discontinuous pulse skipping mode and resume continuous mode operation when the inductor current rises above zero. The main difference between the continuous and discontinuous pulse skipping modes is that in the continuous mode, a power switch has a duty cycle determined by a feedback signal indicative of the converter's output potential Vout (so that the duty cycle is independent of the current drawn from the converter by the load), and in the discontinuous pulse skipping mode the power switch has a duty cycle which is the longer of a minimum duty cycle and a discontinuous (non-pulse-skipping) mode duty cycle. The discontinuous pulse skipping mode is more efficient than the continuous mode under conditions of low load current. Preferably, the controller includes cycle-skipping circuitry operable in the discontinuous pulse skipping mode and optionally also the continuous mode to cause the power switch to remain off for at least one cycle under the condition that the converter's output potential rises above a threshold. Preferably, the cycle-skipping circuitry includes a comparator which compares an error amplifier output (indicative of the converter output potential) with a threshold potential, and logic circuitry (e.g., an AND gate coupled to the comparator output) which asserts a latch-clearing signal once per switching cycle when the comparator output indicates that the converter's output has risen above the threshold. Other aspects of the invention are a switching controller for use in such a converter and a method for generating power switch control signals for such a converter in a discontinuous pulse skipping mode of operation.
    • 27. 发明申请
    • DC-DC converter
    • DC-DC转换器
    • US20020060559A1
    • 2002-05-23
    • US09988471
    • 2001-11-20
    • Kiyotaka Umemoto
    • G05F001/40
    • H02M3/156H02M2001/0041
    • A DC-DC converter supplied with a power from a DC power source having a predetermined power source voltage, for controlling an output voltage of the DC-DC converter such that the output voltage becomes an aimed output voltage, by switching a transistor with a pulse having a predetermined width when the output voltage is lower than the aimed output voltage and stopping the switching operation of the transistor when the output voltage exceeds the aimed output voltage, comprises a variable duty cycle pulse generator circuit for generating a pulse having duty cycle determined by a ratio of the power source voltage to the aimed output voltage, a switch circuit for outputting the pulse as a switching pulse of the transistor when the switch circuit is turned ON and a control circuit for turning the switch circuit ON when the output voltage is lower than the aimed outut voltage.
    • 一种DC-DC转换器,其具有来自具有预定电源电压的DC电源的电力,用于通过用脉冲开关晶体管来控制DC-DC转换器的输出电压使得输出电压变为目标输出电压 当输出电压低于目标输出电压时具有预定的宽度,并且当输出电压超过目标输出电压时停止晶体管的开关操作,包括可变占空比脉冲发生器电路,用于产生具有由 电源电压与目标输出电压的比例;当开关电路导通时,用于输出脉冲作为晶体管的开关脉冲的开关电路,以及当输出电压较低时将开关电路接通的控制电路 比目标电压。