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21. 发明申请

US20160247769A1 APPARATUS AND METHOD FOR GENERATING IDENTIFICATION KEY 审中-公开
标题翻译：用于产生识别钥匙的装置和方法
公开(公告)号：US20160247769A1
公开(公告)日：2016-08-25
申请号：US15028330
申请日：2014-02-17
申请人： ICTK CO., LTD.
发明人： Byong Deok Choi , Dong Kyue Kim
IPC分类号： H01L23/00 , H01L23/522 , H01L27/06 , H04L9/32 , H01L21/768 , H01L21/8234 , G06F17/50 , H01L23/528 , H01L27/02
CPC分类号： H01L23/573 , G06F17/5072 , G06F21/73 , G09C1/00 , H01L21/76877 , H01L21/823475 , H01L23/5226 , H01L23/528 , H01L27/0207 , H01L27/0629 , H04L9/0866 , H04L9/3278 , H04L2209/12
摘要： Provided is an apparatus for generating an identification key by using process variation in a conductive layer manufacturing process. The apparatus may include a first contact connected to a first conductive layer included in a semiconductor chip, wherein a first node is formed by an electrical connection between the first conductive layer and the first contact, a second contact connected to a second conductive layer included in the semiconductor chip, wherein a second node is formed by an electrical connection between the second conductive layer and the second contact, and wherein a value of a spacing between the first contact and the second contact is smaller than a minimum spacing value that guarantees that the first node and the second node are not shorted on a patterning layout, and a reader configured to determine whether the first node and the second node are electrically shorted and to provide the identification key.
摘要翻译：提供了一种通过使用导电层制造工艺中的工艺变化来产生识别键的装置。该装置可以包括连接到包括在半导体芯片中的第一导电层的第一触点，其中第一节点由第一导电层和第一触点之间的电连接形成，第二触点连接到包括在第二导电层中的第二导电层所述半导体芯片，其中第二节点由所述第二导电层和所述第二触点之间的电连接形成，并且其中所述第一触点和所述第二触点之间的间隔的值小于最小间隔值，所述最小间隔值保证第一节点和第二节点在图案化布局上不短路，并且读取器被配置为确定第一节点和第二节点是否电短路并提供识别密钥。

22. 发明授权

US09263400B2 X-ray obscuration film and related techniques 有权
公开(公告)号：US09263400B2
公开(公告)日：2016-02-16
申请号：US14789885
申请日：2015-07-01
申请人： Lockheed Martin Corporation
发明人： Stephen Gonya , Jesse Iannon
IPC分类号： H01L23/552 , H05K1/02
CPC分类号： G21F3/00 , H01L23/552 , H01L23/573 , H01L2924/0002 , H05K1/02 , H05K1/0209 , H05K1/0275 , H05K2201/0715 , H05K2201/09681 , H01L2924/00
摘要： An X-ray obscuration (XRO) film comprising one or more metallic wire mesh layers and an adjacent layer of indium foil having portions which extend into openings of the wire mesh and in contact with metallic portions thereof. The XRO film can be capable of absorbing at least a portion of X-ray energy thereby creating an interference pattern when the XRO film is coupled with an electronic circuit and placed between an X-ray source and an X-ray detector and subjected to radiographic inspection. The interference pattern can create sufficient visual static to effectively obscure circuit lines in the electronic circuit when subjected to radiographic inspection techniques. The XRO film can be substantially thinner than existing solutions for preventing X-ray inspection with an exemplary embodiment being no more than 5 mils thick. The metallic XRO film can also provide electromagnetic shielding and/or heat dissipation for electronic circuits.

23. 发明授权

US09209139B2 Multilayer security wrap 有权
标题翻译：多层安全保护
公开(公告)号：US09209139B2
公开(公告)日：2015-12-08
申请号：US13952350
申请日：2013-07-26
申请人： Johnson Electric S.A.
发明人： Vincent Daniel Jean Salle , Dominic John Ward , Martin Wallace Edmonds , Libing Zhang
IPC分类号： H01L23/28 , H01L23/00 , G08B13/24 , G06F21/87
CPC分类号： H01L23/57 , G06F21/87 , G08B13/242 , G08B13/2437 , H01L23/573 , H01L23/576 , H01L2924/0002 , H01L2924/00
摘要： A security wrap (20) for protecting an electronic component (16) having a bonding surface includes a substrate (22) having a first side and a second side opposite to each other. A first security screen (26) is disposed over the first side of the substrate (22) and includes a first pair of screen terminals (48) and a first conductive track (46) between the first pair of screen terminals (48). A second security screen (26) includes a second pair of screen terminals (48) and a second conductive track (46) between the second pair of screen terminals (48) and overlaying the first conductive track (46) on the first security screen (26). A layer of adhesive (30) is over a side of the second security screen (26) remote from the substrate (22) and bonds the second security screen (22) to the bonding surface of the electronic component (16).
摘要翻译：用于保护具有接合表面的电子部件（16）的安全性包装（20）包括具有彼此相对的第一侧和第二侧的基板（22）。第一安全屏幕（26）设置在基板（22）的第一侧上，并且包括在第一对屏幕端子（48）之间的第一对屏幕端子（48）和第一导电轨道（46）。第二安全屏幕（26）包括第二对屏幕终端（48）和在第二对屏幕终端（48）之间的第二导电轨道（46），并且覆盖第一安全屏幕上的第一导电轨迹（46） 26）。一层粘合剂（30）在远离基板（22）的第二安全屏幕（26）的一侧上方，并将第二安全屏蔽件（22）结合到电子部件（16）的接合表面。

24. 发明申请

US20150255434A1 SEMICONDUCTOR INTERPOSER INTEGRATION 有权
标题翻译：半导体插座集成
公开(公告)号：US20150255434A1
公开(公告)日：2015-09-10
申请号：US14717798
申请日：2015-05-20
申请人： BroadPak Corporation
发明人： Farhang Yazdani
IPC分类号： H01L25/065
CPC分类号： H01L23/49827 , H01L21/486 , H01L21/52 , H01L23/04 , H01L23/3107 , H01L23/473 , H01L23/49833 , H01L23/49838 , H01L23/573 , H01L23/66 , H01L24/48 , H01L25/0652 , H01L25/0657 , H01L25/18 , H01L25/50 , H01L2224/48227 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06541 , H01L2225/06548 , H01L2225/06572 , H01L2924/00014 , H01L2924/10253 , H01L2924/19041 , H01L2924/30107 , Y10T29/53174 , Y10T29/53178 , Y10T29/53183 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Integrated circuits are described which directly connect a semiconductor interposer to a motherboard or printed circuit board by way of large pitch connections. A stack of semiconductor interposers may be connected directly to one another by a variety of means and connected to a printed circuit board through only a ball grid array of solder bumps. The stack of semiconductor interposers may include one or more semiconductor interposers which are shifted laterally to enable directly electrical connections to intermediate semiconductor interposers. The top semiconductor interposer may have no electrical connections on the top to increase security by making electrical “taps” much more difficult. An electrically insulating layer may be incorporated between adjacent semiconductor interposers and cavities or air gaps may also be included within one or more semiconductor interposers.
摘要翻译：描述了通过大间距连接将半导体插入器直接连接到母板或印刷电路板的集成电路。半导体内插层的叠层可以通过各种方式直接连接，并且仅通过焊球凸块的球栅阵列连接到印刷电路板。半导体内插器的堆叠可以包括一个或多个半导体插入件，其横向移位以实现与中间半导体插入件的直接电连接。顶部的半导体内插器可以在顶部没有电连接以通过使电“抽头”变得困难而增加安全性。电绝缘层可以结合在相邻的半导体插入件之间，空腔也可以包括在一个或多个半导体插入件内。

25. 发明授权

US08961280B2 Method of manufacturing a venting device for tamper resistant electronic modules 有权
标题翻译：制造防篡改电子模块通风装置的方法
公开(公告)号：US08961280B2
公开(公告)日：2015-02-24
申请号：US13594937
申请日：2012-08-27
申请人： John Richard Dangler , Phillip Duane Isaacs , Arvind Kumar Sinha
发明人： John Richard Dangler , Phillip Duane Isaacs , Arvind Kumar Sinha
IPC分类号： H05K5/00 , H05K5/02
CPC分类号： H05K5/0213 , H01L23/573 , H01L23/585 , H01L2924/0002 , H05K5/0208 , Y10T29/49885 , H01L2924/00
摘要： A tamper resistant enclosure for an electronic circuit includes an inner copper case, a tamper sensing mesh wrapped around the inner case, an outer copper case enclosing the inner case and the tamper sensing mesh, and a venting device forming a vent channel from inside the inner case to outside the outer case, the vent channel passing between overlapping layers of the tamper sensing mesh and having at least one right angle bend along its length. The venting device consists of two strips of a thin polyamide coverlay material laminated together along their length, and a length of wool yarn sandwiched between the two thin strips and extending from one end of the strips to the other end of the strips to form the vent channel. The length of yarn follows a zig-zag path between the first and second strips, the zig-zag path including at least one right angle bend.
摘要翻译：用于电子电路的防篡改外壳包括内铜壳，围绕内壳缠绕的篡改感测网，包围内壳和篡改感测网的外铜壳，以及从内部内部形成通风通道的排气装置壳体到外壳外部，排气通道在篡改感测网的重叠层之间通过，并且沿其长度具有至少一个直角弯曲。排气装置由沿着其长度层压在一起的两条薄的聚酰胺覆盖层材料组成，并且一长度的羊毛纱线夹在两条薄条之间并从条的一端延伸到条的另一端以形成通风口渠道。纱线的长度遵循第一和第二条带之间的之字形路径，之字形路径包括至少一个直角弯曲部。

26. 发明授权

US08896086B1 System for preventing tampering with integrated circuit 有权
标题翻译：防止篡改集成电路的系统
公开(公告)号：US08896086B1
公开(公告)日：2014-11-25
申请号：US13905150
申请日：2013-05-30
申请人： Mohit Arora , Prashant Bhargava , Rishi Bhooshan
发明人： Mohit Arora , Prashant Bhargava , Rishi Bhooshan
IPC分类号： H01L23/02 , H01L23/00
CPC分类号： G06F21/86 , G06F2221/2143 , H01L23/573 , H01L2924/0002 , H01L2924/00
摘要： A system for generating a tamper detection signal indicating tampering with one or more circuits of an integrated circuit (IC) includes a tamper detection module, and wire-pairs connected to the tamper detection module and arranged in a winding configuration to form a wire-mesh. The wire-mesh is placed a predefined distance from the circuits. The tamper detection module generates and provides serial bit-streams to the wire-pairs for detecting a breach in the wire-mesh by an external probe.
摘要翻译：用于产生表示篡改集成电路（IC）的一个或多个电路的篡改检测信号的系统包括篡改检测模块和连接到篡改检测模块并且以绕组配置布置以形成线网的线对。线网放置在与电路预定距离的位置。篡改检测模块生成并提供串行比特流到线对，用于通过外部探针检测金属丝网中的突破。

27. 发明申请

US20140283959A1 TAMPER RESISTANT AMORPHOUS ALLOY JOINING 有权
标题翻译：耐冲击非晶合金加工
公开(公告)号：US20140283959A1
公开(公告)日：2014-09-25
申请号：US14348399
申请日：2011-09-30
申请人： Crucible Intellectual Property , LLC
发明人： Theodore Andrew Waniuk , Tran Quoc Pham , Dennis Ogawa
IPC分类号： C22C45/00
CPC分类号： C22C45/00 , H01L23/10 , H01L23/573 , H01L2924/0002 , H01L2924/00
摘要： A method to form an enclosure or assembly which is fitted together and joined via a thermoplastic forming operation in order to seal the enclosure and hinder attempts to tamper with the contents.
摘要翻译：一种形成外壳或组件的方法，所述外壳或组件通过热塑性成形操作装配在一起并连接，以便密封外壳并阻止试图篡改内容物。

28. 发明授权

US08664047B2 Integrated circuit tampering protection and reverse engineering prevention coatings and methods 有权
标题翻译：集成电路篡改保护和逆向工程预防涂层及方法
公开(公告)号：US08664047B2
公开(公告)日：2014-03-04
申请号：US13329068
申请日：2011-12-16
申请人： Nathan P. Lower , Alan P. Boone , Ross K. Wilcoxon
发明人： Nathan P. Lower , Alan P. Boone , Ross K. Wilcoxon
IPC分类号： H01L23/22
CPC分类号： H01L21/563 , H01L23/291 , H01L23/295 , H01L23/3128 , H01L23/573 , H01L24/48 , H01L24/73 , H01L2224/16225 , H01L2224/32225 , H01L2224/48227 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2224/8192 , H01L2224/8592 , H01L2924/00011 , H01L2924/00014 , H01L2924/01004 , H01L2924/0102 , H01L2924/01068 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/0401 , H01L2224/45099
摘要： A method of protecting an electronics package is discussed along with devices formed by the method. The method involves providing at least one electronic component that requires protecting from tampering and/or reverse engineering. Further, the method includes mixing into a liquid glass material at least one of high durability micro-particles or high-durability nano-particles, to form a coating material. Further still, the method includes depositing the coating material onto the electronic component and curing the coating material deposited.
摘要翻译：与该方法形成的装置一起讨论保护电子封装的方法。该方法涉及提供至少一个电子部件，其需要防止篡改和/或逆向工程。此外，该方法包括将高耐久性微粒或高耐久性纳米粒子中的至少一种混合成液态玻璃材料，形成涂料。此外，该方法还包括将涂覆材料沉积到电子部件上并固化沉积的涂层材料。

29. 发明授权

US08575238B2 X-ray opaque coating 有权
标题翻译： X射线不透明涂层
公开(公告)号：US08575238B2
公开(公告)日：2013-11-05
申请号：US13691075
申请日：2012-11-30
申请人： Raytheon Company
发明人： Thomas K. Dougherty , Christopher T. Snively , Steven E. Lau , William J. Wolfgong , Cindy W. Ma , Stephen L. Schrader
IPC分类号： C08G59/06 , C08K3/08 , C08K3/10 , C08L63/02
CPC分类号： H01L23/552 , C08G59/063 , C08G59/226 , C08G59/30 , C08G59/3254 , C09D163/00 , H01L23/573 , H01L24/73 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L2924/14 , H01L2924/19105 , H01L2924/3025 , Y10T428/31511 , H01L2924/00012 , H01L2924/00
摘要： The disclosure relates to an X-ray opaque coating containing an epoxy resin including an iodinated phenol covalently bonded to a glycidyl ether. Iodinated phenol covalently bonded to a glycidyl ether may include iodinated bisphenol A, such as tetraiodobisphenol A, a glycidyl ether of mono-iodophenol, bis-iodephenol, tri-iodophenol, or combinations thereof. The coating may include an X-ray opaque inorganic filler. The disclosure also relates to an electronic component including a substrate and at last one device coupled to the substrate with an obfuscation layer disposed over the substrate for obscuring the device from an X-ray source. The obfuscation layer may include an X-ray opaque coating. The disclosure additionally relates to- a method of obscuring at least a portion of an electronic component by depositing an obfuscation layer that may include an X-ray opaque coating and a method of forming an X-ray opaque coating.
摘要翻译：本公开涉及含有包含共价结合到缩水甘油醚的碘化苯酚的环氧树脂的X射线不透明涂层。共价键合到缩水甘油醚的碘化苯酚可以包括碘化双酚A，例如四碘双酚A，单碘苯酚的缩水甘油醚，双碘苯酚，三碘苯酚或其组合。涂层可以包括X射线不透明的无机填料。本公开还涉及包括衬底的电子部件，并且最后一个器件耦合到衬底，其中设置在衬底上的混淆层，用于使器件从X射线源模糊。混淆层可以包括X射线不透明涂层。本公开还涉及通过沉积可包括X射线不透明涂层的混淆层和形成X射线不透明涂层的方法来模糊电子部件的至少一部分的方法。

30. 发明授权

US08502396B2 Embedded package security tamper mesh 有权
标题翻译：嵌入式封装安全篡改网格
公开(公告)号：US08502396B2
公开(公告)日：2013-08-06
申请号：US12330336
申请日：2008-12-08
申请人： Mark Buer , Matthew Kaufmann
发明人： Mark Buer , Matthew Kaufmann
IPC分类号： H01L23/49
CPC分类号： H01L23/573 , G06F21/87 , G06F2221/2143 , H01L23/04 , H01L23/16 , H01L23/3128 , H01L23/576 , H01L24/06 , H01L24/17 , H01L24/48 , H01L24/49 , H01L24/81 , H01L2224/0401 , H01L2224/05554 , H01L2224/05599 , H01L2224/48091 , H01L2224/48227 , H01L2224/49171 , H01L2224/49431 , H01L2224/85399 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01033 , H01L2924/01047 , H01L2924/01057 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/16195 , H01L2924/181 , H01L2924/30105 , Y10S257/922 , H01L2224/45099 , H01L2924/00 , H01L2924/00012
摘要： Systems and methods for embedded tamper mesh protection are provided. The embedded tamper mesh includes a series of protection bond wires surrounding bond wires carrying sensitive signals. The protection bond wires are positioned to be vertically higher than the signal bond wires. The protection wires may be bonded to outer contacts on the substrate while the signal bond wires are bonded to inner contacts, thereby creating a bond wire cage around the signal wires. Methods and systems for providing package level protection are also provided. An exemplary secure package includes a substrate having multiple contacts surrounding a die disposed on an upper surface of the substrate. A mesh die including a series of mesh die pads is coupled to the upper surface of the die. Bond wires are coupled from the mesh die pads to contacts on the substrate thereby creating a bond wire cage surrounding the die.
摘要翻译：提供嵌入式篡改网格保护的系统和方法。嵌入式篡改网格包括一系列保护接合线，包括携带敏感信号的接合线。保护接合线定位成垂直于信号接合线。保护线可以结合到衬底上的外触点，同时将信号接合线结合到内触点，从而在信号线周围产生接合线笼。还提供了用于提供封装级保护的方法和系统。示例性的安全封装包括具有围绕设置在基板的上表面上的管芯的多个触点的基板。包括一系列网眼模片的网眼模具联接到模具的上表面。键合线从网状裸片焊盘耦合到衬底上的触点，从而形成围绕裸片的接合线笼。

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