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21. 发明申请

US20120197593A1 Parameter extraction method for semiconductor device 有权
标题翻译：半导体器件参数提取方法
公开(公告)号：US20120197593A1
公开(公告)日：2012-08-02
申请号：US13137190
申请日：2011-07-27
申请人： Jyh-Chyurn Guo , Kuo-Liang Yeh
发明人： Jyh-Chyurn Guo , Kuo-Liang Yeh
IPC分类号： G01B7/02 , G06F15/00
CPC分类号： H01L22/30 , G01R31/2648 , H01L22/32 , H01L22/34 , H01L2924/0002 , H01L2924/00
摘要： A parameter extraction method for semiconductor devices includes: providing a first multi-finger device and a second multi-finger device, wherein the gate-finger numbers between the first and second multi-finger devices are different; performing an open de-embedding, then the high-frequency test apparatus measuring a first intrinsic gate capacitance of the first multi-finger device and a second intrinsic gate capacitance of the second multi-finger device; calculating a slope according to the first and second intrinsic gate capacitances, and the first and second gate-finger numbers; performing a 3D capacitance simulation for computing the poly finger-end fringing capacitances; utilizing a long channel device for measuring the gate capacitance and extracting the intrinsic gate capacitance, then calculating an inversion channel capacitance per unit area; and computing a delta channel width of the semiconductor device, according to the slope, the poly finger-end fringing capacitance, and the inversion channel capacitance per unit area.
摘要翻译：半导体器件的参数提取方法包括：提供第一多指器件和第二多指器件，其中第一和第二多指器件之间的栅极指数不同; 执行开放式去嵌入，然后测量第一多指器件的第一固有栅极电容和第二多指器件的第二本征栅极电容的高频测试器件; 根据第一和第二固有栅极电容以及第一和第二栅极指数计算斜率; 执行用于计算多指端边缘电容的3D电容模拟; 利用长通道器件测量栅极电容并提取固有栅极电容，然后计算每单位面积的反向沟道电容; 以及根据斜率，多指端边缘电容和每单位面积的反向沟道电容计算半导体器件的δ沟道宽度。

22. 发明申请

US20120194205A1 RAPID SCREENING BUFFER LAYERS IN PHOTOVOLTAICS 有权
标题翻译：快照屏幕缓冲层
公开(公告)号：US20120194205A1
公开(公告)日：2012-08-02
申请号：US13019024
申请日：2011-02-01
申请人： Frederick A. LIST, III , Enis Tuncer
发明人： Frederick A. LIST, III , Enis Tuncer
IPC分类号： G01R27/08
CPC分类号： G01R31/2648 , G01R1/07314 , G01R27/02
摘要： An apparatus and method of testing electrical impedance of a multiplicity of regions of a photovoltaic surface includes providing a multi-tipped impedance sensor with a multiplicity of spaced apart impedance probes separated by an insulating material, wherein each impedance probe includes a first end adapted for contact with a photovoltaic surface and a second end in operable communication with an impedance measuring device. The multi-tipped impedance sensor is used to contact the photovoltaic surface and electrical impedance of the photovoltaic material is measured between individual first ends of the probes to characterize the quality of the photovoltaic surface.
摘要翻译：一种测试光伏表面的多个区域的电阻抗的装置和方法包括：提供具有由绝缘材料隔开的多个间隔开的阻抗探针的多端阻抗传感器，其中每个阻抗探头包括适于接触的第一端光电表面和与阻抗测量装置可操作地连通的第二端。多尖端阻抗传感器用于接触光伏表面，并且在探针的各个第一端之间测量光伏材料的电阻抗以表征光伏表面的质量。

23. 发明申请

US20120146669A1 APPARATUS AND METHOD FOR COMBINED MICRO-SCALE AND NANO-SCALE C-V, Q-V, AND I-V TESTING OF SEMICONDUCTOR MATERIALS 有权
标题翻译：用于组合微尺度和纳米尺度C-V，Q-V和I-V半导体材料测试的装置和方法
公开(公告)号：US20120146669A1
公开(公告)日：2012-06-14
申请号：US13398681
申请日：2012-02-16
申请人： Andrew N. Erickson
发明人： Andrew N. Erickson
IPC分类号： G01R27/26 , G01R1/067
CPC分类号： G01R31/2648 , G01Q60/30 , G01Q60/38 , G01R27/2605 , G01R31/2601 , G01R31/312
摘要： Current Voltage and Capacitance Voltage (IV and CV) measurements are critical in measurement of properties of electronic materials especially semiconductors. A semiconductor testing device to accomplish IV and CV measurement supports a semiconductor wafer and provides a probe for contacting a surface on the wafer under control of an atomic Force Microscope or similar probing device for positioning the probe to a desired measurement point on the wafer surface. Detection of contact by the probe on the surface is accomplished and test voltage is supplied to the semiconductor wafer. A first circuit for measuring capacitance sensed by the probe based on the test voltage and a complimentary circuit for measuring Fowler Nordheim current sensed by the probe based on the test voltage are employed with the probe allowing the calculation of characteristics of the semiconductor wafer based on the measured capacitance and Fowler Nordheim current.
摘要翻译：电流电压和电容电压（IV和CV）测量对电子材料特别是半导体的性能的测量至关重要。用于实现IV和CV测量的半导体测试装置支持半导体晶片，并且提供用于在原子力显微镜或类似探测装置的控制下接触晶片上的表面的探针，用于将探针定位在晶片表面上的期望测量点。检测表面上探针的接触，并向半导体晶片提供测试电压。基于测试电压测量由探头感测的电容的第一电路和用于基于测试电压测量由探头感测的福勒诺德海姆电流的互补电路被采用，该探针允许基于该测量电压计算半导体晶片的特性测量电容和Fowler Nordheim电流。

24. 发明申请

US20120143545A9 METHOD FOR SHEET RESISTANCE AND LEAKAGE CURRENT DENSITY MEASUREMENTS ON SHALLOW SEMICONDUCTOR IMPLANTS 审中-公开
标题翻译：薄膜半导体材料的表面电阻和漏电流密度测量方法
公开(公告)号：US20120143545A9
公开(公告)日：2012-06-07
申请号：US12298387
申请日：2007-04-24
申请人： Christian L. Petersen
发明人： Christian L. Petersen
IPC分类号： G06F19/00 , G01R1/067
CPC分类号： G01R31/312 , G01R31/2648
摘要： A method for accurately determining the sheet resistance and leakage current density of a shallow implant in a semiconductor surface (520) includes making one or more four-point resistance measurements with an induced current below 100 μA on the semiconductor surface (520) with a plurality of electrode spacing sets, at least one set having an average spacing below 100 μm. The sheet resistance and implant leakage is determined through fitting the measured data to theoretical data to within a predetermined error.
摘要翻译：一种用于准确地确定半导体表面（520）中的浅植入物的薄层电阻和漏电流密度的方法包括：在半导体表面（520）上形成多个具有低于100μA的感应电流的四点电阻测量，其中多个的电极间隔组，至少一个平均间隔小于100μm的组。通过将测量数据与理论数据拟合到预定误差内来确定薄片电阻和植入物泄漏。

25. 发明授权

US08164091B2 Multi-purpose poly edge test structure 有权
标题翻译：多功能多边测试结构
公开(公告)号：US08164091B2
公开(公告)日：2012-04-24
申请号：US12211615
申请日：2008-09-16
申请人： Wen Shi , Wei Wei Ruan
发明人： Wen Shi , Wei Wei Ruan
IPC分类号： H01L23/58
CPC分类号： G01R31/2648 , G01R31/2621 , G01R31/2884 , H01L22/32 , H01L23/62 , H01L2924/0002 , H01L2924/00
摘要： Multi-purpose poly edge test structure. According to an embodiment, the present invention provides a test structure. The test structure includes a doped silicon substrate, the doped silicon substrate being grounded, the doped silicon substrate including a first gate structure and a second gate structure, the first and second gate structures overlaying the doped silicon substrate. The test structure also includes a first conducting pad being electrically coupled to the first gate structure. The test structure also includes a second conducting pad being electrically coupled to the second gate structure.
摘要翻译：多功能多边测试结构。根据实施例，本发明提供一种测试结构。测试结构包括掺杂硅衬底，掺杂硅衬底接地，掺杂硅衬底包括第一栅极结构和第二栅极结构，第一和第二栅极结构覆盖掺杂硅衬底。测试结构还包括电耦合到第一栅极结构的第一导电焊盘。测试结构还包括电耦合到第二栅极结构的第二导电焊盘。

26. 发明授权

US08102174B2 Techniques for electrically characterizing tunnel junction film stacks with little or no processing 有权
标题翻译：用于电化学表征隧道结膜堆叠的技术，具有很少或没有加工
公开(公告)号：US08102174B2
公开(公告)日：2012-01-24
申请号：US12361731
申请日：2009-01-29
申请人： Daniel Christopher Worledge , Philip Louis Trouilloud , David William Abraham , Joerg Dietrich Schmid
发明人： Daniel Christopher Worledge , Philip Louis Trouilloud , David William Abraham , Joerg Dietrich Schmid
IPC分类号： G01R33/12
CPC分类号： G01R33/093 , B82Y25/00 , G01R31/2648 , G01R33/098 , Y10S977/852 , Y10S977/854
摘要： Probes are electrically connected to a surface of a tunnel junction film stack comprising a free layer, a tunnel barrier, and a pinned layer. Resistances are determined for a variety of probe spacings and for a number of magnetizations of one of the layers of the stack. The probe spacings are a distance from a length scale, which is related to the Resistance-Area (RA) product of the tunnel junction film stack. Spacings from as small as possible to about 40 times the length scale are used. Beneficially, the smallest spacing between probes used during a resistance measurement is under 100 microns. A measured in-plane MagnetoResistance (MR) curve is determined from the “high” and “low” resistances that occur at the two magnetizations of this layer. The RA product, resistances per square of the free and pinned layers, and perpendicular MR are determined through curve fitting.
摘要翻译：探针电连接到包括自由层，隧道势垒和钉扎层的隧道结膜堆叠的表面。针对各种探针间距和堆叠层之一的多次磁化确定了电阻。探头间距是距离隧道结膜叠层的电阻 - 面积（RA）乘积的长度尺度的距离。使用从尽可能小到约40倍长度尺度的间距。有利地，在电阻测量期间使用的探针之间的最小间距小于100微米。从该层的两次磁化发生的“高”和“低”电阻确定测量的面内磁阻（MR）曲线。通过曲线拟合来确定RA乘积，每平方的自由和被钉扎层的电阻和垂直MR。

27. 发明申请

US20110285416A1 MULTI-POINT PROBE FOR TESTING ELECTRICAL PROPERTIES AND A METHOD OF PRODUCING A MULTI-POINT PROBE 审中-公开
标题翻译：用于测试电气特性的多点探针和一种产生多点探针的方法
公开(公告)号：US20110285416A1
公开(公告)日：2011-11-24
申请号：US13002030
申请日：2009-06-30
申请人： Dirch H. Petersen
发明人： Dirch H. Petersen
IPC分类号： G01R1/073 , H05K3/00
CPC分类号： G01R1/07307 , G01R1/06733 , G01R31/2648 , Y10T29/49124
摘要： A multi-point probe for testing electrical properties of a number of specific locations of a test sample comprises a supporting body defining a first surface, a first multitude of conductive probe arms (101-101′″), each of the probe arms defining a proximal end and a distal end. The probe arms are connected to the supporting body (105) at the proximal ends, and the distal ends are freely extending from the supporting body, giving individually flexible motion to the probe arms. Each of the probe arms defines a maximum width perpendicular to its perpendicular bisector and parallel with its line of contact with the supporting body, and a maximum thickness perpendicular to its perpendicular bisector and its line of contact with the supporting body. Each of the probe arms has a specific area or point of contact (111-111′″) at its distal end for contacting a specific location among the number of specific locations of the test sample. At least one of the probe arms has an extension defining a pointing distal end providing its specific area or point of contact located offset relative to its perpendicular bisector.
摘要翻译：用于测试测试样品的多个特定位置的电性能的多点探针包括限定第一表面的支撑体，第一多个导电探针臂（101-101“），每个探针臂限定一个近端和远端。探针臂在近端处连接到支撑体（105），并且远端从支撑体自由延伸，给予探针臂单独的柔性运动。每个探针臂限定垂直于其垂直平分线并且与其与支撑体的接触线平行的最大宽度，以及垂直于其垂直平分线的最大厚度及其与支撑体的接触线。每个探针臂在其远端具有特定区域或接触点（111-111“），用于接触测试样品的特定位置数目中的特定位置。探针臂中的至少一个具有限定指向远端的延伸部，其提供其相对于其垂直平分线偏置的特定区域或接触点。

28. 发明授权

US07919762B2 Determining diffusion length of minority carriers using luminescence 有权
标题翻译：使用发光确定少数载流子的扩散长度
公开(公告)号：US07919762B2
公开(公告)日：2011-04-05
申请号：US12375889
申请日：2007-07-27
申请人： Thorsten Trupke , Robert Andrew Bardos , Peter Wilhelm Wurfel
发明人： Thorsten Trupke , Robert Andrew Bardos , Peter Wilhelm Wurfel
IPC分类号： G01N21/64
CPC分类号： G01N21/6489 , G01N21/66 , G01N21/9501 , G01N2021/6421 , G01R31/2648 , H01L22/10
摘要： Methods (200, 300), apparatuses and systems (100) for determining minority carrier diffusion lengths in a semi-conductor structure (130), which may be a solar cell or a unprocessed or partially processed silicon sample, are disclosed. The luminescence (140) may comprise photoluminescence, electroluminescence, or both. Luminescence (140) is excited (212) in the structure (130), and the intensities of short- and long-wavelength luminescence (140) are measured (214). Luminescence intensities may be captured from either side of the sample using a single photodetector, a FPA, a CCD array (150), or a mapping tool. The luminescence (140) excited in the structure (130) may be filtered (160) at short and long cutoff wavelengths. Diffusion lengths of the structure (130) are generated (216) using a predefined theoretical relationship. The generating step (216) may comprise calculating (316) intensity ratios from luminescence intensities and converting (320) the intensity ratios into diffusion lengths using the predefined theoretical relationship.
摘要翻译：公开了用于确定半导体结构（130）中的少数载流子扩散长度的方法（200,300），装置和系统（100），其可以是太阳能电池或未处理或部分处理的硅样品。发光（140）可以包括光致发光，电致发光或两者。发光（140）在结构（130）中被激发（212），并且测量短波长和长波长发光（140）的强度（214）。可以使用单个光电检测器，FPA，CCD阵列（150）或映射工具从样品的任一侧捕获发光强度。在结构（130）中激发的发光（140）可以在短和长截止波长下被滤波（160）。使用预定义的理论关系产生（216）结构（130）的扩散长度。生成步骤（216）可以包括从发光强度计算（316）强度比，并且使用预定的理论关系将（320）强度比转换成扩散长度。

29. 发明授权

US07897410B2 Close proximity scanning surface contamination analyzer 有权
标题翻译：近距离扫描表面污染分析仪
公开(公告)号：US07897410B2
公开(公告)日：2011-03-01
申请号：US11959080
申请日：2007-12-18
申请人： Sean M. Collins , Jeffrey W. Ritchison , Richard L. Guldi , Kelly J. Taylor
发明人： Sean M. Collins , Jeffrey W. Ritchison , Richard L. Guldi , Kelly J. Taylor
IPC分类号： G01N33/00 , G01N27/00
CPC分类号： H01J49/0004 , G01R31/2648 , Y10T29/49004
摘要： Reducing chemical contaminants is increasingly important for maintaining competitive production costs during fabrication of electronic devices. There is currently no production floor capability for mapping chemical contaminants across an electronic device substrate on a routine basis. A scanning surface chemical analyzer for mapping the distributions of a variety of chemicals on substrates is disclosed. The analyzer includes an array of sensors, each of which detects a single chemical or narrow range of chemicals, a scanning mechanism to provide a mapping capability, an electrical signal analyzer to collect and analyze signals from the array of sensors and generate reports of chemical distributions, and an optical desorption mechanism to amplify detection. A preferred embodiment includes an array of miniature quadrupole mass spectrometers in the sensor array. Scanning modes include whole substrate mapping, region sampling, and spot sampling of known defect sites.
摘要翻译：减少化学污染物对于在电子设备制造过程中保持竞争性的生产成本越来越重要。目前没有生产基地的能力，用于在日常的基础上映射电子设备基板上的化学污染物。公开了一种用于映射各种化学品在基片上的分布的扫描表面化学分析仪。该分析仪包括一组传感器，每个传感器检测化学品的单一化学或窄范围，提供映射能力的扫描机构，电信号分析仪，用于收集和分析来自传感器阵列的信号，并生成化学分布的报告，以及用于放大检测的光解吸机理。优选实施例包括传感器阵列中的微型四极杆质谱仪阵列。扫描模式包括全基板映射，区域采样和已知缺陷位点的采样。

30. 发明申请

US20100156445A1 Apparatus and Method for Electrical Characterization by Selecting and Adjusting the Light for a Target Depth of a Semiconductor 有权
标题翻译：通过选择和调整半导体目标深度的光的电气特性的装置和方法
公开(公告)号：US20100156445A1
公开(公告)日：2010-06-24
申请号：US12700564
申请日：2010-02-04
申请人： Emil Kamieniecki
发明人： Emil Kamieniecki
IPC分类号： G01R31/302
CPC分类号： G01R31/2648 , G01R31/2656 , G01R31/2831
摘要： The present disclosure provides methods and apparatus that enable characterization of an electrical property of a semiconductor specimen, e.g., dopant concentration of a near-surface region of the specimen. In exemplary method, a target depth for measurement is selected. This thickness may, for example, correspond to a nominal production thickness of a thin active device region of the specimen. A light is adjusted to an intensity selected to characterize a target region of the specimen having a thickness no greater than the target depth and a surface of the specimen is illuminated with the light. An AC voltage signal induced in the specimen by the light is measured and this AC voltage may be used to quantify an aspect of the electrical property, e.g., to determine dopant concentration, of the target region.
摘要翻译：本公开提供了能够表征半导体样品的电性质的方法和装置，例如样品的近表面区域的掺杂剂浓度。在示例性方法中，选择用于测量的目标深度。该厚度可以例如对应于样品的薄活性元件区域的标称生产厚度。将光调整到选择的强度，以表征具有不大于目标深度的厚度的样本的目标区域，并且用光照射样本的表面。测量通过光在样本中感应的AC电压信号，并且该AC电压可用于量化目标区域的电性质的一个方面，例如确定掺杂剂浓度。

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