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    • 21. 发明授权
    • Shift register and display apparatus using same
    • 移位寄存器和使用相同的显示设备
    • US07190342B2
    • 2007-03-13
    • US10376320
    • 2003-03-03
    • Eiji MatsudaSeijirou GyoutenHajime Washio
    • Eiji MatsudaSeijirou GyoutenHajime Washio
    • G11C19/28
    • G09G3/3677G09G3/3688G09G2310/0283G09G2310/0289G11C19/00G11C19/28
    • In a shift register, which is for use in an image display apparatus of the TFT active matrix type in which a driver circuit is integrally provided on a display panel, and which is so arranged as to boost a start pulse SP to a start pulse SPO by using a level shifter, and to supply the start pulse SPO to a flip-flop F1 of a shift register section, the start pulse SP having an amplitude lower than a driving voltage and being supplied thereto, the shift register is provided with an operation control circuit for inactivating the level shifter when the first stage flip-flop F1 outputs an output signal S1 and activates the level shifter when a last stage flip-flop Fn outputs an output signal Sn. Therefore, it is possible to reduce power consumption of the level shifter during a period in which the start pulse SPO is transmitted from a flip-flop F2 to a flip-flop Fn−1.
    • 在用于TFT有源矩阵型图像显示装置的移位寄存器中,其中驱动电路一体地设置在显示面板上,并且被布置为将起始脉冲SP提升到起始脉冲SPO 通过使用电平移位器,并且将起始脉冲SPO提供给移位寄存器部分的触发器F 1,起始脉冲SP具有低于驱动电压的振幅并被提供给其,移位寄存器设置有 操作控制电路,用于当第一级触发器F 1输出输出信号S 1时使电平移位器钝化,并且当最后级触发器Fn输出输出信号Sn时激活电平移位器。 因此,可以在将起始脉冲SPO从触发器F 2发送到触发器Fn-1的时段期间降低电平移位器的功耗。
    • 23. 发明授权
    • Driving device of display device, display device and driving method of display device
    • 显示装置的驱动装置,显示装置和显示装置的驱动方法
    • US07369113B2
    • 2008-05-06
    • US11080848
    • 2005-03-16
    • Hajime WashioShinya TakahashiYuhiehiroh MurakamiSeijirou GyoutenShigeto Yoshida
    • Hajime WashioShinya TakahashiYuhiehiroh MurakamiSeijirou GyoutenShigeto Yoshida
    • G09G3/36
    • G09G3/3688G09G3/3677G09G2310/0289G09G2310/04
    • A driving device of a display device includes: a data signal line driving circuit including a shift register which has (i) multiple stages of flip-flops each of which operates in synchronism with a source clock signal and (ii) a level shifter for boosting the source clock signal whose amplitude is smaller than a driving voltage of each of the flip-flops so as to apply the driving voltage to the flip-flop, said data signal line driving circuit causing a sampling circuit to sample the image display data signal based on an output from the shift register so as to output the image display data signal to the data signal line; and control means for causing a frequency of the source clock signal in case of displaying an image to be higher than a frequency of the source clock signal in case of normal display in which multi-gradation display is performed in a full-color mode. Thus, it is possible to provide a driving device of a display device, a display device, and a driving method of the display device, whereby it is possible to reduce power consumption caused by an invalid current of the level shifter.
    • 显示装置的驱动装置包括:数据信号线驱动电路,包括移位寄存器,其具有(i)多个触发器级,每个触发器与源时钟信号同步操作;以及(ii)用于升压的电平移位器 所述源时钟信号的振幅小于每个触发器的驱动电压,以将驱动电压施加到触发器,所述数据信号线驱动电路使采样电路基于图像显示数据信号进行采样 在移位寄存器的输出上输出图像显示数据信号至数据信号线; 以及控制装置,用于在以全色模式进行多灰度显示的正常显示的情况下,在显示图像的情况下使源时钟信号的频率高于源时钟信号的频率。 因此,可以提供显示装置的驱动装置,显示装置和显示装置的驱动方法,从而可以降低由电平转换器的无效电流引起的功耗。
    • 24. 发明申请
    • Driving device of display device, display device and driving method of display device
    • 显示装置的驱动装置,显示装置和显示装置的驱动方法
    • US20050206604A1
    • 2005-09-22
    • US11080848
    • 2005-03-16
    • Hajime WashioShinya TakahashiYuhiehiroh MurakamiSeijirou GyoutenShigeto Yoshida
    • Hajime WashioShinya TakahashiYuhiehiroh MurakamiSeijirou GyoutenShigeto Yoshida
    • G02F1/133G09G3/20G09G3/36
    • G09G3/3688G09G3/3677G09G2310/0289G09G2310/04
    • A driving device of a display device includes: a data signal line driving circuit including a shift register which has (i) multiple stages of flip-flops each of which operates in synchronism with a source clock signal and (ii) a level shifter for boosting the source clock signal whose amplitude is smaller than a driving voltage of each of the flip-flops so as to apply the driving voltage to the flip-flop, said data signal line driving circuit causing a sampling circuit to sample the image display data signal based on an output from the shift register so as to output the image display data signal to the data signal line; and control means for causing a frequency of the source clock signal in case of displaying an image to be higher than a frequency of the source clock signal in case of normal display in which multi-gradation display is performed in a full-color mode. Thus, it is possible to provide a driving device of a display device, a display device, and a driving method of the display device, whereby it is possible to reduce power consumption caused by an invalid current of the level shifter.
    • 显示装置的驱动装置包括:数据信号线驱动电路,包括移位寄存器,其具有(i)多个触发器级,每个触发器与源时钟信号同步操作;以及(ii)用于升压的电平移位器 所述源时钟信号的振幅小于每个触发器的驱动电压,以将驱动电压施加到触发器,所述数据信号线驱动电路使采样电路基于图像显示数据信号进行采样 在移位寄存器的输出上输出图像显示数据信号到数据信号线; 以及控制装置,用于在以全色模式进行多灰度显示的正常显示的情况下,在显示图像的情况下使源时钟信号的频率高于源时钟信号的频率。 因此,可以提供显示装置的驱动装置,显示装置和显示装置的驱动方法,从而可以降低由电平转换器的无效电流引起的功耗。
    • 25. 发明授权
    • Data signal line driving method, data signal line driving circuit, and display device using the same
    • 数据信号线驱动方法,数据信号线驱动电路以及使用其的显示装置
    • US07652652B2
    • 2010-01-26
    • US10705775
    • 2003-11-12
    • Kazuhiro MaedaSachio TsujinoHajime WashioYuhji Asoh
    • Kazuhiro MaedaSachio TsujinoHajime WashioYuhji Asoh
    • G09G3/36
    • G09G3/3685G09G3/20G09G3/2011G09G2310/0297
    • The data signal line driving circuit of the present invention is arranged so that data signal line groups, each of which is made up of two data signal lines sequentially disposed, are connected to two video signal lines, each of which allows a two-phased video signal to be forwarded. A shift register SR, a drive switching circuit, and a waveform shaping circuit, that constitute a video signal fetching section, collect the data signal line groups via the two video signal lines as a single block. At this time, the data signal lines are respectively driven so as to fetch the video signal from the video signal lines into the data signal lines of the data signal line groups in each block. Thus, in performing multiphase development, it is possible to provide the data signal line driving circuit which can reduce power consumption in low resolution driving compared with a case of high resolution driving.
    • 本发明的数据信号线驱动电路被布置成使得由两条数据信号线构成的数据信号线组连接到两条视频信号线,每条视频信号线允许两相视频 信号被转发。 构成视频信号取出部的移位寄存器SR,驱动切换电路以及波形整形电路通过两个视频信号线收集数据信号线组作为单个块。 此时,分别驱动数据信号线,以将视频信号从视频信号线提取到每个块中的数据信号线组的数据信号线中。 因此,在执行多相显影时,与高分辨率驱动的情况相比,可以提供能够降低分辨率驱动中的功耗的数据信号线驱动电路。
    • 26. 发明授权
    • Signal line drive circuit and display device using the same
    • 信号线驱动电路及使用其的显示装置
    • US07202846B2
    • 2007-04-10
    • US10440077
    • 2003-05-15
    • Kazuhiro MaedaSachio TsujinoKeiji TakahashiHajime Washio
    • Kazuhiro MaedaSachio TsujinoKeiji TakahashiHajime Washio
    • G09G3/36
    • G09G3/3688G09G2310/0294G09G2330/021G09G2340/0421
    • A data signal line drive circuit is provided with: a shift register belonging to a system, whose stages correspond to respective sampling units for driving odd-number-th data signal lines; and a shift register belonging to another system, whose stages correspond to respective sampling units for driving even-number-th data signal lines. On the occasion of low-resolution mode, only either of the shift registers is operated, and in accordance with the outputs from the respective stages of the shift register which has been operated, timing signals, which are supplied to the sampling units corresponding to the stages of both shift registers, are generated. With this arrangement, even if one of input signals each having different signal line resolution is inputted, a signal line drive circuit which consumes a small amount of electric power can be realized, while it is possible to specify the timings of the operation of signal line drive sections for driving signal lines, in accordance with the input signal.
    • 数据信号线驱动电路具有:属于系统的移位寄存器,其级对应于用于驱动奇数数据信号线的相应采样单元; 以及属于另一系统的移位寄存器,其级对应于用于驱动第二数据信号线的相应采样单元。 在低分辨率模式的情况下,仅移动寄存器中的任一个被操作,并且根据已经被操作的移位寄存器的各个级的输出,定时信号被提供给对应于 生成两个移位寄存器的阶段。 通过这样的配置,即使输入信号线分辨率不同的输入信号之一,也可以实现消耗少量电力的信号线驱动电路,同时可以规定信号线的动作时序 用于驱动信号线的驱动部分,根据输入信号。