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    • 22. 发明申请
    • Operation mechanism
    • 操作机制
    • US20060283285A1
    • 2006-12-21
    • US10572475
    • 2005-06-07
    • Hiroyuki YabashiSatoru Yamamoto
    • Hiroyuki YabashiSatoru Yamamoto
    • G05G1/10
    • H01H3/08H01H2003/026H01H2003/085Y10T74/2084
    • An operation unit includes a shaft-side operation member 6 attached to the above-mentioned operating shaft 3, an auxiliary operation member 7 which is fitted into and engaged with the above-mentioned shaft-side operation member 6 via an engagement means 7a for releasing engagement between the shaft-side operation member and the auxiliary operation member when shocked, and which constitutes the single operation unit together with the shaft-side operation member, and a boundary portion 8 disposed between the above-mentioned operation members with being exposed to outside the above-mentioned front panel when the above-mentioned shaft-side operation member 6 is attached to the above-mentioned operating shaft 3 while being combined with the above-mentioned auxiliary operation member 7.
    • 操作单元包括安装在上述操作轴3上的轴侧操作构件6,辅助操作构件7,其经由接合装置7a装配并与上述轴侧操作构件6接合, 在轴侧操作构件和辅助操作构件之间的冲击时释放接合,并且与轴侧操作构件一起构成单个操作单元,以及设置在上述操作构件之间的边界部分8,其暴露于 当上述轴侧操作构件6与上述辅助操作构件7组合时,将上述轴侧操作构件6安装到上述操作轴3上时,位于上述前面板外侧。
    • 26. 发明申请
    • Semiconductor integrated circuit for wireless communication
    • 半导体集成电路用于无线通信
    • US20060014510A1
    • 2006-01-19
    • US11178511
    • 2005-07-12
    • Satoru YamamotoKazuhisa Okada
    • Satoru YamamotoKazuhisa Okada
    • H04B7/00
    • H03L7/099H03J1/005H03J2200/10H03L7/087H03L7/10H03L7/193H03L7/199
    • A semiconductor integrated circuit with a PLL (Phase Locked Loop) built therein is used in a semiconductor integrated circuit for wireless communication. The PLL circuit generates an oscillation signal having a predetermined frequency, which is combined with a receive signal or a transmit signal for wireless communication. The PLL circuit includes a VCO capable of switching an oscillation frequency band, a variable divider, a loop filter and a phase comparator. An oscillation frequency of the VCO is controlled according to the difference in phase between a signal obtained by dividing the output of the VCO and a reference signal, and a discrimination circuit makes a decision as to a lead or delay of the phase of an output of the variable divider with respect to a reference signal having a predetermined frequency. An auto band selection circuit generates a signal for selecting a frequency band for the VCO.
    • 在其中内置PLL(锁相环)的半导体集成电路用于无线通信的半导体集成电路中。 PLL电路产生具有与用于无线通信的接收信号或发送信号组合的预定频率的振荡信号。 PLL电路包括能够切换振荡频带的VCO,可变分频器,环路滤波器和相位比较器。 VCO的振荡频率根据通过对VCO的输出进行分频而得到的信号与基准信号之间的相位差进行控制,判别电路判断为输出的相位的导通或延迟 相对于具有预定频率的参考信号的可变分频器。 自动频带选择电路产生用于选择VCO的频带的信号。