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21. 发明申请

US20100140685A1 Nonvolatile Memory Devices 有权
标题翻译：非易失性存储器件
公开(公告)号：US20100140685A1
公开(公告)日：2010-06-10
申请号：US12635098
申请日：2009-12-10
申请人： Pil-Kyu Kang , Daelok Bae , Jongwook Lee , Seungwoo Choi , Yong-Hoon Son , Jong-Hyuk Kang , Jung Ho Kim
发明人： Pil-Kyu Kang , Daelok Bae , Jongwook Lee , Seungwoo Choi , Yong-Hoon Son , Jong-Hyuk Kang , Jung Ho Kim
IPC分类号： H01L27/115 , H01L21/8246
CPC分类号： H01L27/11578 , H01L27/115 , H01L27/11551 , H01L27/11556 , H01L27/11582
摘要： Nonvolatile memory devices and methods of manufacturing nonvolatile memory devices are provided. The method includes patterning a bulk substrate to form an active pillar; forming a charge storage layer on a side surface of active pillar; and forming a plurality of gates connected to the active pillar, the charge storage layer being disposed between the active pillar and the gates. Before depositing a gate, a bulk substrate is etched using a dry etching to form a vertical active pillar which is in a single body with a semiconductor substrate.
摘要翻译：提供了非易失性存储器件和制造非易失性存储器件的方法。该方法包括图案化大块基板以形成有源柱; 在活性柱的侧面上形成电荷存储层; 以及形成连接到所述有源支柱的多个栅极，所述电荷存储层设置在所述有源支柱和所述栅极之间。在沉积栅极之前，使用干蚀刻来蚀刻大块衬底以形成与半导体衬底在单体中的垂直有源柱。

22. 发明申请

US20090321816A1 Vertical-type non-volatile memory device 审中-公开
标题翻译：垂直型非易失性存储器件
公开(公告)号：US20090321816A1
公开(公告)日：2009-12-31
申请号：US12459148
申请日：2009-06-26
申请人： Yong-Hoon Son , Jong-Wook Lee , Jun Seo , Jong-Hyuk Kang
发明人： Yong-Hoon Son , Jong-Wook Lee , Jun Seo , Jong-Hyuk Kang
IPC分类号： H01L29/792 , H01L27/088
CPC分类号： H01L27/11551 , H01L27/11556
摘要： In a vertical-type non-volatile memory device, first and second single-crystalline semiconductor pillars are arranged to face each other on a substrate. Each of the first and second single-crystalline semiconductor pillars has a rectangular parallelepiped shape with first, second, third and fourth sidewalls. A first tunnel oxide layer, a first charge storage layer and a first blocking dielectric layer are sequentially stacked on the entire surface of the first sidewall of the first single-crystalline semiconductor pillar. A second tunnel oxide layer, a second charge storage layer and a second blocking dielectric layer are sequentially stacked on the entire surface of the first sidewall of the second single-crystalline semiconductor pillar. A word line makes contact with surfaces of both the first and second blocking dielectric layers. The word line is used in common for the first and second single-crystalline semiconductor pillars.
摘要翻译：在垂直型非易失性存储器件中，第一和第二单晶半导体柱被布置成在衬底上彼此面对。第一和第二单晶半导体柱中的每一个具有与第一，第二，第三和第四侧壁的长方体形状。第一隧道氧化物层，第一电荷存储层和第一阻挡介电层依次层叠在第一单晶半导体柱的第一侧壁的整个表面上。第二隧道氧化物层，第二电荷存储层和第二阻挡电介质层依次层叠在第二单晶半导体柱的第一侧壁的整个表面上。字线与第一和第二阻挡电介质层的表面接触。字线用于第一和第二单晶半导体柱。

23. 发明授权

US07560319B2 Method for fabricating a semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US07560319B2
公开(公告)日：2009-07-14
申请号：US11730262
申请日：2007-03-30
申请人： Sung-Kwan Kang , Yu-Gyun Shin , Jong-Wook Lee , Yong-Hoon Son
发明人： Sung-Kwan Kang , Yu-Gyun Shin , Jong-Wook Lee , Yong-Hoon Son
IPC分类号： H01L21/84
CPC分类号： H01L21/823807 , H01L21/823878 , H01L21/84
摘要： A method of fabricating a semiconductor device includes forming an insulation layer structure on a single-crystalline silicon substrate, forming a first insulation layer structure pattern comprising a first opening by etching a portion of the insulation layer structure, filling the first opening with a non-single-crystalline silicon layer, and forming a single-crystalline silicon pattern by irradiating a first laser beam onto the non-single-crystalline silicon layer. The method also includes forming a second insulation layer structure pattern comprising a second opening by etching a portion of the first insulation layer structure, filling the second opening with a non-single-crystalline silicon-germanium layer, and forming a single-crystalline silicon-germanium pattern by irradiating a second laser beam onto the non-single-crystalline silicon-germanium layer.
摘要翻译：一种制造半导体器件的方法包括在单晶硅衬底上形成绝缘层结构，通过蚀刻绝缘层结构的一部分形成包括第一开口的第一绝缘层结构图案，单晶硅层，并且通过将第一激光束照射到非单晶硅层上而形成单晶硅图案。该方法还包括通过蚀刻第一绝缘层结构的一部分来形成包括第二开口的第二绝缘层结构图案，用非单晶硅锗层填充第二开口，以及形成单晶硅 - 锗图案，通过将第二激光束照射到非单晶硅 - 锗层上。

24. 发明申请

US20080248628A1 Methods of Forming Integrated Circuit Devices Having Single Crystal Semiconductor FIN Structures that Function as Device Active Regions 审中-公开
标题翻译：形成具有单晶半导体FIN结构作为器件活动区域的集成电路器件的方法
公开(公告)号：US20080248628A1
公开(公告)日：2008-10-09
申请号：US12056500
申请日：2008-03-27
申请人： Yong-Hoon Son , Si-Young Choi , Jong-Wook Lee
发明人： Yong-Hoon Son , Si-Young Choi , Jong-Wook Lee
IPC分类号： H01L21/3205
CPC分类号： H01L21/762 , H01L27/11521 , H01L29/66795
摘要： Methods of forming integrated circuit devices include forming an electrically insulating layer having a semiconductor fin structure extending therethrough. This semiconductor fin structure may include at least one amorphous and/or polycrystalline semiconductor region therein. The at least one amorphous and/or polycrystalline semiconductor region within the semiconductor fin structure is then converted into a single crystalline semiconductor region. This semiconductor fin structure is then used as an active region of a semiconductor device.
摘要翻译：形成集成电路器件的方法包括形成具有延伸穿过其中的半导体鳍片结构的电绝缘层。该半导体鳍结构可以包括其中的至少一个非晶和/或多晶半导体区域。然后将半导体鳍结构内的至少一个非晶和/或多晶半导体区域转换为单晶半导体区域。然后将该半导体鳍结构用作半导体器件的有源区。

25. 发明申请

US20080217689A1 SEMICONDUCTOR DEVICES HAVING SILICON-ON-INSULATOR (SOI) SUBSTRATES AND METHODS OF MANUFACTURING THE SAME 审中-公开
标题翻译：具有绝缘体（SOI）衬底的半导体器件及其制造方法
公开(公告)号：US20080217689A1
公开(公告)日：2008-09-11
申请号：US12040024
申请日：2008-02-29
申请人： Yong-Hoon Son , Hye-Ran Choi , Jong-Wook Lee
发明人： Yong-Hoon Son , Hye-Ran Choi , Jong-Wook Lee
IPC分类号： H01L27/04 , H01L21/336
CPC分类号： H01L21/823481 , H01L21/823412 , H01L21/823425 , H01L21/823437
摘要： Semiconductor devices are provided including gate patterns on a substrate and isolation regions on the substrate. Insulating patterns are provided in the substrate below the gate patterns. Source/drain regions are provided in the substrate. Related methods of fabricating semiconductor devices are also provided.
摘要翻译：提供半导体器件，其包括衬底上的栅极图案和衬底上的隔离区域。在栅极图案下面的衬底中提供绝缘图案。源极/漏极区域设置在衬底中。还提供了制造半导体器件的相关方法。

26. 发明授权

US07422965B2 Methods of fabricating p-type transistors including germanium channel regions 有权
标题翻译：制造包括锗通道区域的p型晶体管的方法
公开(公告)号：US07422965B2
公开(公告)日：2008-09-09
申请号：US11447436
申请日：2006-06-06
申请人： Yong-Hoon Son , Yu-Gyun Shin , Jong-Wook Lee
发明人： Yong-Hoon Son , Yu-Gyun Shin , Jong-Wook Lee
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： H01L29/1054 , H01L21/02532 , H01L21/02675 , H01L21/8221 , H01L27/0688 , H01L27/11 , H01L27/1104 , H01L29/16
摘要： A method of fabricating a transistor device includes forming a non-crystalline germanium layer on a seed layer. The non-crystalline germanium layer is selectively locally heated to about a melting point thereof to form a single-crystalline germanium layer on the seed layer. The non-crystalline germanium layer may be selectively locally heated, for example, by applying a laser to a portion of the non-crystalline germanium layer. Related devices are also discussed.
摘要翻译：制造晶体管器件的方法包括在种子层上形成非结晶锗层。选择性地将非结晶锗层局部加热至其熔点，以在籽晶层上形成单晶锗层。可以例如通过对非晶锗层的一部分施加激光来选择性地局部加热非晶锗层。还讨论了相关设备。

27. 发明申请

US20080157095A1 Semiconductor Devices Having Single Crystalline Silicon Layers 审中-公开
标题翻译：具有单晶硅层的半导体器件
公开(公告)号：US20080157095A1
公开(公告)日：2008-07-03
申请号：US12045890
申请日：2008-03-11
申请人： Yong-Hoon Son , Yu-Gyun Shin
发明人： Yong-Hoon Son , Yu-Gyun Shin
IPC分类号： H01L29/04
CPC分类号： H01L21/02381 , H01L21/0245 , H01L21/02507 , H01L21/02532 , H01L21/8221 , H01L27/0688
摘要： Methods of manufacturing semiconductor devices having at least one single crystal silicon layer are provided. Pursuant to these methods, a first seed layer that includes silicon is formed. A first non-single crystalline silicon layer is then formed on the first seed layer. The first non-single crystalline silicon layer is irradiated with a laser to transform the first non-single crystalline silicon layer into a first single crystalline silicon layer. Corresponding semiconductor devices are also disclosed.
摘要翻译：提供具有至少一个单晶硅层的半导体器件的制造方法。根据这些方法，形成包括硅的第一籽晶层。然后在第一种子层上形成第一非单晶硅层。用激光照射第一非单晶硅层，以将第一非单晶硅层转变为第一单晶硅层。还公开了相应的半导体器件。

28. 发明申请

US20070048913A1 Method of manufacturing a stacked semiconductor device 有权
标题翻译：叠层半导体器件的制造方法
公开(公告)号：US20070048913A1
公开(公告)日：2007-03-01
申请号：US11510622
申请日：2006-08-28
申请人： Yong-Hoon Son , Yu-Gyun Shin , Jong-Wook Lee
发明人： Yong-Hoon Son , Yu-Gyun Shin , Jong-Wook Lee
IPC分类号： H01L21/84
CPC分类号： H01L21/76879 , H01L21/02381 , H01L21/0245 , H01L21/02502 , H01L21/02532 , H01L21/0262 , H01L21/02639 , H01L21/02675 , H01L21/28525 , H01L21/76898 , H01L21/8221 , H01L21/84 , H01L23/481 , H01L23/535 , H01L25/0657 , H01L25/50 , H01L27/0688 , H01L2924/0002 , H01L2924/00
摘要： In a method of manufacturing a stacked semiconductor device, a seed layer including impurity regions may be prepared. A first insulation interlayer pattern having a first opening may be formed on the seed layer. A first SEG process may be carried out to form a first plug partially filling the first opening. A second SEG process may be performed to form a second plug filling the first opening. A third SEG process may be carried out to form a first channel layer on the first insulation interlayer pattern. A second insulation interlayer may be formed on the first channel layer. The second insulation interlayer, the first channel layer and the second plug arranged on the first plug may be removed to expose the first plug. The first plug may be removed to form a serial opening. The serial opening may be filled with a metal wiring.
摘要翻译：在制造叠层半导体器件的方法中，可以制备包括杂质区的晶种层。可以在种子层上形成具有第一开口的第一绝缘层间图案。可以执行第一SEG过程以形成部分填充第一开口的第一插塞。可以执行第二SEG过程以形成填充第一开口的第二塞子。可以执行第三SEG处理以在第一绝缘夹层图案上形成第一沟道层。可以在第一沟道层上形成第二绝缘中间层。布置在第一插头上的第二绝缘中间层，第一沟道层和第二插塞可以被去除以暴露第一插塞。可以移除第一个插头以形成串行开口。串行开口可以用金属布线填充。

29. 发明申请

US20070044706A1 Method of forming a crystalline structure and a method of manufacturing a semiconductor device 审中-公开
标题翻译：形成晶体结构的方法和半导体器件的制造方法
公开(公告)号：US20070044706A1
公开(公告)日：2007-03-01
申请号：US11509735
申请日：2006-08-25
申请人： Sung-Kwan Kang , Yu-Gyun Shin , Jong-Wook Lee , Yong-Hoon Son
发明人： Sung-Kwan Kang , Yu-Gyun Shin , Jong-Wook Lee , Yong-Hoon Son
IPC分类号： C30B1/00 , C30B28/02 , C30B3/00 , C30B5/00
CPC分类号： C30B23/02 , C30B23/025 , C30B25/18 , C30B29/06 , C30B29/08 , H01L21/02381 , H01L21/02532 , H01L21/02576 , H01L21/02579 , H01L21/02658 , H01L21/28525
摘要： In a method of forming a single crystalline structure and a method of manufacturing a semiconductor device by using the method of forming the single crystalline structure, a single crystalline seed having elements combining with oxygen to form a network former capable of being easily connected to a network of oxide glass is formed. The single crystalline seed is epitaxially grown to form a single crystalline structure.
摘要翻译：在通过使用形成单晶结构的方法形成单晶结构的方法和制造半导体器件的方法中，具有与氧结合的元件以形成能够容易地连接到网络的网络形成器的单晶种子形成氧化物玻璃。将单晶种子外延生长以形成单晶结构。

30. 发明申请

US20060154453A1 Method(s) of forming a thin layer 有权
公开(公告)号：US20060154453A1
公开(公告)日：2006-07-13
申请号：US11329158
申请日：2006-01-11
申请人： Yong-Hoon Son , Yu-Gyun Shin , Jong-Wook Lee
发明人： Yong-Hoon Son , Yu-Gyun Shin , Jong-Wook Lee
IPC分类号： H01L21/20 , H01L21/205 , H01L21/36
CPC分类号： C30B25/04 , C30B29/06 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/0262 , H01L21/02639
摘要： A method of forming a thin layer including providing a first single-crystalline silicon layer partially exposed through an opening in an insulation pattern and forming an epitaxial layer on the first single-crystalline silicon layer and forming an amorphous silicon layer on the insulation pattern, the amorphous silicon layer having a first portion adjacent the epitaxial layer and a second portion spaced apart from the first portion, wherein the amorphous silicon layer is formed on the insulation pattern at substantially the same rate at the first portion and at a second portion. The amorphous silicon layer may be formed to a uniform thickness without a thinning defect.

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