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    • 21. 发明授权
    • Test access mechanism for multi-core processor or other integrated circuit
    • 多核处理器或其他集成电路的测试访问机制
    • US08103924B2
    • 2012-01-24
    • US12021455
    • 2008-01-29
    • Grady L. GilesBrian HoangTimothy J. Wood
    • Grady L. GilesBrian HoangTimothy J. Wood
    • G01R31/28
    • G01R31/318536G01R31/318544G01R31/318572G06F11/2236
    • A processor having a pipelined test access mechanism (TAM). The processor includes a plurality of processor cores. Each of the processor cores includes a scan chain including plurality of serially-coupled scan elements. The processor further includes the pipelined TAM, which includes a plurality of pipeline stages each corresponding to one of the plurality of processor cores. The pipelined TAM includes a command channel, a scan data input (SDI) channel, a scan data output (SDO) channel, and a compare channel. Each pipeline stage is operable to convey commands to its corresponding processor core via the command channel, to convey scan input data to its corresponding processor core via the SDI channel, to receive scan output data conveyed from the corresponding processor core to the SDO channel and the compare channel, and convey compare data downstream via the compare channel, wherein the compare data is based on the scan output data.
    • 具有流水线测试访问机制(TAM)的处理器。 处理器包括多个处理器核心。 每个处理器核心包括包括多个串联扫描元件的扫描链。 处理器还包括流水线TAM,流水线TAM包括多个流水线级,每个流水线对应于多个处理器核心之一。 流水线TAM包括命令通道,扫描数据输入(SDI)通道,扫描数据输出(SDO)通道和比较通道。 每个流水线级可操作以经由命令通道将命令传送到其对应的处理器核心,以经由SDI信道将扫描输入数据传送到其对应的处理器核心,以接收从相应处理器核心传送到SDO通道的扫描输出数据, 比较通道,并通过比较通道向下游传送比较数据,其中比较数据基于扫描输出数据。
    • 22. 发明授权
    • Cannula with flexible remote cable filter deployment
    • 插管与灵活的远程电缆过滤器部署
    • US06953471B1
    • 2005-10-11
    • US10071680
    • 2002-02-07
    • Richard LillyRichard O. MurphyPeter ThorntonTimothy J. Wood
    • Richard LillyRichard O. MurphyPeter ThorntonTimothy J. Wood
    • A61F2/01A61M29/00
    • A61F2/013A61F2002/018A61F2230/0006A61F2230/008
    • A medical device for filtering embolic material. The device comprises a cannula having a lumen, the lumen communicating with a port at the distal end. A port is located on an outer surface of the cannula adjacent a distal region of the cannula, the port having a passage extending distally and communicating with a distal opening in the port. A filter is removably insertable through the passage of the port, the filter comprising a flexible tubular member, a flexible shaft extending through the tubular member, and an expansion frame mounted on the distal end of the shaft. A filter mesh attached to the expansion frame. The expansion frame may optionally include a cantilever beam to support the far end of the frame, and in certain cases the cantilever beam is flexible to avoid scraping the vessel wall during use. Methods of use are also described.
    • 一种用于过滤栓塞物质的医疗设备。 该装置包括具有内腔的套管,所述内腔与远端的端口连通。 端口位于套管的外部表面上,邻近套管的远侧区域,该端口具有向远端延伸并与端口中的远端开口连通的通道。 过滤器可移除地通过端口的通道插入,过滤器包括柔性管状构件,延伸穿过管状构件的柔性轴和安装在轴的远端上的膨胀框架。 连接到扩展框架的滤网。 扩展框架可以可选地包括支撑框架的远端的悬臂梁,并且在某些情况下,悬臂梁是柔性的,以避免在使用过程中刮擦容器壁。 还描述了使用方法。
    • 25. 发明授权
    • Fiber optic catheter with twistable tip
    • 光纤导管带有可扭转的尖端
    • US5429604A
    • 1995-07-04
    • US335955
    • 1994-11-03
    • Dan J. HammersmarkTimothy J. WoodMatthew S. Solar
    • Dan J. HammersmarkTimothy J. WoodMatthew S. Solar
    • A61B1/00A61B18/20A61B18/24A61B19/00A61M25/00A61M25/01A61M37/00
    • A61M25/0144A61B18/245A61M25/01A61M25/0133A61M25/0136A61B2090/031A61M2025/0183
    • The present invention is a catheter with a twistable tip. The catheter having a flexible wall for use in complex twisting anatomy contains a torque wire or a torquable guide wire lumen. The torque wire or torquable guide wire lumen extends through the length of the catheter and is attached to the catheter at or near the distal end thereof. The distal face of the catheter is angled to self align the catheter with an obstruction upon insertion. The proximal end of the torque wire protrudes from the proximal end of the catheter and is attached to a turn limiter. Rotation of the turn limiter imparts a torque to the torque wire or torquable guide wire lumen which is transmitted through the catheter to the distal end of the catheter where the applied torque twists the distal tip to manually align the tip with an obstruction. The twisting response at the tip of the catheter is determined by the torque applied to the torque element, the material and dimensional profile of the torque element, the attachment point of the torque element to the catheter and the material and dimensional profile of the catheter.
    • 本发明是具有可扭转尖端的导管。 具有用于复合扭转解剖结构的柔性壁的导管包含扭矩线或可扭转的导丝管腔。 扭矩线或扭转导丝腔延伸穿过导管的长度并且在其远端处或其远端处附接到导管。 导管的远侧面成角度,以便在插入时自动对准导管与障碍物。 扭矩线的近端从导管的近端突出并附接到转动限制器。 转动限制器的旋转向扭矩线或扭转导丝管腔施加扭矩,扭矩线或扭转导丝管腔通过导管传递到导管的远端,其中施加的扭矩扭转远侧末端以手动地将尖端对准阻塞物。 导管尖端的扭转响应由施加到扭矩元件的扭矩,扭矩元件的材料和尺寸轮廓,扭矩元件与导管的连接点以及导管的材料和尺寸轮廓确定。
    • 28. 发明申请
    • MECHANISM FOR MAINTAINING CACHE SOFT REPAIRS ACROSS POWER STATE TRANSITIONS
    • 维持电源状态转换的缓存软件维修机制
    • US20120030509A1
    • 2012-02-02
    • US12843916
    • 2010-07-27
    • Timothy J. WoodCharles Ouyang
    • Timothy J. WoodCharles Ouyang
    • G06F11/14
    • G11C29/78G06F9/4418G06F11/2236G11C29/4401G11C2029/0401G11C2029/0407
    • A processor core includes one or more cache memories and a repair unit. The repair unit may repair locations in the cache memories identified as having errors during an initialization sequence. The repair unit may further cause information corresponding to the repair locations to be stored within one or more storages. In response to initiation of a power-down state of a given processor core, the given processor core may execute microcode instructions that cause the information from the one or more storages to be saved to a memory unit. During a recovery of the given processor core from the power-down state, the processor core may execute additional microcode instructions that cause the information to be retrieved from the memory unit, and saved to the one or more storages. The repair unit may restore repairs to the locations in the cache memories using the information.
    • 处理器核心包括一个或多个缓存存储器和修复单元。 修复单元可以修复在初始化序列期间被识别为具有错误的高速缓冲存储器中的位置。 维修单元还可以使得与维修位置对应的信息存储在一个或多个存储器中。 响应于给定处理器核心的掉电状态的启动,给定的处理器核心可以执行微代码指令,其使来自一个或多个存储器的信息被保存到存储器单元。 在给定处理器核心从掉电状态恢复期间,处理器核心可以执行附加的微代码指令,其使得从存储器单元检索信息,并将其保存到一个或多个存储器。 修复单元可以使用该信息恢复对高速缓冲存储器中的位置的修复。
    • 30. 发明授权
    • Multi-core integrated circuit with shared debug port
    • 具有共享调试端口的多核集成电路
    • US07665002B1
    • 2010-02-16
    • US11302942
    • 2005-12-14
    • Scott A. WhiteMichael T. ClarkTimothy J. Wood
    • Scott A. WhiteMichael T. ClarkTimothy J. Wood
    • G01R31/28
    • G01R31/318583G01R31/31705G06F11/267G06F11/3656
    • A single test access port, such as a JTAG-based debug port may be utilized to perform debug operations on logic cores of a multi-core integrated circuit, such as a multi-core processor. The shared debug port may respond to a particular command to enter a debugging mode and may be configured to forward all commands and data to a debugging controller of the integrated circuit during debugging. A mask register may be used to indicate which logic cores of the multi-core integrated circuit should be debugged. Additionally, custom debugging commands may include mask or core select fields to indicate which logic cores should be affected by the particular command. Debugging mode may be initialized for one or more logic cores either externally, such as be asserted a DBREQ signal, or internally, such as by configuring one or more breakpoints.
    • 可以使用诸如基于JTAG的调试端口的单个测试访问端口来执行诸如多核处理器的多核集成电路的逻辑核的调试操作。 共享调试端口可以响应特定命令进入调试模式,并且可以配置为在调试期间将所有命令和数据转发到集成电路的调试控制器。 可以使用掩码寄存器来指示应该调试多核集成电路的哪些逻辑核心。 此外,自定义调试命令可以包括掩码或核心选择字段,以指示特定命令应该影响哪些逻辑核心。 可以在外部对一个或多个逻辑核心初始化调试模式,例如断言DBREQ信号,或内部,例如通过配置一个或多个断点。