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21. 发明授权

US5638029A Circuit for externally overdriving an internal clock 失效
标题翻译：用于外部过驱动内部时钟的电路
公开(公告)号：US5638029A
公开(公告)日：1997-06-10
申请号：US479301
申请日：1995-06-07
申请人： Timothy G. O'Shaughnessy
发明人： Timothy G. O'Shaughnessy
IPC分类号： H03K3/03 , H03L7/00 , H03L7/097 , H03B5/24
CPC分类号： H03K3/03 , H03L7/00 , H03L7/097
摘要： A clock overdrive function is provided which advantageously facilitates testing of circuits incorporating timing circuits. The clock overdrive function allows a tester to furnish a clock pulse timing reference to drive a circuit containing a system clock, thereby overdriving the system clock signal. Overdriving of the system clock signal allows precise control of circuit timing. A method of overdriving a system clock signal includes the steps of forming a low reference voltage and a high reference voltage, applying a timing signal having a timing signal voltage at an external pin, comparing the timing signal voltage at the external pin to the low reference voltage and the high reference voltage, driving the circuit with the system clock timing signal when the timing signal voltage at the external pin is less than the low reference voltage and driving the circuit with the timing signal at the external pin, otherwise.
摘要翻译：提供时钟过驱动功能，其有利地有助于测试包含时序电路的电路。时钟过载功能允许测试人员提供时钟脉冲定时参考以驱动包含系统时钟的电路，从而过载驱动系统时钟信号。过载驱动系统时钟信号可以精确控制电路时序。一种过驱动系统时钟信号的方法包括以下步骤：形成低参考电压和高参考电压，在外部引脚施加具有定时信号电压的定时信号，将外部引脚上的定时信号电压与低参考值进行比较电压和高参考电压，当外部引脚的定时信号电压小于低参考电压并用外部引脚的定时信号驱动电路时，用系统时钟定时信号驱动电路，否则。

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