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21. 发明授权

US08001410B2 Efficient clocking scheme for ultra high-speed systems 有权
标题翻译：超高速系统的高效计时方案
公开(公告)号：US08001410B2
公开(公告)日：2011-08-16
申请号：US12264354
申请日：2008-11-04
申请人： Feng Lin
发明人： Feng Lin
IPC分类号： G06F1/00 , G06F1/12 , G06F12/00 , H03K3/84 , H03K5/01 , H03K21/00 , H03L7/00 , H03B21/00 , H03B5/20 , H03B5/08 , G11C8/00 , H04L7/00
CPC分类号： G11C29/02 , G06F1/04 , G11C7/22 , G11C7/222 , G11C11/4076 , G11C29/023 , H03L7/0814
摘要： There is provided a system for comparing the phase characteristics of three generated clock signals, each having a unique phase relationship with an original clock signal, with the original clock signal and to select a signal based on the proximity of the phase characteristic of the three signals to the original signal. The selection of a clock signal that most closely approximates the original significantly reduces lock time when attempting to synchronize an internal clock with an external clock. Additionally, there is provided a method for comparing three clock signals with an original clock signal and selecting from the three clock signals one that is approximately in phase with the original clock signal.
摘要翻译：提供了一种用于将三个生成的时钟信号的相位特性与原始时钟信号进行比较的系统，每个时钟信号与原始时钟信号具有唯一的相位关系，并且基于三个信号的相位特性的接近来选择信号到原来的信号。当尝试将内部时钟与外部时钟同步时，选择最接近原来的时钟信号可显着减少锁定时间。此外，提供了一种用于将三个时钟信号与原始时钟信号进行比较的方法，并且从三个时钟信号中选择与原始时钟信号大致同相的一个。

22. 发明授权

US07969595B2 Internet printing 失效
标题翻译：互联网打印
公开(公告)号：US07969595B2
公开(公告)日：2011-06-28
申请号：US10587890
申请日：2004-09-20
申请人： Feng Lin , Ling Su
发明人： Feng Lin , Ling Su
IPC分类号： G06F3/12 , G06K15/00
CPC分类号： G06F3/1286 , G06F3/1204 , G06F3/126 , G06F3/1288 , H04N1/00222 , H04N1/00233 , H04N1/00244 , H04N1/0035 , H04N1/00384 , H04N2201/0075
摘要： A network printer for users printing documents in the Internet contains a keypad, when a user on the keypad enters a number, the printer sends the number to a first server; the first Internet server translates the number into the URL of a document in a second server in the Internet, and sends the URL to the printer; according to the URL, the printer retrieves the document from the second server via Internet, and prints the document.
摘要翻译：用于在因特网上打印文档的用户的网络打印机包含小键盘，当键盘上的用户输入数字时，打印机将号码发送到第一服务器; 第一个互联网服务器将该号码转换成Internet中的第二个服务器中的文档的URL，并将该URL发送到打印机; 根据URL，打印机通过互联网从第二台服务器检索文档，并打印文档。

23. 发明授权

US07961019B2 Delay-lock loop and method adapting itself to operate over a wide frequency range 有权
公开(公告)号：US07961019B2
公开(公告)日：2011-06-14
申请号：US12605203
申请日：2009-10-23
申请人： Feng Lin
发明人： Feng Lin
IPC分类号： H03L7/06
CPC分类号： G11C29/02 , G11C7/20 , G11C7/22 , G11C7/222 , G11C11/4072 , G11C11/4076 , G11C29/023 , G11C29/028 , G11C29/50012 , G11C2029/0409
摘要： A delay-lock loop receives an input clock signal from the output of a programmable divider that receives a reference clock signal. The delay-lock loop includes a voltage-controlled delay line generating a plurality of delayed clock signals having different phases. A plurality of the delayed clock signals are combined to generate a plurality of output signals. During an initialization period, an initialization circuit sets the delay of the delay line to a minimum delay value and then compares this delay value to the period of the input clock signal. Based on this comparison, the initialization circuit programs the programmable divider and adjusts the number of delayed clock signals combined to generate the output signals. More specifically, as the frequency of the reference clock signal increases, the divider is programmed to divide by a greater number, and a larger number of delay clock signals are combined to generate the output signals.

24. 发明申请

US20110050307A1 CIRCUITS AND METHODS FOR CLOCK SIGNAL DUTY-CYCLE CORRECTION 有权
公开(公告)号：US20110050307A1
公开(公告)日：2011-03-03
申请号：US12553792
申请日：2009-09-03
申请人： Feng Lin
发明人： Feng Lin
IPC分类号： H03K3/017
CPC分类号： H03K5/1565 , H03K5/133 , H03K2005/00065 , H03K2005/00071 , H03L7/0814
摘要： Duty-cycle correction circuits, clock distribution networks, and methods for correcting duty-cycle distortion are disclosed, including methods and apparatus for correcting duty-cycle distortion of differential output clock signals provided from a clock distribution network. In one such method, a single-ended clock signal is generated from differential input clock signals for distribution over a clock distribution network and from which the differential output clock signals are generated. A delay of a model delay path is matched to a propagation delay of the clock distribution network, and the single ended clock signal is adjusted to compensate for duty-cycle distortion.

25. 发明申请

US20100285040A1 Methods of enhancing immune response using electroporation-assisted vaccination and boosting 审中-公开
标题翻译：使用电穿孔辅助疫苗接种和加强增强免疫反应的方法
公开(公告)号：US20100285040A1
公开(公告)日：2010-11-11
申请号：US11985871
申请日：2007-11-16
申请人： Iacob Mathiesen , Torunn Elisabeth Tjelle , Rune Kjeken , Dietmar Paul Rabussay , Feng Lin
发明人： Iacob Mathiesen , Torunn Elisabeth Tjelle , Rune Kjeken , Dietmar Paul Rabussay , Feng Lin
IPC分类号： A61K39/00 , A61K31/7088 , A61P37/04
CPC分类号： A61K39/00 , A61K2039/545
摘要： Disclosed are methods of enhancing immune responses. Such methods involve the administration of vaccine compositions to different tissues to elicit an enhanced immune response. The enhanced response arises from the vaccination and boosting route of administration in two separate patient tissues, for example, by first administering a priming vaccination into skin and later administering a boost vaccination in muscle. In each case, priming and boosting, the administration of the vaccine composition is preferably carried out using contemporaneous electroporation-assisted delivery of the antigenic agent.
摘要翻译：公开了增强免疫应答的方法。这样的方法涉及向不同组织施用疫苗组合物以引发增强的免疫应答。增强的反应来自于在两个单独的患者组织中的接种和加强给药途径，例如，首先将皮下注射疫苗接种，然后在肌肉中施用加强免疫接种。在每种情况下，引发和加强疫苗组合物的施用优选使用同时进行的抗原性电穿孔辅助递送来进行。

26. 发明申请

US20100067691A1 Document certification and authentication system 审中-公开
标题翻译：文件认证和认证系统
公开(公告)号：US20100067691A1
公开(公告)日：2010-03-18
申请号：US12150098
申请日：2008-04-25
申请人： Feng Lin , Robert D. Brandt , William Stephen Lacy
发明人： Feng Lin , Robert D. Brandt , William Stephen Lacy
IPC分类号： G09C5/00
CPC分类号： H04L9/3247 , H04L2209/608 , H04L2209/805 , H04N1/32144 , H04N2201/3205 , H04N2201/3235 , H04N2201/3236 , H04N2201/3281
摘要： This invention safeguards the integrity of a machine-printed paper document by entangling a characteristic signature derived from the document's paper grain structure with the identities of the printing device and the person or organization which issued the document. This protection is achieved using a certification phase performed by an augmented document printer and an authentication phase performed by an augmented document scanner. In the certification phase, the grain structure of a specific area of the original paper is imaged and processed to generate a unique signature for the paper. This signature is doubly encrypted using the private keys of the augmented printer and the certifier. These encryption steps entangle the signature of the paper with its source information in a way that thwarts counterfeiting attacks which either copy the document or falsely attribute its source to a specific printer and/or certifier.
摘要翻译：本发明通过利用印刷装置和发行文件的个人或组织的身份缠绕从文件的纸粒结构导出的特征签名来保护机器打印的纸张文档的完整性。使用由增强文档打印机执行的认证阶段和由增强的文档扫描器执行的认证阶段来实现该保护。在认证阶段，原始纸张的特定区域的纹理结构被成像和处理，以产生纸张的唯一签名。该签名使用增强打印机和验证者的私钥进行双重加密。这些加密步骤以阻止伪造攻击的方式将纸张的签名与其源信息混合在一起，该伪造攻击复制文档或将其源错误地归属于特定打印机和/或验证者。

27. 发明授权

US07632229B2 Range dependent weighting for spatial compound imaging 有权
标题翻译：空间复合成像的范围依赖加权
公开(公告)号：US07632229B2
公开(公告)日：2009-12-15
申请号：US10914326
申请日：2004-08-09
申请人： Michael Joseph Washburn , Feng Lin
发明人： Michael Joseph Washburn , Feng Lin
IPC分类号： A61B8/00 , A61B8/12 , A61B8/14
CPC分类号： G01S7/52077 , G01S15/8995
摘要： A system and method for range dependent weighting in ultrasound imaging. The system includes a transducer array, a data acquisition system, and an imaging processor. The transducer array receives a first ultrasound beam having a first focal depth. The data acquisition system receives a first ultrasound imaging signal from the array. The first signal includes first image data based on at least the first ultrasound beam. The imaging processor combines a first data contribution from the first image data with at least second image data from a second ultrasound imaging signal to create a spatially compounded image. The first data contribution is based on at least the focal depth of the first beam.
摘要翻译：超声成像中范围依赖加权的系统和方法。该系统包括换能器阵列，数据采集系统和成像处理器。换能器阵列接收具有第一焦点深度的第一超声波束。数据采集系统从阵列接收第一超声成像信号。第一信号包括至少基于第一超声波束的第一图像数据。成像处理器将来自第一图像数据的第一数据贡献与来自第二超声成像信号的至少第二图像数据组合以创建空间复合图像。第一数据贡献基于至少第一光束的焦深。

28. 发明授权

US07627339B2 Application-oriented and intelligent method for switching communication modes of a dual-mode communication module 有权
标题翻译：面向应用和智能化双模通信模块通信模式切换方法
公开(公告)号：US07627339B2
公开(公告)日：2009-12-01
申请号：US11695062
申请日：2007-04-02
申请人： Feng Lin , Shin-Ming Cheng , Shun-Ren Yang , Pei-Tang Huang
发明人： Feng Lin , Shin-Ming Cheng , Shun-Ren Yang , Pei-Tang Huang
IPC分类号： H04Q7/20
CPC分类号： H04W48/18 , H04W4/02 , H04W88/06
摘要： An application-oriented and intelligent method for switching communication modes of a dual-mode communication module is provided. Whether the application program utilizes location-based service is first confirmed. When the application program utilizes location-based service, said communication module is switched to the first communication mode. Otherwise, evaluation, about which one from both the first communication mode and the second communication mode is more beneficial for a user, is performed on the communication module, according to both an available bandwidth and quality of service provided by a communication mode and to both a power and a credit of utilizing communication functions of the communication module. At last, a result of the evaluation is utilized for determining which communication mode from both the first communication mode and the second communication mode to be utilized by the communication module.
摘要翻译：提供了一种用于切换双模通信模块的通信模式的面向应用和智能的方法。应用程序是否使用基于位置的服务首先得到确认。当应用程序使用基于位置的服务时，所述通信模块被切换到第一通信模式。否则，根据通信模式提供的可用带宽和服务质量以及通信模式提供的服务质量，对通信模块执行关于从第一通信模式和第二通信模式两者中的哪一个对用户更有利的评估利用通信模块的通信功能的功能和功能。最后，评估结果用于确定通信模块将利用来自第一通信模式和第二通信模式的通信模式。

29. 发明申请

US20090195279A1 DELAY LOCKED LOOP CIRCUIT AND METHOD 有权
标题翻译：延迟锁定环路和方法
公开(公告)号：US20090195279A1
公开(公告)日：2009-08-06
申请号：US12026155
申请日：2008-02-05
申请人： Feng Lin
发明人： Feng Lin
IPC分类号： H03L7/06
CPC分类号： H03L7/0812
摘要： Delay locked loop circuits and methods are disclosed. In the embodiments, a delay locked loop may include a phase detector to detect a phase difference between a clock signal and a reference clock signal, and a charge pump that receives the detected phase difference. A low pass filter may filter an output from the charge pump. The delay locked loop may further include a delay line having a plurality of delay elements, the plurality of delay elements including a first selectable group and a second selectable group that is larger than the first selectable group. A first clock signal from the first group of delay elements may be provided to the phase detector to first synchronize the delay locked loop, and following the synchronization, a second clock signal from the second group may be employed to synchronize the delay locked loop.
摘要翻译：公开了延迟锁定环电路和方法。在实施例中，延迟锁定环路可以包括用于检测时钟信号和参考时钟信号之间的相位差的相位检测器和接收检测到的相位差的电荷泵。低通滤波器可以对电荷泵的输出进行滤波。延迟锁定环还可以包括具有多个延迟元件的延迟线，所述多个延迟元件包括大于第一可选择组的第一可选组和第二可选组。来自第一组延迟元件的第一时钟信号可以被提供给相位检测器以首先同步延迟锁定环，并且在同步之后，可以采用来自第二组的第二时钟信号来同步延迟锁定环。

30. 发明授权

US07528638B2 Clock signal distribution with reduced parasitic loading effects 有权
标题翻译：时钟信号分布具有减小的寄生负载效应
公开(公告)号：US07528638B2
公开(公告)日：2009-05-05
申请号：US10744206
申请日：2003-12-22
申请人： Seong-hoon Lee , Feng Lin
发明人： Seong-hoon Lee , Feng Lin
IPC分类号： H03L7/06
CPC分类号： H03L7/07 , G06F1/10 , H03L7/0812 , H03L7/0995
摘要： Clock signal distribution systems with reduced parasitic loading effects are provided. A reference clock is frequency-divided to produce a lower frequency clock signal. A delay-locked loop (DLL) circuit locks to the lower frequency clock signal, and outputs a corresponding lower frequency clock signal for distribution over a long trace. Power consumption caused by parasitic capacitance of the trace is thereby reduced. Parasitic effects associated with clock jitter are also reduced. A frequency multiplying phase-locked loop (PLL) circuit locks to the lower frequency clock signal, and outputs at least one clock signal having a higher frequency than the lower frequency signal.
摘要翻译：提供具有减小的寄生负载效应的时钟信号分配系统。参考时钟被分频以产生较低频率的时钟信号。延迟锁定环（DLL）电路锁定到较低频率时钟信号，并输出相应的较低频率时钟信号，以在较长的轨迹上分布。因此，由于迹线的寄生电容引起的功耗降低。与时钟抖动相关的寄生效应也降低。频率倍增锁相环（PLL）电路锁定到较低频率时钟信号，并且输出具有比低频信号更高频率的至少一个时钟信号。

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