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21. 发明授权

US07365272B2 Circuit board with identifiable information and method for fabricating the same 有权
公开(公告)号：US07365272B2
公开(公告)日：2008-04-29
申请号：US10921832
申请日：2004-08-20
申请人： Shih-Ping Hsu , Shang-Wei Chen , Suo-Hsia Tang , Chao-Wen Shih
发明人： Shih-Ping Hsu , Shang-Wei Chen , Suo-Hsia Tang , Chao-Wen Shih
IPC分类号： H05K1/00
CPC分类号： H05K1/0266 , H05K1/0269 , H05K3/107 , H05K3/4644 , H05K2201/09781 , H05K2201/09927 , H05K2201/09936
摘要： A circuit board with identifiable information and a method for fabricating the same are proposed. At least one insulating layer within the circuit board has a non-circuit area free of a circuit layout. A plurality of openings are formed in the non-circuit area of the insulating layer. A patterned circuit layer is formed on the insulating layer. Metal identifiable information is disposed in the openings of the non-circuit area. By this arrangement, a product status of the circuit board can be traced and identified via the metal patterned information.

22. 发明申请

US20080024998A1 Substrate structure integrated with passive components 审中-公开
公开(公告)号：US20080024998A1
公开(公告)日：2008-01-31
申请号：US11881547
申请日：2007-07-26
申请人： Shih-Ping Hsu
发明人： Shih-Ping Hsu
IPC分类号： H05K7/20
CPC分类号： H01L23/5389 , H01L24/24 , H01L24/82 , H01L2224/05001 , H01L2224/05008 , H01L2224/05023 , H01L2224/05548 , H01L2224/05569 , H01L2224/12105 , H01L2224/24137 , H01L2224/24227 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/92244 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01024 , H01L2924/01025 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01038 , H01L2924/01044 , H01L2924/01047 , H01L2924/01056 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/09701 , H01L2924/14 , H01L2924/15153 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/3025 , H05K1/023 , H05K1/185 , H05K3/0064 , H05K3/4602 , H05K3/4644 , H05K2201/09536 , H05K2201/10636 , H05K2203/1469 , Y02P70/611 , H01L2224/05599 , H01L2224/05099
摘要： An electronic element package integrated with passive components is proposed. The electronic element package includes a carrier plate and a plurality of passive components provided on the carrier plate, wherein first electrodes are formed on the passive components; an insulating layer formed on a surface of the carrier plate provided with the passive components, and at least one opening formed in the insulating layer, with one side of the opening being sealed by the carrier plate; an electronic element with second electrodes received in the opening; a first patterned circuit structures formed on the insulating layer and electrically connected to the first electrodes on the passive components; a dielectric layer formed on the insulating layer, first patterned circuit structures and electronic element; and a second patterned circuit structures formed on the dielectric layer and electrically connected to the first patterned circuit structures and the second electrodes on the electronic element, so as to integrate electronic elements and passive components in the electronic element package to provide all kinds of electric designs needed.

23. 发明申请

US20080023821A1 Substrate structure integrated with passive components 审中-公开
标题翻译：与被动元件集成的基板结构
公开(公告)号：US20080023821A1
公开(公告)日：2008-01-31
申请号：US11881546
申请日：2007-07-26
申请人： Shih-Ping Hsu
发明人： Shih-Ping Hsu
IPC分类号： H01L23/12
CPC分类号： H05K1/185 , H01L23/5389 , H01L24/19 , H01L24/24 , H01L24/82 , H01L2224/05001 , H01L2224/05008 , H01L2224/05023 , H01L2224/05548 , H01L2224/05569 , H01L2224/12105 , H01L2224/24137 , H01L2224/24227 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01024 , H01L2924/01025 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01038 , H01L2924/01044 , H01L2924/01047 , H01L2924/01056 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/09701 , H01L2924/14 , H01L2924/15153 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/3025 , H05K3/4602 , H05K3/4644 , H05K2201/09536 , H05K2201/10636 , H05K2203/1469 , Y02P70/611 , H01L2224/05599 , H01L2224/05099
摘要： An electronic element package integrated with passive components is proposed. The electronic element package includes a carrier plate and a plurality of passive components provided on the carrier plate, wherein first electrodes are formed on the passive components; an insulating layer formed on a surface of the carrier plate provided with the passive components, and at least one opening formed in the insulating layer, with one side of the opening being sealed by the carrier plate; an electronic element with second electrodes received in the opening; a first patterned circuit structures formed on the insulating layer and electrically connected to the first electrodes on the passive components; a dielectric layer formed on the insulating layer, first patterned circuit structures and electronic element; and a second patterned circuit structures formed on the dielectric layer and electrically connected to the first patterned circuit structures and the second electrodes on the electronic element, so as to integrate electronic elements and passive components in the electronic element package to provide all kinds of electric designs needed.
摘要翻译：提出了一种集成无源元件的电子元件封装。电子元件封装包括载体板和设置在载体板上的多个无源部件，其中第一电极形成在无源部件上; 绝缘层，形成在设置有无源部件的承载板的表面上，以及至少一个开口，形成在所述绝缘层中，所述开口的一侧被所述承载板密封; 具有接收在开口中的第二电极的电子元件; 形成在所述绝缘层上并与所述无源部件上的所述第一电极电连接的第一图案化电路结构; 形成在绝缘层上的电介质层，第一图案化电路结构和电子元件; 以及形成在电介质层上并与电子元件上的第一图案化电路结构和第二电极电连接的第二图案化电路结构，以将电子元件和无源元件集成在电子元件封装中，以提供各种电气设计需要的

24. 发明申请

US20080023819A1 PACKAGE STRUCTURE HAVING SEMICONDUCTOR CHIP EMBEDDED THEREIN AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：具有嵌入式半导体芯片的封装结构及其制造方法
公开(公告)号：US20080023819A1
公开(公告)日：2008-01-31
申请号：US11782356
申请日：2007-07-24
申请人： Kan-Jung Chia , Shih-Ping Hsu
发明人： Kan-Jung Chia , Shih-Ping Hsu
IPC分类号： H01L23/48 , H01L21/52
CPC分类号： H01L23/5389 , H01L23/49816 , H01L24/19 , H01L24/24 , H01L2224/05001 , H01L2224/05008 , H01L2224/05023 , H01L2224/05548 , H01L2224/05569 , H01L2224/12105 , H01L2224/16 , H01L2224/24227 , H01L2924/00014 , H01L2924/01013 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15174 , H01L2924/15311 , H01L2924/18162 , H01L2224/05599 , H01L2224/05099
摘要： A package structure having a semiconductor chip embedded therein and a method of fabricating the same are disclosed. The package structure comprises: an aluminum oxide composite plate and a semiconductor chip. The aluminum oxide composite plate is formed by a stack consisting of an adhesive layer placed in between two aluminum oxide layers. The semiconductor chip having an active surface a plurality of electrode pads disposed thereon can be embedded and secured in the aluminum oxide composite plate. The present invention also comprises a method of fabricating the above-mentioned package structure. The present invention provides an excellent package structure, which can decrease the thickness of the package structure and make the package structure having characteristics of high rigidity and enduring tenacity at the same time.
摘要翻译：公开了一种嵌入其中的半导体芯片的封装结构及其制造方法。封装结构包括：氧化铝复合板和半导体芯片。氧化铝复合板由叠置在两个氧化铝层之间的粘合剂层构成的叠层形成。具有活性表面的多个电极焊盘的半导体芯片可嵌入并固定在氧化铝复合板中。本发明还包括制造上述封装结构的方法。本发明提供了一种优良的包装结构，其可以减小包装结构的厚度，并使包装结构同时具有高刚性和耐久性的特征。

25. 发明申请

US20070186413A1 Circuit board structure and method for fabricating the same 审中-公开
标题翻译：电路板结构及其制造方法
公开(公告)号：US20070186413A1
公开(公告)日：2007-08-16
申请号：US11543545
申请日：2006-10-04
申请人： Shih-Ping Hsu
发明人： Shih-Ping Hsu
IPC分类号： H05K1/16
CPC分类号： H05K3/4602 , H05K3/423 , H05K3/427 , H05K2201/0394 , H05K2201/09563 , H05K2201/096 , H05K2201/10378 , H05K2203/0733 , H05K2203/1152 , H05K2203/1581 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49165
摘要： A circuit board structure and method for fabricating the same are proposed. A core board with a plurality of openings formed therein is provided. Conductive columns are formed in the openings of the core board. Dielectric layers are formed on surfaces of the core board respectively and a plurality of openings are formed in the dielectric layers corresponding in position to the conductive columns in the core board. Circuit layers are formed on surfaces of the dielectric layers, and conductive structures electrically connected to the conductive columns are formed in the openings of the dielectric layers. Thereby, the circuit layers are electrically connected together through the conductive columns in the core board. Therefore, the present invention eliminates the need for electrically conductive pads and increases the layout space. The present invention can be applied in circuit boards with high layout density requirement.
摘要翻译：提出了一种电路板结构及其制造方法。提供了具有形成在其中的多个开口的芯板。导电柱形成在芯板的开口中。电介质层分别形成在芯板的表面上，并且在与芯板中的导电柱相对应的介质层中形成多个开口。在电介质层的表面上形成电路层，并且在电介质层的开口部形成与导电柱电连接的导电结构体。由此，电路层通过芯板中的导电柱电连接在一起。因此，本发明消除了对导电焊盘的需要并增加了布局空间。本发明可以应用于具有高布局密度要求的电路板。

26. 发明申请

US20070158847A1 CIRCUIT BOARD DEVICE WITH FINE CONDUCTIVE STRUCTURE 审中-公开
标题翻译：具有精细导电结构的电路板装置
公开(公告)号：US20070158847A1
公开(公告)日：2007-07-12
申请号：US11559565
申请日：2006-11-14
申请人： Shih-Ping Hsu
发明人： Shih-Ping Hsu
IPC分类号： H01L23/52
CPC分类号： H05K3/4038 , H01L21/486 , H01L23/49827 , H01L2924/0002 , H05K3/423 , H05K2203/0733 , H01L2924/00
摘要： A circuit board device with a fine conductive structure is proposed. A circuit board having at least a circuit layer is provided and the circuit layer has at least one electrically conductive pad. At least one first dielectric layer is formed on surfaces of the circuit board and the circuit layer and has at least one opening to expose the electrically conductive pad of the circuit layer. At least a first fine conductive structure made of conductive material with high ductility is formed in the opening of the first dielectric layer and is electrically connected to the electrically conductive pad of the circuit layer. The top surface of the first fine conductive structure is higher than, level with or lower than the surface of the first dielectric layer. Moreover, a conductive pad may be further formed on the top surface of the first fine conductive structure. Since the first fine conductive structure is made of conductive material with high ductility, the stress strength of the first fine conductive structure is reinforced and the electrically connecting quality between layers of the circuit board is improved.
摘要翻译：提出具有导电结构精细的电路板装置。提供至少具有电路层的电路板，并且电路层具有至少一个导电焊盘。至少一个第一电介质层形成在电路板和电路层的表面上，并且具有至少一个露出电路层的导电焊盘的开口。至少第一导电结构由导电材料制成，具有高延展性，在第一介电层的开口处形成并电连接到电路层的导电焊盘。第一微细导电结构的顶表面高于与第一电介质层的表面相同或更低的水平面。此外，可以在第一微细导电结构的顶表面上进一步形成导电焊盘。由于第一微细导电结构由具有高延展性的导电材料制成，所以第一微细导电结构的应力强度得到增强，并且电路板的层之间的电连接质量得到改善。

27. 发明授权

US07239525B2 Circuit board structure with embedded selectable passive components and method for fabricating the same 有权
标题翻译：具有嵌入式可选择无源元件的电路板结构及其制造方法
公开(公告)号：US07239525B2
公开(公告)日：2007-07-03
申请号：US11274014
申请日：2005-11-14
申请人： Shih-Ping Hsu
发明人： Shih-Ping Hsu
IPC分类号： H05K1/18
CPC分类号： H05K1/16 , H05K1/029 , H05K1/0293 , H05K1/185 , H05K3/4602 , H05K2203/173 , Y10T29/49155
摘要： A circuit board structure with embedded selectable passive components and a method for fabricating the same are proposed, wherein a plurality of passive components are embedded in a circuit board and a plurality of electrical connections are formed on a surface of the circuit board and electrically connected to the passive components. A circuit structure is formed close to the electrical connections for selectively forming a conductive layer thereon to electrically connect a portion of the passive components according to different electrical situations, in order to provide a set of passive components for electrical design of electronic devices.
摘要翻译：提出了一种具有嵌入式可选择无源元件的电路板结构及其制造方法，其中将多个无源部件嵌入电路板中，并且在电路板的表面上形成多个电连接并电连接到被动元件。电路结构靠近电连接形成，用于在其上选择性地形成导电层，以根据不同的电气情况将无源部件的一部分电连接，以提供用于电子设备的电气设计的一组无源部件。

28. 发明授权

US07129117B2 Method of embedding semiconductor chip in support plate and embedded structure thereof 有权
标题翻译：将半导体芯片嵌入支撑板及其嵌入结构的方法
公开(公告)号：US07129117B2
公开(公告)日：2006-10-31
申请号：US11008964
申请日：2004-12-13
申请人： Shih-Ping Hsu
发明人： Shih-Ping Hsu
IPC分类号： H01L21/48
CPC分类号： H01L21/56 , H01L23/3107 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/24 , H01L24/82 , H01L25/50 , H01L2224/24227 , H01L2224/82039 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/14
摘要： A method of embedding a semiconductor chip in a support plate and an embedded structure thereof are proposed. A first dielectric layer having a reinforced filling material is provided, and a semiconductor chip is mounted on the first dielectric layer. A support plate having an opening and a second dielectric layer having a reinforced filling material are provided. The first dielectric layer mounted with the semiconductor chip, the support plate, and the second dielectric layer are pressed together, such that the semiconductor chip is received in the opening of the support plate, and the dielectric layers fill in a gap between the semiconductor chip and the opening of the support plate. The reinforced filling material of the dielectric layers can maintain flatness and consistency of the semiconductor chip embedded in the support plate, and fine circuits can be fabricated on the support plate by build-up and electroplating processes.
摘要翻译：提出了一种将半导体芯片嵌入支撑板及其嵌入结构中的方法。提供具有增强填充材料的第一电介质层，并且半导体芯片安装在第一电介质层上。提供具有开口的支撑板和具有增强填充材料的第二介电层。将安装有半导体芯片，支撑板和第二电介质层的第一电介质层压在一起，使得半导体芯片被接收在支撑板的开口中，并且电介质层填充在半导体芯片和支撑板的开口。电介质层的增强填充材料可以保持嵌入在支撑板中的半导体芯片的平坦度和一致性，并且可以通过堆积和电镀工艺在支撑板上制造精细的电路。

29. 发明申请

US20060228829A1 Method for fabricating a flip chip package 有权
标题翻译：制造倒装芯片封装的方法
公开(公告)号：US20060228829A1
公开(公告)日：2006-10-12
申请号：US11162328
申请日：2005-09-07
申请人： Shih-Ping Hsu
发明人： Shih-Ping Hsu
IPC分类号： H01L21/48 , H01L21/50 , H01L21/44
CPC分类号： H01L24/16 , H01L23/49894 , H01L24/81 , H01L24/97 , H01L2224/13099 , H01L2224/131 , H01L2224/13111 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/136 , H01L2224/16225 , H01L2224/16235 , H01L2224/16237 , H01L2224/32225 , H01L2224/73104 , H01L2224/73204 , H01L2224/81136 , H01L2224/8114 , H01L2224/81193 , H01L2224/81801 , H01L2224/83192 , H01L2224/83193 , H01L2224/97 , H01L2924/00013 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15174 , H01L2924/15311 , H01L2924/30107 , H01L2224/81 , H01L2924/00014 , H01L2924/00
摘要： A flip chip packaging method is disclosed. First, a substrate is provided, in which the substrate comprises a plurality of integrated circuit (IC) package substrate units therein and the surface of each IC package substrate unit comprises a plurality of connecting pads. Next, an insulating layer with patterns is formed on the substrate and the connecting pads and a plurality of openings by partially exposing the upper surface of the connecting pads. Next, a conductive material is disposed within each opening. Next, a plurality of chips is provided, in which a plurality of conductive bumps is formed over the bottom surface of the chip. Lastly, the chips are mounted over the surface of the IC package substrate unit and the substrate is separated into a plurality of flip chip package structures, in which the surface of each flip chip package structure includes at least one chip.
摘要翻译：公开了一种倒装芯片封装方法。首先，提供基板，其中基板在其中包括多个集成电路（IC）封装基板单元，并且每个IC封装基板单元的表面包括多个连接焊盘。接下来，通过部分地暴露连接焊盘的上表面，在衬底和连接焊盘和多个开口上形成具有图案的绝缘层。接下来，在每个开口内设置导电材料。接下来，提供多个芯片，其中在芯片的底表面上形成多个导电凸块。最后，将芯片安装在IC封装基板单元的表面上，并且将基板分离成多个倒装芯片封装结构，其中每个倒装芯片封装结构的表面包括至少一个芯片。

30. 发明授权

US07112524B2 Substrate for pre-soldering material and fabrication method thereof 有权
标题翻译：预焊材料用基板及其制造方法
公开(公告)号：US07112524B2
公开(公告)日：2006-09-26
申请号：US10769451
申请日：2004-01-29
申请人： Shih-Ping Hsu , Chu-Chin Hu
发明人： Shih-Ping Hsu , Chu-Chin Hu
IPC分类号： H01L21/44
CPC分类号： H01L24/81 , H01L24/11 , H01L2224/0401 , H01L2224/05568 , H01L2224/11334 , H01L2224/11462 , H01L2224/1147 , H01L2224/11849 , H01L2224/13099 , H01L2224/13144 , H01L2224/13147 , H01L2224/16 , H01L2224/1607 , H01L2224/16225 , H01L2224/81191 , H01L2224/81192 , H01L2224/81193 , H01L2224/81801 , H01L2224/83102 , H01L2224/92125 , H01L2924/0002 , H01L2924/01006 , H01L2924/01012 , H01L2924/01015 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01052 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/15787 , H01L2924/351 , H05K3/3473 , H05K3/3484 , H05K2203/054 , H01L2924/00 , H01L2224/05552
摘要： A substrate for a pre-soldering material and a fabrication method of the substrate are proposed. The substrate having at least one surface formed with a plurality of conductive pads is provided. An insulating layer is formed over the surface of the substrate in such a way that a top surface of each of the conductive pads is exposed. Next, a conductive film and a resist layer are formed in sequence on the insulating layer and the conductive pads, wherein a plurality of openings are formed in the resist layer to expose a part of the conductive film above the conductive pad. Then, a pre-soldering material is deposited over the conductive pad by stencil printing or electroplating process.
摘要翻译：提出了一种用于预焊材料的衬底和该衬底的制造方法。提供具有形成有多个导电焊盘的至少一个表面的衬底。在衬底的表面上形成绝缘层，使得每个导电焊盘的顶表面露出。接下来，在绝缘层和导电焊盘上依次形成导电膜和抗蚀剂层，其中在抗蚀剂层中形成多个开口以暴露导电膜上方的导电膜的一部分。然后，通过模板印刷或电镀工艺将预焊材料沉积在导电焊盘上。

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