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    • 21. 发明申请
    • VERTICAL-CHANNEL JUNCTION FIELD-EFFECT TRANSISTORS HAVING BURIED GATES AND METHODS OF MAKING
    • 带通孔的垂直通道连接场效应晶体管及其制作方法
    • US20080124853A1
    • 2008-05-29
    • US11935442
    • 2007-11-06
    • Lin ChengMichael S. Mazzola
    • Lin ChengMichael S. Mazzola
    • H01L21/337
    • H01L29/8083H01L29/0619H01L29/1066H01L29/1608H01L29/66909
    • Semiconductor devices and methods of making the devices are described. The devices can be implemented in SiC and can include epitaxially grown n-type drift and p-type trenched gate regions, and an n-type epitaxially regrown channel region on top of the trenched p-gate regions. A source region can be epitaxially regrown on top of the channel region or selectively implanted into the channel region. Ohmic contacts to the source, gate and drain regions can then be formed. The devices can include edge termination structures such as guard rings, junction termination extensions (JTE), or other suitable p-n blocking structures. The devices can be fabricated with different threshold voltages, and can be implemented for both depletion and enhanced modes of operation for the same channel doping. The devices can be used as discrete power transistors and in digital, analog, and monolithic microwave integrated circuits.
    • 对半导体装置及其制造方法进行说明。 器件可以在SiC中实现,并且可以包括外延生长的n型漂移和p型沟槽栅极区域,以及在沟槽p型栅极区域顶部的n型外延再生长沟道区域。 源极区域可以在沟道区域的顶部外延再生长或选择性地植入沟道区域。 然后可以形成到源极,栅极和漏极区域的欧姆接触。 这些装置可以包括边缘终端结构,例如保护环,连接终止扩展(JTE)或其他合适的p-n阻塞结构。 这些器件可以用不同的阈值电压制造,并且可以针对相同沟道掺杂的耗尽和增强的工作模式来实现。 这些器件可用作分立功率晶体管和数字,模拟和单片微波集成电路。
    • 26. 发明申请
    • Junction barrier schottky rectifiers having epitaxially grown p+-n junctions and methods of making
    • 具有外延生长的p + -n结的结型势垒肖特基整流器和制造方法
    • US20070228505A1
    • 2007-10-04
    • US11396615
    • 2006-04-04
    • Michael MazzolaLin Cheng
    • Michael MazzolaLin Cheng
    • H01L31/07
    • H01L29/872H01L29/0615H01L29/0619H01L29/0623H01L29/0661H01L29/1608H01L29/8611
    • A junction barrier Schottky (JBS) rectifier device and a method of making the device are described. The device comprises an epitaxially grown first n-type drift layer and p-type regions forming p+-n junctions and self-planarizing epitaxially over-grown second n-type drift regions between and, optionally, on top of the p-type regions. The device may include an edge termination structure such as an exposed or buried P+ guard ring, a regrown or implanted junction termination extension (JTE) region, or a “deep” mesa etched down to the substrate. The Schottky contact to the second n-type drift region and the ohmic contact to the p-type region together serve as an anode. The cathode can be formed by ohmic contact to the n-type region on the backside of the wafer. The devices can be used in monolithic digital, analog, and microwave integrated circuits.
    • 描述了结屏障肖特基(JBS)整流器件及制造器件的方法。 该器件包括外延生长的第一n型漂移层和形成p + S + n结的p型区域和自平面化外延生长的第二n型漂移区之间,并且任选地在 顶级的p型地区。 该装置可以包括边缘终端结构,例如暴露或掩埋的P +保护环,再生长或植入的连接终止延伸(JTE)区域或向下蚀刻到衬底的“深”台面。 与第二n型漂移区的肖特基接触和与p型区的欧姆接触一起用作阳极。 阴极可以通过欧姆接触形成在晶片背面的n型区域上。 该器件可用于单片数字,模拟和微波集成电路。
    • 27. 发明申请
    • Vertical-channel junction field-effect transistors having buried gates and methods of making
    • 具有掩埋栅极的垂直沟道结场效应晶体管及其制造方法
    • US20070029573A1
    • 2007-02-08
    • US11198298
    • 2005-08-08
    • Lin ChengMichael Mazzola
    • Lin ChengMichael Mazzola
    • H01L29/423
    • H01L29/8083H01L29/0619H01L29/1066H01L29/1608H01L29/66909
    • Semiconductor devices and methods of making the devices are described. The devices can be implemented in SiC and can include epitaxially grown n-type drift and p-type trenched gate regions, and an n-type epitaxially regrown channel region on top of the trenched p-gate regions. A source region can be epitaxially regrown on top of the channel region or selectively implanted into the channel region. Ohmic contacts to the source, gate and drain regions can then be formed. The devices can include edge termination structures such as guard rings, junction termination extensions (JTE), or other suitable p-n blocking structures. The devices can be fabricated with different threshold voltages, and can be implemented for both depletion and enhanced modes of operation for the same channel doping. The devices can be used as discrete power transistors and in digital, analog, and monolithic microwave integrated circuits.
    • 对半导体装置及其制造方法进行说明。 器件可以在SiC中实现,并且可以包括外延生长的n型漂移和p型沟槽栅极区域,以及在沟槽p型栅极区域顶部的n型外延再生长沟道区域。 源极区域可以在沟道区域的顶部外延再生长或选择性地植入沟道区域。 然后可以形成到源极,栅极和漏极区域的欧姆接触。 这些装置可以包括边缘终端结构,例如保护环,连接终止扩展(JTE)或其他合适的p-n阻塞结构。 这些器件可以用不同的阈值电压制造,并且可以针对相同沟道掺杂的耗尽和增强的工作模式来实现。 这些器件可用作分立功率晶体管和数字,模拟和单片微波集成电路。