专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明申请

US20060001122A1 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060001122A1
公开(公告)日：2006-01-05
申请号：US11159134
申请日：2005-06-23
申请人： Hisao Ichijo , Hiroyoshi Ogura , Yoshinobu Sato , Teruhisa Ikuta
发明人： Hisao Ichijo , Hiroyoshi Ogura , Yoshinobu Sato , Teruhisa Ikuta
IPC分类号： H01L23/58
CPC分类号： H01L29/0847 , H01L29/1045 , H01L29/1083 , H01L29/66659 , H01L29/7835 , H01L29/78624
摘要： An object of the present invention is to provide a semiconductor device that is able to realize a low on-resistance maintaining a high drain-to-source breakdown voltage, and a method for manufacturing thereof, the present invention including: a supporting substrate 1; a semiconductor layer 3 having a P− type active region 3a that is formed on the supporting substrate 1, interposing a buried oxide film 2 between the semiconductor layer 3 and the supporting substrate 1; and a gate electrode 16a that is formed on the semiconductor layer 103, interposing a gate oxide film 17 and a part of a LOCOS film 5a between the gate electrode 16a and the semiconductor layer 103, wherein the P− type active region 3a has: an N+ type source region 11; a P type body region 12; a P+ type back gate contact region 14; an N type drain offset region 19; an N+ type drain contact region 20; and an N type drain buffer region 18 that is formed in a limited region between the N type drain offset region 19 and the P type body region 12, and the N type drain buffer region 18 is in contact with a source side end of the LOCOS film 5a and is shallower than the N type drain offset region 19.
摘要翻译：本发明的目的是提供一种能够实现低导通电阻，保持高的漏极 - 源极击穿电压的半导体器件及其制造方法，本发明包括：支撑衬底1; 具有形成在支撑基板1上的P型 - 有源区域3a的半导体层3，在半导体层3和支撑基板1之间插入掩埋氧化膜2; 以及形成在半导体层103上的栅电极16a，在栅电极16a和半导体层103之间插入栅氧化膜17和LOCOS膜5a的一部分，其中P < / SUP>型有源区域3a具有：N + +型源极区域11; P型体区域12; P +型背栅接触区域14; N型漏极偏移区域19; N +型漏极接触区域20; 以及N型漏极缓冲区域18，其形成在N型漏极偏移区域19和P型体区域12之间的有限区域中，并且N型漏极缓冲区域18与LOCOS的源极侧端部接触膜5a并且比N型漏极偏移区域19浅。

IPRDB

热门服务

关于我们

友情链接

联系方式