会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 23. 发明授权
    • Method and apparatus for continuous cross-channel interleaving
    • 用于连续跨信道交织的方法和装置
    • US07251281B2
    • 2007-07-31
    • US10621398
    • 2003-07-18
    • Paul D. MarkoCraig P. WadinJoseph M. Titlebaum
    • Paul D. MarkoCraig P. WadinJoseph M. Titlebaum
    • H04L27/28
    • H04L1/0057H04L1/0041H04L1/0059H04L1/0065H04L1/0071H04L1/08
    • A method of interleaving data for transmission is provided wherein first and second interleaving patterns for arranging data symbols in a source data stream into first and second transmitted data streams are selected. Each of said data symbols has at least one bit. The first and second transmitted data streams are transmitted substantially simultaneously on separate transmission channels to at least one receiver. The first and second patterns are used to transmit the data symbols in the source data stream in a different order on the respective transmission channels to maximize recovery of the source data stream when the transmission channels are blocked. The selected interleaving patterns can involve reordering the data symbols throughout the first and second transmitted data streams using different reordering criteria. The reordering criteria can vary on a frame-by-frame basis if the source data stream is time division multiplexed. Complementary data can be sent on respective transmission channels.
    • 提供一种交织用于传输的数据的方法,其中选择用于将源数据流中的数据符号排列成第一和第二传输数据流的第一和第二交织模式。 所述数据符号中的每一个具有至少一个位。 第一和第二传输的数据流在单独的传输信道上基本上同时发送到至少一个接收机。 第一和第二模式用于在各个传输信道上以不同的顺序发送源数据流中的数据符号,以在传输信道被阻塞时最大化源数据流的恢复。 所选择的交织模式可以包括使用不同的重新排序标准来重新排序整个第一和第二传输数据流中的数据符号。 如果源数据流是时分复用的,则重新排序标准可以逐帧地改变。 互补数据可以在相应的传输信道上发送。
    • 26. 发明授权
    • Cordless telephone communication system link re-establishment protocol
    • 无线电话通信系统链路重建协议
    • US5280541A
    • 1994-01-18
    • US782022
    • 1991-10-24
    • Paul D. MarkoStelios J. PatsiokasCraig P. Wadin
    • Paul D. MarkoStelios J. PatsiokasCraig P. Wadin
    • H04L29/06H04M1/725H04M11/00
    • H04L29/06H04M1/72505
    • A method for re-establishing a communication link that has been lost between a portable unit (406) and a fixed unit or base station (402) provides for a way of quickly re-establishing the lost communication link, on the previously used RF channel. The method is begun by transmitting a link re-establishment code word (900) using MUX 1 after determining that synchronization has been lost (502) for a predetermined period of time (504). This is followed by automatically switching the portable unit (406) from MUX 1 to MUX 3 communication protocol. Followed by re-establishing communication (re-establish synchronization) between the portable (406) and base station (402) in MUX 3 and switching the two communication devices (402 and 406) back to MUX 1 after the communication link has been re-established. The same steps can be followed by base site (402) if it had been the first to detect loss of the communication link.
    • 在便携式单元(406)和固定单元或基站(402)之间已经丢失的用于重新建立通信链路的方法提供了在先前使用的RF信道上快速重新建立丢失的通信链路的方式 。 通过在确定同步已经丢失(502)一段预定时间段(504)之后,使用MUX1发送链路重建码字(900),开始该方法。 随后将便携式单元(406)从MUX 1自动切换到MUX 3通信协议。 随后在多路复用器3中重新建立便携式(406)和基站(402)之间的通信(重新建立同步),并且在通信链路被重新连接之后将两个通信设备(402和406)切换回多路复用器1 成立 如果基站是第一个检测到通信链路的丢失,基站(402)可以遵循相同的步骤。
    • 30. 发明授权
    • Multi-mode digital phase lock loop
    • 多模数字锁相环
    • US5436937A
    • 1995-07-25
    • US11926
    • 1993-02-01
    • David L. BrownPaul D. Marko
    • David L. BrownPaul D. Marko
    • H03L7/08H03L7/099H04L7/033H03D3/24
    • H03L7/0992H03L7/08H04L7/0331
    • A multi-mode PLL circuit (100) includes an early/late bit transition accumulator (108) for accumulating the number of incoming bit transitions which are early or late. This allows for PLL (100) to provide adjustments based on a predetermined number of accumulated early/late accumulations or based on an average of early/late transitions over a predetermined period of time. PLL (100) further includes a frequency offset circuit (200) which includes a frequency error accumulator which is used to maintain a frequency offset history and to control the loop frequency. This allows for very narrow band operation of the first order digital PLL while maintaining stable operation.
    • 多模式PLL电路(100)包括用于累加早期或晚期的输入位转换次数的早/晚位转换累加器(108)。 这允许PLL(100)基于预定数量的累加的早/晚累积或者基于在预定时间段内的早/晚转换的平均值来提供调整。 PLL(100)还包括频率偏移电路(200),其包括用于维持频率偏移历史并控制环路频率的频率误差累加器。 这允许一阶数字PLL的非常窄的频带操作,同时保持稳定的操作。