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21. 外观设计

USD617782S1 Wireless modem 有权
公开(公告)号：USD617782S1
公开(公告)日：2010-06-15
申请号：US29333536
申请日：2009-03-11
申请人： Jin-Young Kim
设计人： Jin-Young Kim

22. 发明授权

US07687203B2 Positive active material for rechargeable lithium battery, method of preparing the same, and rechargeable lithium battery including the same 有权
标题翻译：用于可再充电锂电池的正极活性材料，其制备方法和包括其的可再充电锂电池
公开(公告)号：US07687203B2
公开(公告)日：2010-03-30
申请号：US11835887
申请日：2007-08-08
申请人： Jaephil Cho , Youn-Han Chang , Jin-Young Kim , Yoo-Jung Kim , Hyun-Jung Kim , Hae-Suk Hwang
发明人： Jaephil Cho , Youn-Han Chang , Jin-Young Kim , Yoo-Jung Kim , Hyun-Jung Kim , Hae-Suk Hwang
IPC分类号： H01M4/58
CPC分类号： H01M4/483 , H01M4/362 , H01M4/525 , H01M4/581 , H01M2004/028
摘要： The positive active material according to one embodiment of the present invention includes a composite metal oxide of the following Formula 1, and a compound being capable of intercalating and deintercalating lithium having the composite metal oxide coated on the surface thereof. M1-xAlO2 [Chemical Formula 1] Wherein, in the above Formula 1, M is selected from the group consisting of an alkali metal, an alkaline-earth metal, and combinations thereof, and 0.03≦x≦0.95. The composite metal oxide increases impregnation of an electrolyte, improves lithium mobility, and decreases internal resistance of a rechargeable lithium battery, and thereby improves discharge capacity and cycle-life characteristics.
摘要翻译：根据本发明的一个实施方案的正极活性物质包括下式1的复合金属氧化物和能够在其表面上涂覆复合金属氧化物的锂的嵌入和脱嵌化合物。 M1-xAlO2 [化学式1]其中，在上述式1中，M选自碱金属，碱土金属及其组合，0.03和n1E; x和nlE; 0.95。复合金属氧化物增加电解质的浸渍，提高锂的迁移率，降低可再充电锂电池的内阻，从而提高放电容量和循环寿命特性。

23. 发明申请

US20080153001A1 POSITIVE ACTIVE MATERIAL FOR RECHARGEABLE LITHIUM BATTERY, METHOD OF PREPARING THE SAME, AND RECHARGEABLE LITHIUM BATTERY INCLUDING THE SAME 有权
标题翻译：用于可充电锂电池的正极活性材料，其制备方法和包括其的可充电锂电池
公开(公告)号：US20080153001A1
公开(公告)日：2008-06-26
申请号：US11835887
申请日：2007-08-08
申请人： Jaephil CHO , Youn-Han Chang , Jin-Young Kim , Yoo-Jung Kim , Hyun-Jung Kim , Hae-Suk Hwang
发明人： Jaephil CHO , Youn-Han Chang , Jin-Young Kim , Yoo-Jung Kim , Hyun-Jung Kim , Hae-Suk Hwang
IPC分类号： H01M10/00 , H01M10/04
CPC分类号： H01M4/483 , H01M4/362 , H01M4/525 , H01M4/581 , H01M2004/028
摘要： The positive active material according to one embodiment of the present invention includes a composite metal oxide of the following Formula 1, and a compound being capable of intercalating and deintercalating lithium having the composite metal oxide coated on the surface thereof. M1-xAlO2 [Chemical Formula 1] Wherein, in the above Formula 1, M is selected from the group consisting of an alkali metal, an alkaline-earth metal, and combinations thereof, and 0.03≦x≦0.95. The composite metal oxide increases impregnation of an electrolyte, improves lithium mobility, and decreases internal resistance of a rechargeable lithium battery, and thereby improves discharge capacity and cycle-life characteristics.
摘要翻译：根据本发明的一个实施方案的正极活性物质包括下式1的复合金属氧化物和能够在其表面上涂覆复合金属氧化物的锂的嵌入和脱嵌化合物。 <？in-line-formula description =“In-line Formulas”end =“lead”？> M 1-x A 2 O 2化学式1 < -line-formula description =“In-line Formulas”end =“tail”？>其中，在上述式1中，M选自碱金属，碱土金属及其组合，以及 0.03 <= x <= 0.95。复合金属氧化物增加电解质的浸渍，提高锂的迁移率，降低可再充电锂电池的内阻，从而提高放电容量和循环寿命特性。

24. 发明授权

US07277138B2 Array substrate for LCD device having double-layered metal structure and manufacturing method thereof 有权
标题翻译：具有双层金属结构的液晶显示装置用阵列基板及其制造方法
公开(公告)号：US07277138B2
公开(公告)日：2007-10-02
申请号：US10878516
申请日：2004-06-29
申请人： Won-Ho Cho , Gyoo-Chul Jo , Gue-Tai Lee , Jin-Gyu Kang , Beung-Hwa Jeong , Jin-Young Kim
发明人： Won-Ho Cho , Gyoo-Chul Jo , Gue-Tai Lee , Jin-Gyu Kang , Beung-Hwa Jeong , Jin-Young Kim
IPC分类号： G02F1/136 , H01L69/04
CPC分类号： G02F1/13439 , G02F1/1368 , H01L27/12 , H01L27/124 , H01L27/1248 , H01L29/458 , H01L29/4908
摘要： An array substrate for a liquid crystal display device includes a gate electrode, a gate line and a gate pad electrode disposed on a substrate, each of the gate electrode, the gate line and the gate pad electrode having a first metal barrier layer, a first copper alloy layer, and a first out-diffusion film, and the first out-diffusion film completely covering, surrounding and contacting entire surfaces of the first copper alloy layer. The array substrate includes a gate insulation layer disposed on the substrate and covering the gate electrode, the gate line and the gate pad electrode. An active layer and an ohmic contact layer are sequentially formed on the gate insulation layer and over the gate electrode. A data line is formed on the gate insulation layer and perpendicularly crosses the gate line. A source electrode and a drain electrode contact the ohmic contact layer.
摘要翻译：用于液晶显示装置的阵列基板包括栅电极，栅极线和设置在基板上的栅极焊盘电极，栅极电极，栅极线和栅极焊盘电极中的每一个具有第一金属阻挡层，第一铜合金层和第一外扩散膜，第一外扩散膜完全覆盖，包围并接触第一铜合金层的整个表面。阵列基板包括设置在基板上并覆盖栅极，栅极线和栅极焊盘电极的栅极绝缘层。有源层和欧姆接触层依次形成在栅极绝缘层上和栅电极上。数据线形成在栅极绝缘层上并垂直于栅极线。源电极和漏极接触欧姆接触层。

25. 发明申请

US20070195626A1 Semiconductor memory device including memory cell without capacitor 失效
标题翻译：半导体存储器件包括不带电容器的存储单元
公开(公告)号：US20070195626A1
公开(公告)日：2007-08-23
申请号：US11509991
申请日：2006-08-25
申请人： Jin-Young Kim , Yeong-Taek Lee
发明人： Jin-Young Kim , Yeong-Taek Lee
IPC分类号： G11C7/02
CPC分类号： G11C7/14 , G11C7/18 , G11C11/404 , G11C11/4097 , G11C11/4099 , G11C2211/4016
摘要： A semiconductor memory device including a memory cell without a capacitor includes: a memory cell array block including first memory cells connected between a first bit line and first word lines and second memory cells connected between a second bit line and second word lines; and a reference memory cell array block including first reference memory cells connected between a first reference bit line connected to the first bit line and a first reference word line and second reference memory cells connected between a second reference bit line connected to the second bit line and a second reference word line. When the first word lines are selected, the second reference memory cells are selected, and when the second word lines are selected, the first reference memory cells are selected. Thus, each bit line includes a reference memory cell and outputs reference signal from the reference memory cell so that data can be precisely sensed during a read operation.
摘要翻译：包括没有电容器的存储单元的半导体存储器件包括：存储单元阵列块，包括连接在第一位线和第一字线之间的第一存储器单元和连接在第二位线和第二字线之间的第二存储器单元; 以及参考存储单元阵列块，其包括连接在与第一位线连接的第一参考位线和第一参考字线之间的第一参考存储单元，以及连接在与第二位线连接的第二参考位线之间的第二参考存储单元;以及第二个参考字线。当选择第一字线时，选择第二参考存储单元，并且当选择第二字线时，选择第一参考存储单元。因此，每个位线包括参考存储单元并输出来自参考存储单元的参考信号，从而可以在读取操作期间精确地感测数据。

26. 发明授权

US08503218B2 Nonvolatile memory device using resistance material and memory system including the nonvolatile memory device 有权
标题翻译：使用包括非易失性存储器件的电阻材料和存储器系统的非易失性存储器件
公开(公告)号：US08503218B2
公开(公告)日：2013-08-06
申请号：US13155492
申请日：2011-06-08
申请人： Jin-Young Kim , Ki-Whan Song
发明人： Jin-Young Kim , Ki-Whan Song
IPC分类号： G11C11/00 , G11C5/06 , G11C11/06 , G11C7/10
CPC分类号： G11C5/063 , G11C7/18 , G11C13/0004 , G11C13/0007 , G11C13/0023 , G11C13/0026 , G11C13/0028 , G11C13/0038
摘要： A nonvolatile memory device includes: a memory array including a plurality of memory banks which are arranged in a first direction; a write global bit line and a read global bit line extending in the first direction to be shared by the memory banks; a write circuit connected to the write global bit line and disposed on a first side of the memory array; and a read circuit connected to the read global bit line and disposed on a second side of the memory array opposite the first side of the memory array, wherein each of the memory banks extends in a second direction different from the first direction and comprises a plurality of nonvolatile memory cells, each of the nonvolatile memory cells having a variable resistive element whose resistance value varies according to data stored therein.
摘要翻译：非易失性存储器件包括：存储器阵列，包括沿第一方向布置的多个存储体; 写入全局位线和在第一方向上延伸以由存储体共享的读取全局位线; 写入电路，连接到写入全局位线并且设置在存储器阵列的第一侧上; 以及读取电路，连接到读取的全局位线并且设置在与存储器阵列的第一侧相对的存储器阵列的第二侧上，其中每个存储体沿与第一方向不同的第二方向延伸并且包括多个的非易失性存储单元，每个非易失性存储单元具有可变电阻元件，其电阻值根据存储在其中的数据而变化。

27. 发明授权

US08472081B2 Color screen sets 有权
标题翻译：彩色屏幕集
公开(公告)号：US08472081B2
公开(公告)日：2013-06-25
申请号：US13011311
申请日：2011-01-21
申请人： Omri Shacham , Jan Allebach , Mani Fischer , Doron Shaked , Carl Staelin , Jin-Young Kim , Yung-Yao Chen
发明人： Omri Shacham , Jan Allebach , Mani Fischer , Doron Shaked , Carl Staelin , Jin-Young Kim , Yung-Yao Chen
IPC分类号： H04N1/405 , H04N1/60 , H04N1/46
CPC分类号： H04N1/4058 , H04N1/52
摘要： A method for designing a screen set for color halftoning includes selecting a screen set that includes at least two screens. The screens are applied to a uniform color image so as to form a set of corresponding colorant halftones. The colorant halftones are superposed to form a color halftone. A spatial frequency spectrum of the color halftone is calculated. Maxima of the spatial frequency spectrum that occur at two effective frequencies are identified, the two effective frequencies being located in two adjacent quadrants of a complex spatial frequency space. A magnitude of each effective frequency is compared with a predetermined frequency magnitude. The screen set is accepted for future application for color halftoning only if both effective frequency magnitudes are greater than the predetermined frequency magnitude. Relating computer program product and data processing system are also disclosed.
摘要翻译：一种用于设计用于彩色半色调的屏幕组的方法包括选择包括至少两个屏幕的屏幕组。将屏幕应用于均匀的彩色图像，以便形成一组相应的着色剂半色调。将着色剂半色调叠加以形成彩色半色调。计算颜色半色调的空间频谱。识别在两个有效频率处发生的空间频谱的最大值，两个有效频率位于复数空间频率空间的两个相邻象限中。将每个有效频率的大小与预定频率幅度进行比较。仅当有效频率大于预定频率幅度时，屏幕组才被接受用于彩色半色调的将来应用。还公开了关于计算机程序产品和数据处理系统。

28. 发明申请

US20130087392A1 MULTI-LEGGED WALKING APPARATUS 有权
标题翻译：多功能跑步机
公开(公告)号：US20130087392A1
公开(公告)日：2013-04-11
申请号：US13703786
申请日：2011-11-16
申请人： Sang-Won Lee , Kwan-Young Joung , Jin-Young Kim , O-Hung Kwon
发明人： Sang-Won Lee , Kwan-Young Joung , Jin-Young Kim , O-Hung Kwon
IPC分类号： B62D57/032
CPC分类号： B62D57/032
摘要： A multi-legged walking apparatus enables a multi-legged walking robot to walk in natural motion, and includes a body portion comprising a body, a front leg portion comprising a front fixing portion fixed to the body, and a front rotating portion rotatably connected to the front fixing portion, a rear leg portion connected to the body and a rear leg portion comprising a rear rotating portion rotatably connected to the rear fixing portion, and a first link rotatably connected, at both ends, to the front and rear rotating portions, respectively, wherein the body portion additionally includes a driving portion which rotates one of the front and rear rotating portions. Accordingly, by employing the first link and the driving portion, the body of the multi-legged walking robot is moved to and fro and left and right naturally in accordance with the movement of the legs during walking operation, in a similar walking pattern as that generally shown in actual multi-legged walking animals.
摘要翻译：多脚步行装置能够使多脚走路机器人自然走动，并且包括主体部分，其包括主体，前腿部分，其包括固定到主体的前固定部分，以及前旋转部分，其可旋转地连接到前固定部分，连接到主体的后腿部分和后腿部分，后腿部分包括可旋转地连接到后固定部分的后旋转部分，以及第一连杆，在两端处可旋转地连接到前后旋转部分，其中所述主体部分还包括使所述前后旋转部分中的一个旋转的驱动部。因此，通过使用第一连杆和驱动部分，多脚踏步行机器人的身体在步行操作期间根据腿部的移动而自然地前后移动，左右自由，以类似的行走模式一般显示在实际的多腿步行动物。

29. 发明授权

US08120979B2 Semiconductor memory devices having hierarchical bit-line structures 有权
标题翻译：具有分层位线结构的半导体存储器件
公开(公告)号：US08120979B2
公开(公告)日：2012-02-21
申请号：US12591254
申请日：2009-11-13
申请人： Jin-Young Kim , Ki-Whan Song
发明人： Jin-Young Kim , Ki-Whan Song
IPC分类号： G11C7/00
CPC分类号： G11C11/4091 , G11C11/4097 , G11C2207/002
摘要： The semiconductor memory device includes a memory cell array and a switching circuit. The memory cell array includes a plurality of first memory cells connected between word lines and first local bit lines, and a plurality of second memory cells connected between the word lines and second local bit lines. The switching circuit is configured to respectively connect the first local bit lines to first global bit lines during a first sensing period, and to respectively connect the second local bit lines to second global bit lines during a second sensing period of a reading operation. The semiconductor memory device further includes a sensing circuit configured to sense and amplify data from the first global bit lines during the first sensing period, and to sense and amplify data from the second global bit lines during the second sensing period of the reading operation.
摘要翻译：半导体存储器件包括存储单元阵列和开关电路。存储单元阵列包括连接在字线和第一局部位线之间的多个第一存储单元，以及连接在字线和第二局部位线之间的多个第二存储单元。开关电路被配置为在第一感测周期期间将第一本地位线分别连接到第一全局位线，并且在读取操作的第二感测周期期间将第二局部位线分别连接到第二全局位线。半导体存储器件还包括感测电路，其被配置为在第一感测周期期间感测和放大来自第一全局位线的数据，并且在读取操作的第二感测周期期间感测和放大来自第二全局位线的数据。

30. 发明申请

US20110212557A1 METHOD OF MANUFACTURING AN ARRAY SUBSTRATE FOR LCD DEVICE HAVING DOUBLE-LAYERED METAL STRUCTURE 有权
标题翻译：具有双层金属结构的液晶显示装置制造阵列基板的方法
公开(公告)号：US20110212557A1
公开(公告)日：2011-09-01
申请号：US13100883
申请日：2011-05-04
申请人： Won-Ho CHO , Gyoo-Chul Jo , Gue-Tai Lee , Jin-Gyu Kang , Beung-Hwa Jeong , Jin-Young Kim
发明人： Won-Ho CHO , Gyoo-Chul Jo , Gue-Tai Lee , Jin-Gyu Kang , Beung-Hwa Jeong , Jin-Young Kim
IPC分类号： H01L33/62
CPC分类号： G02F1/136286 , G02F2001/13629 , G02F2001/136295
摘要： The present invention is an array substrate for use in a liquid crystal display device, which includes a gate electrode, a gate line and a gate pad on a substrate, wherein the gate electrode, the gate line and the gate pad have a double-layered structure consisting of a first metal layer and a first barrier metal layer in series from the substrate, and wherein the first metal is one of aluminum and aluminum alloy; a gate insulation layer on the substrate covering the gate electrode, gate line and gate pad; an active layer and an ohmic contact layer sequentially formed on the gate insulation layer and over the gate electrode; a data line on the gate insulation layer perpendicularly crossing the gate line, source and drain electrodes contacting the ohmic contact layer, and a data pad on the gate insulation layer, wherein the data line, the source and drain electrode and the data pad have a double-layered structure consisting of a second barrier metal layer and a second metal layer of copper; a passivation layer formed on the gate insulation layer to cover the data line, source and drain electrodes, and data pad, wherein the passivation layer has a drain contact hole exposing a portion of the drain electrode, a gate pad contact hole exposing a portion of the gate pad, and a data pad contact hole exposing a portion of the data pad; and a pixel electrode, a gate pad terminal and a data pad terminal on the passivation layer, all of which are formed of a transparent conductive material on the passivation layer.
摘要翻译：本发明是一种用于液晶显示装置的阵列基板，其包括在基板上的栅电极，栅极线和栅极焊盘，其中栅电极，栅极线和栅极焊盘具有双层结构由第一金属层和与基板串联的第一阻挡金属层组成，其中第一金属是铝和铝合金之一; 覆盖栅电极，栅极线和栅极焊盘的基板上的栅极绝缘层; 依次形成在栅极绝缘层上和栅电极上的有源层和欧姆接触层; 垂直于栅极线的栅极绝缘层上的数据线，与欧姆接触层接触的源极和漏极以及栅极绝缘层上的数据焊盘，其中数据线，源极和漏极以及数据焊盘具有由第二阻挡金属层和铜的第二金属层组成的双层结构; 形成在所述栅极绝缘层上以覆盖所述数据线，源极和漏极以及数据焊盘的钝化层，其中所述钝化层具有暴露所述漏电极的一部分的漏极接触孔，栅极焊盘和暴露数据焊盘的一部分的数据焊盘接触孔; 以及钝化层上的像素电极，栅极焊盘端子和数据焊盘端子，所有这些都由钝化层上的透明导电材料形成。

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