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21. 发明申请

US20090168931A1 METHOD AND APPARATUS FOR JITTER COMPENSATION IN RECEIVER CIRCUITS USING NONLINEAR DYNAMIC PHASE SHIFTING TECHNIQUE BASED ON BIT HISTORY PATTERN 有权
标题翻译：使用基于BIT历史图案的非线性动态相位移动技术的接收器电路中抖动补偿的方法和装置
公开(公告)号：US20090168931A1
公开(公告)日：2009-07-02
申请号：US11966269
申请日：2007-12-28
申请人： Moises Cases , Daniel N. de Araujo , Bhyrav M. Mutnury , Terence Rodrigues
发明人： Moises Cases , Daniel N. de Araujo , Bhyrav M. Mutnury , Terence Rodrigues
IPC分类号： H03K5/01 , H04B1/10 , H04L7/00 , H04L1/00
CPC分类号： H04L7/0338 , H04L1/205 , H04L7/0083
摘要： The present invention provides a simple, easy to implement method and apparatus to reduce jitter in a channel and expand the eye width and eye height of the eye pattern of the signal. The method and apparatus of the present invention reduces jitter specific to a channel in a high speed interface. The present invention utilizes a phasing shifting mechanism based on history of the incoming bits at the receiver. The input bits from the channel are shifted in time before getting to the receiver. This approach significantly reduces Intersymbol Interference (ISI) and deterministic jitter, thus opening up the eye width and eye height for a given interface.
摘要翻译：本发明提供了一种简化，易于实现的方法和装置，用于减少信道中的抖动并扩大信号眼图的眼睛宽度和眼睛高度。本发明的方法和装置减少了在高速接口中专用于信道的抖动。本发明基于接收机的输入位的历史来利用相位移位机构。来自通道的输入位在到达接收机之前被及时移位。这种方法显着地减少了符号间干扰（ISI）和确定性抖动，从而打开给定接口的眼睛宽度和眼睛高度。

22. 发明申请

US20080308293A1 Cable For High Speed Data Communications 有权
标题翻译：电缆用于高速数据通信
公开(公告)号：US20080308293A1
公开(公告)日：2008-12-18
申请号：US11762485
申请日：2007-06-13
申请人： Bruce R. Archambeault , Moises Cases , Samuel R. Connor , Daniel N. de Araujo , Bhyrav M. Mutnury
发明人： Bruce R. Archambeault , Moises Cases , Samuel R. Connor , Daniel N. de Araujo , Bhyrav M. Mutnury
IPC分类号： H01B11/18 , H01B13/20 , H01B9/02
CPC分类号： H01P3/06 , H01P1/2005 , Y10T29/49123
摘要： A cable for high speed data communications and methods for manufacturing such cable are disclosed, the cable including a first inner conductor enclosed by a first dielectric layer and a second inner conductor enclosed by a second dielectric layer. The cable also includes conductive shield material wrapped in a rotational direction at a rate along and about the longitudinal axis around the inner conductors and the dielectric layers, including overlapped wraps of the conductive shield material along and about the longitudinal axis, the conductive shield material having a variable width. Transmitting signals on the cable including transmitting a balanced signal characterized by a frequency in the range of 7-9 gigahertz on the cable.
摘要翻译：公开了一种用于高速数据通信的电缆和用于制造这种电缆的方法，该电缆包括由第一电介质层包围的第一内部导体和由第二电介质层包围的第二内部导体。电缆还包括导电屏蔽材料，该导电屏蔽材料沿着围绕内部导体和介电层的纵向轴线并围绕纵向轴线的速率包裹在旋转方向上，包括导电屏蔽材料沿着纵向轴线并围绕纵向轴线重叠，导电屏蔽材料具有一个可变的宽度。在电缆上传输信号，包括传输特征为电缆7-9千兆赫兹频率的平衡信号。

23. 发明申请

US20080261451A1 PRE-DISTORTION BASED IMPEDENCE DISCONTINUITY REMEDIATION FOR VIA STUBS AND CONNECTORS IN PRINTED CIRCUIT BOARD DESIGN 有权
标题翻译：在印刷电路板设计中通过STUBS和连接器进行基于预失真的动态不连续性修复
公开(公告)号：US20080261451A1
公开(公告)日：2008-10-23
申请号：US11737196
申请日：2007-04-19
申请人： Justin P. Bandholz , Moises Cases , Robert J. Christopher , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham
发明人： Justin P. Bandholz , Moises Cases , Robert J. Christopher , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham
IPC分类号： H01R13/648
CPC分类号： H05K1/0237 , H04L25/028 , H04L25/0288 , H04L25/03343 , H05K1/14 , H05K1/181 , H05K2201/044 , H05K2201/1006
摘要： Embodiments of the present invention address deficiencies of the art in respect to via structure utilization in a PCB design and provide a novel and non-obvious method, system and computer program product for impedance discontinuity remediation for via stubs and connectors in a PCB. In one embodiment a method for impedance discontinuity remediation in a PCB can be provided. The method can include configuring a pre-distortion filter to negate an impedance discontinuity in an electrical signal caused by a transmission line with one of a via stub or a connector. The method further can include pre-distortion filtering an electrical signal before transmitting the electrical signal over the transmission line. Finally, the method can include transmitting the pre-distortion filtered electrical signal over the transmission line.
摘要翻译：本发明的实施例解决了PCB设计中的通孔结构利用方面的技术缺陷，并且提供了一种用于PCB中经由短线和连接器的阻抗不连续修复的新颖且非显而易见的方法，系统和计算机程序产品。在一个实施例中，可以提供PCB中阻抗不连续修复的方法。该方法可以包括配置预失真滤波器以消除由具有通孔短路或连接器之一的传输线引起的电信号中的阻抗不连续性。该方法还可以包括在通过传输线路传输电信号之前对电信号进行预失真滤波。最后，该方法可以包括通过传输线传输预失真滤波的电信号。

24. 发明授权

US08289101B2 Pre-distortion based impedence discontinuity remediation for via stubs and connectors in printed circuit board design 有权
标题翻译：针对印刷电路板设计中通孔短路和连接器的基于预失真的阻抗不连续性修复
公开(公告)号：US08289101B2
公开(公告)日：2012-10-16
申请号：US11737196
申请日：2007-04-19
申请人： Justin P. Bandholz , Moises Cases , Robert J. Christopher , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham
发明人： Justin P. Bandholz , Moises Cases , Robert J. Christopher , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham
IPC分类号： H03H7/38
CPC分类号： H05K1/0237 , H04L25/028 , H04L25/0288 , H04L25/03343 , H05K1/14 , H05K1/181 , H05K2201/044 , H05K2201/1006
摘要： Embodiments of the present invention address deficiencies of the art in respect to via structure utilization in a PCB design and provide a novel and non-obvious method, system and computer program product for impedance discontinuity remediation for via stubs and connectors in a PCB. In one embodiment a method for impedance discontinuity remediation in a PCB can be provided. The method can include configuring a pre-distortion filter to negate an impedance discontinuity in an electrical signal caused by a transmission line with one of a via stub or a connector. The method further can include pre-distortion filtering an electrical signal before transmitting the electrical signal over the transmission line. Finally, the method can include transmitting the pre-distortion filtered electrical signal over the transmission line.
摘要翻译：本发明的实施例解决了PCB设计中的通孔结构利用方面的技术缺陷，并且提供了一种用于PCB中经由短线和连接器的阻抗不连续修复的新颖且非显而易见的方法，系统和计算机程序产品。在一个实施例中，可以提供PCB中阻抗不连续修复的方法。该方法可以包括配置预失真滤波器以消除由具有通孔短路或连接器之一的传输线引起的电信号中的阻抗不连续性。该方法还可以包括在通过传输线路传输电信号之前对电信号进行预失真滤波。最后，该方法可以包括通过传输线传输预失真滤波的电信号。

25. 发明授权

US07649142B2 Cable for high speed data communications 有权
标题翻译：电缆用于高速数据通信
公开(公告)号：US07649142B2
公开(公告)日：2010-01-19
申请号：US12405596
申请日：2009-03-17
申请人： Bruce R. Archambeault , Moises Cases , Samuel R. Connor , Daniel N. de Araujo , Bhyrav M. Mutnury
发明人： Bruce R. Archambeault , Moises Cases , Samuel R. Connor , Daniel N. de Araujo , Bhyrav M. Mutnury
IPC分类号： H01B7/18
CPC分类号： H01P3/06 , H01P1/2005 , Y10T29/49123
摘要： A cable for high speed data communications and methods for manufacturing such cable are disclosed, the cable including a first inner conductor enclosed by a first dielectric layer and a second inner conductor enclosed by a second dielectric layer. The cable also includes conductive shield material wrapped in a rotational direction at a rate along and about the longitudinal axis around the inner conductors and the dielectric layers, including overlapped wraps of the conductive shield material along and about the longitudinal axis, the conductive shield material having a variable width. Transmitting signals on the cable including transmitting a balanced signal characterized by a frequency in the range of 7-9 gigahertz on the cable.
摘要翻译：公开了一种用于高速数据通信的电缆和用于制造这种电缆的方法，该电缆包括由第一电介质层包围的第一内部导体和由第二电介质层包围的第二内部导体。电缆还包括导电屏蔽材料，该导电屏蔽材料沿着围绕内部导体和介电层的纵向轴线并围绕纵向轴线的速率包裹在旋转方向上，包括导电屏蔽材料沿着纵向轴线并围绕纵向轴线重叠，导电屏蔽材料具有一个可变的宽度。在电缆上传输信号，包括传输特征为电缆7-9千兆赫兹频率的平衡信号。

26. 发明授权

US07525045B2 Cable for high speed data communications 有权
标题翻译：电缆用于高速数据通信
公开(公告)号：US07525045B2
公开(公告)日：2009-04-28
申请号：US11762485
申请日：2007-06-13
申请人： Bruce R. Archambeault , Moises Cases , Samuel R. Connor , Daniel N. de Araujo , Bhyrav M. Mutnury
发明人： Bruce R. Archambeault , Moises Cases , Samuel R. Connor , Daniel N. de Araujo , Bhyrav M. Mutnury
IPC分类号： H01B7/18
CPC分类号： H01P3/06 , H01P1/2005 , Y10T29/49123
摘要： A cable for high speed data communications and methods for manufacturing such cable are disclosed, the cable including a first inner conductor enclosed by a first dielectric layer and a second inner conductor enclosed by a second dielectric layer. The cable also includes conductive shield material wrapped in a rotational direction at a rate along and about the longitudinal axis around the inner conductors and the dielectric layers, including overlapped wraps of the conductive shield material along and about the longitudinal axis, the conductive shield material having a variable width. Transmitting signals on the cable including transmitting a balanced signal characterized by a frequency in the range of 7-9 gigahertz on the cable.
摘要翻译：公开了一种用于高速数据通信的电缆和用于制造这种电缆的方法，该电缆包括由第一电介质层包围的第一内部导体和由第二电介质层包围的第二内部导体。电缆还包括导电屏蔽材料，该导电屏蔽材料沿着围绕内部导体和介电层的纵向轴线并围绕纵向轴线的速率包裹在旋转方向上，包括导电屏蔽材料沿着纵向轴线并围绕纵向轴线重叠，导电屏蔽材料具有一个可变的宽度。在电缆上传输信号，包括传输特征为电缆7-9千兆赫兹频率的平衡信号。

27. 发明申请

US20090049339A1 Programmable Diagnostic Memory Module 失效
标题翻译：可编程诊断内存模块
公开(公告)号：US20090049339A1
公开(公告)日：2009-02-19
申请号：US11840481
申请日：2007-08-17
申请人： Moises Cases , Daniel Mark Dreps , Bhyrav M. Mutnury , Nam H. Pham , Daniel N. De Araujo
发明人： Moises Cases , Daniel Mark Dreps , Bhyrav M. Mutnury , Nam H. Pham , Daniel N. De Araujo
IPC分类号： G06F11/00
CPC分类号： G06F11/2733 , G11C5/04 , G11C29/02 , G11C29/022 , G11C29/16 , G11C29/56 , G11C2029/5602
摘要： A programmable diagnostic memory module provides enhanced testability of memory controller and memory subsystem design. The programmable diagnostic memory module includes an interface for communicating with an external diagnostic system, and the interface is used to transfer commands to the memory module to alter various behaviors of the memory module. The altered behaviors may be changing data streams that are written to the memory module to simulate errors, altering the timing and/or loading of the memory module signals, downloading programs for execution by a processor core within the memory module, changing driver strengths of output signals of the memory module, and manipulating in an analog domain, signals at terminals of the memory module such as injecting noise on power supply connections to the memory module. The memory module may emulate multiple selectable memory module types, and may include a complete storage array to provide standard memory module operation.
摘要翻译：可编程诊断内存模块提供了内存控制器和内存子系统设计的增强的可测试性。可编程诊断存储器模块包括用于与外部诊断系统通信的接口，并且该接口用于将命令传送到存储器模块以改变存储器模块的各种行为。改变的行为可能是改变被写入存储器模块的数据流，以模拟错误，改变存储器模块信号的定时和/或加载，下载由存储器模块内的处理器核心执行的程序，改变驱动器的输出强度存储器模块的信号和在模拟域中的操作，在存储器模块的端子处发出信号，例如在与存储器模块的电源连接上注入噪声。存储器模块可以模拟多个可选择的存储器模块类型，并且可以包括完整的存储阵列以提供标准存储器模块操作。

28. 发明申请

US20070178289A1 High-speed routing composite material 审中-公开
标题翻译：高速路由复合材料
公开(公告)号：US20070178289A1
公开(公告)日：2007-08-02
申请号：US11340907
申请日：2006-01-27
申请人： Moises Cases , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Pravin Patel , Nam H. Pham , Joffre A. Ratcliffe
发明人： Moises Cases , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Pravin Patel , Nam H. Pham , Joffre A. Ratcliffe
IPC分类号： B32B3/00
CPC分类号： B32B17/04 , H05K1/0248 , H05K1/025 , H05K1/0366 , H05K2201/029 , H05K2201/09227 , Y10T428/24917
摘要： An electronic system includes a circuit board formed from a composite material. The composite material includes fibers embedded within a substrate and the fibers are oriented substantially orthogonal to one another. A plurality of traces are formed on the board, and the plurality of traces are oriented relative to at least one of the fibers at an angle between about 17.5° and about 27.5° or between about 20.0° and about 25.0°. A pair of the traces are oriented substantially orthogonal to one another, and a pair of the traces are oriented relative to one another at an angle of about 45.0°. The fibers are fiberglass, and the substrate is an epoxy resin. The fibers have a different dielectric constant than the substrate.
摘要翻译：电子系统包括由复合材料形成的电路板。复合材料包括嵌入基片内的纤维，纤维彼此基本正交。在板上形成多个迹线，并且多个迹线相对于至少一个光纤以约17.5°至约27.5°之间的角度或约20.0°至约25.0°的角度定向。一对迹线基本上彼此正交地定向，并且一对迹线以大约45.0°的角度相对于彼此定向。纤维是玻璃纤维，基材是环氧树脂。纤维的介电常数不同于基材。

29. 发明申请

US20120327622A1 PRE-DISTORTION BASED IMPEDENCE DISCONTINUITY REMEDIATION FOR VIA STUBS AND CONNECTORS IN PRINTED CIRCUIT BOARD DESIGN 有权
标题翻译：在印刷电路板设计中通过STUBS和连接器进行基于预失真的动态不连续性修复
公开(公告)号：US20120327622A1
公开(公告)日：2012-12-27
申请号：US13603386
申请日：2012-09-04
申请人： Justin P. Bandholz , Moises Cases , Robert J. Christopher , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham
发明人： Justin P. Bandholz , Moises Cases , Robert J. Christopher , Daniel N. de Araujo , Bradley D. Herrman , Erdem Matoglu , Bhyrav M. Mutnury , Pravin S. Patel , Nam H. Pham
IPC分类号： H05K1/18 , H05K1/11
CPC分类号： H05K1/0237 , H04L25/028 , H04L25/0288 , H04L25/03343 , H05K1/14 , H05K1/181 , H05K2201/044 , H05K2201/1006
摘要： Embodiments of the present invention address deficiencies of the art in respect to via structure utilization in a PCB design and provide a novel and non-obvious method, system and computer program product for impedance discontinuity remediation for via stubs and connectors in a PCB. In one embodiment a method for impedance discontinuity remediation in a PCB can be provided. The method can include configuring a pre-distortion filter to negate an impedance discontinuity in an electrical signal caused by a transmission line with one of a via stub or a connector. The method further can include pre-distortion filtering an electrical signal before transmitting the electrical signal over the transmission line. Finally, the method can include transmitting the pre-distortion filtered electrical signal over the transmission line.
摘要翻译：本发明的实施例解决了PCB设计中的通孔结构利用方面的技术缺陷，并且提供了一种用于PCB中经由短线和连接器的阻抗不连续修复的新颖且非显而易见的方法，系统和计算机程序产品。在一个实施例中，可以提供PCB中阻抗不连续修复的方法。该方法可以包括配置预失真滤波器以消除由具有通孔短路或连接器之一的传输线引起的电信号中的阻抗不连续性。该方法还可以包括在通过传输线路传输电信号之前对电信号进行预失真滤波。最后，该方法可以包括通过传输线传输预失真滤波的电信号。

30. 发明授权

US07944963B2 Method and apparatus for jitter compensation in receiver circuits using nonlinear dynamic phase shifting technique based on bit history pattern 有权
标题翻译：使用基于位历史模式的非线性动态相移技术在接收机电路中进行抖动补偿的方法和装置
公开(公告)号：US07944963B2
公开(公告)日：2011-05-17
申请号：US11966269
申请日：2007-12-28
申请人： Moises Cases , Daniel N. de Araujo , Bhyrav M. Mutnury , Terence Rodrigues
发明人： Moises Cases , Daniel N. de Araujo , Bhyrav M. Mutnury , Terence Rodrigues
IPC分类号： H04B17/00
CPC分类号： H04L7/0338 , H04L1/205 , H04L7/0083
摘要： The present invention provides a simple, easy to implement method and apparatus to reduce jitter in a channel and expand the eye width and eye height of the eye pattern of the signal. The method and apparatus of the present invention reduces jitter specific to a channel in a high speed interface. The present invention utilizes a phasing shifting mechanism based on history of the incoming bits at the receiver. The input bits from the channel are shifted in time before getting to the receiver. This approach significantly reduces Intersymbol Interference (ISI) and deterministic jitter, thus opening up the eye width and eye height for a given interface.
摘要翻译：本发明提供了一种简化，易于实现的方法和装置，用于减少信道中的抖动并扩大信号眼图的眼睛宽度和眼睛高度。本发明的方法和装置减少了在高速接口中专用于信道的抖动。本发明基于接收机的输入位的历史来利用相位移位机构。来自通道的输入位在到达接收机之前被及时移位。这种方法显着地减少了符号间干扰（ISI）和确定性抖动，从而打开给定接口的眼睛宽度和眼睛高度。

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