会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 24. 发明授权
    • Unified passcode pairing of piconet devices
    • 微微网设备的统一密码配对
    • US07155163B2
    • 2006-12-26
    • US09756106
    • 2001-01-09
    • Joseph M. CannonJonathan H. FischerJohn P. Veschi
    • Joseph M. CannonJonathan H. FischerJohn P. Veschi
    • H04B7/00
    • H04L29/12047H04L29/12009H04L29/12783H04L61/15H04L61/35H04W8/26H04W84/18H04W88/02
    • The present invention relates to an application layer function outside the BLUETOOTH protocol which associates a BLUETOOTH unique address, i.e., the 48-bit unique BD_ADDR address, with a short passcode or PIN which is associated with a particular type of BLUETOOTH device in a particular piconet. The passcode or PIN can be pre-determined by the manufacturer of the BLUETOOTH device, or can be input and defined by the user. Upon installation in a piconet, in one embodiment shown and described with reference to FIGS. 1 and 2, a user can be asked to manually input a particular passcode or PIN into a relevant piconet device, and an inquiry can be broadcast to all communicating piconet devices and only those other piconet devices having a matching passcode or PIN associated therewith can automatically forward their respective 48-bit unique BD_ADDR addresses to the inquiring piconet device. Alternatively, a user can inquire and be provided with a list of available passcodes or PINs already established by other devices in the piconet, and select a particular passcode or PIN associated with one or more other piconet devices. The passcode or personal identification number (PIN) may be input upon electronic device setup (e.g., a four character code). The passcode or PIN may be numeric, text, or alphanumeric.
    • 本发明涉及BLUETOOTH协议之外的应用层功能,其将BLUETOOTH唯一地址即48位唯一BD_ADDR地址与与特定微微网中特定类型的蓝牙设备相关联的短密码或PIN相关联 。 密码或密码可以由BLUETOOTH设备的制造商预先确定,也可以由用户输入和定义。 在安装在微微网中时,在参考图1和图2所示和描述的一个实施例中。 1和2 ,可以要求用户将特定的密码或PIN手动输入到相关的微微网设备中,并且可以向所有通信微微网设备广播查询,并且只能查询具有匹配密码或PIN的那些其他微微网设备 相关联的其可以自动地将其各自的48位唯一的BD_ADDR地址转发到询问的微微网设备。 或者,用户可以查询并提供已经由微微网中的其他设备建立的可用密码或PIN列表,并且选择与一个或多个其他微微网设备相关联的特定密码或PIN。 可以在电子设备设置(例如,四个字符代码)上输入密码或个人识别号码(PIN)。 密码或PIN可以是数字,文本或字母数字。
    • 25. 发明授权
    • Optical source driver with improved input stage
    • 光源驱动器,具有改进的输入级
    • US06778569B2
    • 2004-08-17
    • US10002028
    • 2001-11-15
    • Jonathan H. Fischer
    • Jonathan H. Fischer
    • H01S300
    • H01S5/042H01S5/0427
    • A driver circuit for a laser diode or other optical source includes an input stage, an output stage, and a current generator circuit. The current generator circuit is adapted to establish a modulation current for application to one of a first output and a second output of the output stage in accordance with a differential input data signal applied to the input stage. The input stage includes first and second differential pairs. The first differential pair has the differential input data signal applied thereto, is implemented using MOS devices, and has substantially unity gain. The second differential pair receives as its inputs corresponding outputs of the first differential pair, is implemented using bipolar devices, and has a gain greater than unity. The first and second differential pairs are thus configured such that application of the differential input data signal at a substantially rail-to-rail voltage swing to the first differential pair will not exceed a junction reverse bias constraint of the second differential pair.
    • 用于激光二极管或其他光源的驱动电路包括输入级,输出级和电流发生器电路。 电流发生器电路适于根据施加到输入级的差分输入数据信号建立调制电流,以应用于输出级的第一输出和第二输出之一。 输入级包括第一和第二差分对。 第一差分对具有施加到其上的差分输入数据信号,使用MOS器件实现,并且具有基本上的单位增益。 第二差分对作为其输入接收对应于第一差分对的输出,使用双极器件实现,并且具有大于1的增益。 因此,第一和第二差分对被配置为使得以基本上轨至轨的电压摆幅施加到第一差分对的差分输入数据信号不会超过第二差分对的结反向偏置约束。
    • 26. 发明授权
    • Delay compensation technique for buffers
    • 缓冲器延时补偿技术
    • US5300837A
    • 1994-04-05
    • US946990
    • 1992-09-17
    • Jonathan H. Fischer
    • Jonathan H. Fischer
    • H03K5/13H03K17/04H03K17/14H03K17/687H03K19/003H03K19/0175H03K3/01G06G7/10
    • H03K19/00323
    • An integrated circuit has a signal path including a first circuit that introduces a propagation delay that decreases with circuit conditions and process speed in series with a second circuit that introduces a propagation delay that increases with circuit conditions and process speed. The circuit conditions and process speed are sensed and the duration of the propagation delay of the second circuit varied such that the total propagation delay remains within a predetermined range over circuit condition and process speed variations. In another embodiment of the invention, a current source develops a bias current to control the duration of the propagation delay of the second circuit. In yet another embodiment of the invention the current source is a current mirror.
    • 集成电路具有包括第一电路的信号路径,该第一电路引入随着电路条件和处理速度降低的传播延迟,该传播延迟与引入随电路条件和处理速度而增加的传播延迟的第二电路串联。 感测电路条件和处理速度,并且第二电路的传播延迟的持续时间变化,使得总传播延迟保持在超过电路条件和处理速度变化的预定范围内。 在本发明的另一个实施例中,电流源产生偏置电流以控制第二电路的传播延迟的持续时间。 在本发明的另一个实施例中,电流源是电流镜。
    • 27. 发明授权
    • Digital input detector and associated adaptive power supply
    • 数字输入检测器和相关的自适应电源
    • US08953267B2
    • 2015-02-10
    • US13286718
    • 2011-11-01
    • Jonathan H. Fischer
    • Jonathan H. Fischer
    • G11B5/09
    • G11B5/09
    • Interface circuitry of a storage device or other type of processing device comprises a digital input detector and an adaptive power supply. The digital input detector comprises an input transistor. The adaptive power supply provides a variable supply voltage to the digital input detector that varies with a threshold voltage of the input transistor. In one embodiment, the variable supply voltage provided to the digital input detector by the adaptive power supply varies with the threshold voltage of the input transistor about a set point value determined as a function of an expected logic level of an input signal. For example, the set point value may be determined as a function of a minimum expected logic high input signal level. In such an arrangement, the input transistor is biased at or close to the threshold voltage for an input signal having the minimum expected logic high input signal level.
    • 存储设备或其他类型的处理设备的接口电路包括数字输入检测器和自适应电源。 数字输入检测器包括输入晶体管。 自适应电源为数字输入检测器提供可变电源电压,该输入检测器随输入晶体管的阈值电压而变化。 在一个实施例中,由自适应电源提供给数字输入检测器的可变电源电压随着输入晶体管的阈值电压而变化,该阈值电压基于作为输入信号的预期逻辑电平的函数确定的设定点值。 例如,可以将设定点值确定为最小预期逻辑高输入信号电平的函数。 在这种布置中,对于具有最小预期逻辑高输入信号电平的输入信号,输入晶体管被偏压或接近阈值电压。
    • 28. 发明申请
    • DIGITAL INPUT DETECTOR AND ASSOCIATED ADAPTIVE POWER SUPPLY
    • 数字输入检测器及相关自适应电源
    • US20130107392A1
    • 2013-05-02
    • US13286718
    • 2011-11-01
    • Jonathan H. Fischer
    • Jonathan H. Fischer
    • G05F3/08G11B5/09
    • G11B5/09
    • Interface circuitry of a storage device or other type of processing device comprises a digital input detector and an adaptive power supply. The digital input detector comprises an input transistor. The adaptive power supply provides a variable supply voltage to the digital input detector that varies with a threshold voltage of the input transistor. In one embodiment, the variable supply voltage provided to the digital input detector by the adaptive power supply varies with the threshold voltage of the input transistor about a set point value determined as a function of an expected logic level of an input signal. For example, the set point value may be determined as a function of a minimum expected logic high input signal level. In such an arrangement, the input transistor is biased at or close to the threshold voltage for an input signal having the minimum expected logic high input signal level.
    • 存储设备或其他类型的处理设备的接口电路包括数字输入检测器和自适应电源。 数字输入检测器包括输入晶体管。 自适应电源为数字输入检测器提供可变电源电压,该输入检测器随输入晶体管的阈值电压而变化。 在一个实施例中,由自适应电源提供给数字输入检测器的可变电源电压随着输入晶体管的阈值电压而变化,该阈值电压基于作为输入信号的预期逻辑电平的函数确定的设定点值。 例如,可以将设定点值确定为最小预期逻辑高输入信号电平的函数。 在这种布置中,对于具有最小预期逻辑高输入信号电平的输入信号,输入晶体管被偏压或接近阈值电压。
    • 29. 发明授权
    • Clamp circuit using PMOS and NMOS devices
    • 使用PMOS和NMOS器件的钳位电路
    • US08305130B2
    • 2012-11-06
    • US12838435
    • 2010-07-17
    • Jonathan H. Fischer
    • Jonathan H. Fischer
    • H03K5/08
    • H03K5/08
    • A MOS-type semiconductor clamping circuit is disclosed. The clamping circuit comprises a pmos device coupled to a nmos device in series to form the clamping circuit to selectively clamp a signal to a reference voltage, the signal configured to swing between a first voltage and a second voltage about the reference voltage. When the signal is swung between the first voltage and the second voltage, the pmos device and the nmos device are subjected to a voltage swing less than the voltage swing between the first voltage and the second voltage.
    • 公开了一种MOS型半导体钳位电路。 钳位电路包括一个pmos器件,其串联连接到nmos器件以形成钳位电路,以选择性地将信号钳位到参考电压,该信号被配置为在参考电压周围的第一电压和第二电压之间摆动。 当信号在第一电压和第二电压之间摆动时,pmos器件和nmos器件经受小于第一电压和第二电压之间的电压摆幅的电压摆幅。
    • 30. 发明授权
    • Optical midpoint power control and extinction ratio control of a semiconductor laser
    • 半导体激光器的光中点功率控制和消光比控制
    • US07443896B2
    • 2008-10-28
    • US10616334
    • 2003-07-09
    • Jonathan H. FischerJames P. Howley
    • Jonathan H. FischerJames P. Howley
    • H01S3/00
    • H01S5/0683H01S5/042H01S5/06812
    • The present invention provides a method and apparatus, such as an integrated circuit, to control the optical midpoint power level and the extinction ratio of a semiconductor laser and maintain the optical midpoint power level and the extinction ratio substantially constant at corresponding predetermined levels. Apparatus embodiments include a semiconductor laser, a modulator, a photodetector, an optical midpoint controller, and an extinction ratio controller. The semiconductor laser is capable of transmitting an optical signal in response to a modulation current. The modulator is capable of providing the modulation current to the semiconductor laser, with the modulation current corresponding to an input data signal. The photodetector, which is optically coupled to the semiconductor laser, is capable of converting the optical signal into a photodetector current. In response to the photodetector current, the optical midpoint controller is capable of adjusting the forward bias current of the semiconductor laser, and the extinction ratio controller is capable of adjusting the modulation current provided by the modulator to the semiconductor laser, to respectively generate the optical signal having substantially a predetermined optical midpoint power level and a predetermined extinction ratio.
    • 本发明提供了一种诸如集成电路的方法和装置,用于控制半导体激光器的光中点功率电平和消光比,并将光中点功率电平和消光比保持在相应的预定电平上。 装置实施例包括半导体激光器,调制器,光电检测器,光中点控制器和消光比控制器。 半导体激光器能够响应于调制电流而发送光信号。 调制器能够向半导体激光器提供调制电流,调制电流对应于输入数据信号。 光学耦合到半导体激光器的光电检测器能够将光信号转换成光电检测器电流。 响应于光电检测器电流,光中点控制器能够调节半导体激光器的正向偏置电流,并且消光比控制器能够调制由调制器提供给半导体激光器的调制电流,以分别产生光学 信号具有基本上预定的光中点功率电平和预定的消光比。