会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 23. 发明申请
    • DETERMINISTICALLY SKEWING SYNCHRONIZED EVENTS FOR CONTENT STREAMS
    • 确定内容流的同步消除事件
    • US20100218227A1
    • 2010-08-26
    • US12393904
    • 2009-02-26
    • Craig FrinkMichael G. HluchyjSantosh KrishnanChristopher LawlerDaniel PondRobert RyanQin-Fan Zhu
    • Craig FrinkMichael G. HluchyjSantosh KrishnanChristopher LawlerDaniel PondRobert RyanQin-Fan Zhu
    • H04N7/173
    • H04N7/17327H04N21/23106H04N21/23406H04N21/2385
    • Described are computer-based methods and apparatuses, including computer program products, for deterministically skewing synchronized events for content streams. A first content stream comprising at least one content processing location is buffered in a first buffer, wherein the first buffer is associated with a first processing delay parameter. A second content stream is buffered in a second buffer, the second content stream comprising at least one content processing location, the second buffer being associated with a second processing delay parameter that is different from the first processing delay parameter. The first content stream is processed at the at least one content processing location of the first content stream at a first content processing time based on the first processing delay parameter. The second content stream is processed at the at least one content processing location of the second content stream at a second content processing time based on the second processing delay parameter.
    • 描述了基于计算机的方法和设备,包括计算机程序产品,用于确定性地扭曲用于内容流的同步事件。 包括至少一个内容处理位置的第一内容流被缓冲在第一缓冲器中,其中第一缓冲器与第一处理延迟参数相关联。 第二内容流被缓冲在第二缓冲器中,所述第二内容流包括至少一个内容处理位置,所述第二缓冲器与不同于所述第一处理延迟参数的第二处理延迟参数相关联。 基于第一处理延迟参数,在第一内容处理时间,在第一内容流的至少一个内容处理位置处理第一内容流。 基于第二处理延迟参数,第二内容流在第二内容处理时间的第二内容流的至少一个内容处理位置被处理。
    • 26. 发明授权
    • Packet switch trunk circuit queueing arrangement
    • 分组交换机中继电路排队排队
    • US4644533A
    • 1987-02-17
    • US730995
    • 1985-05-06
    • Martin BraffMichael G. Hluchyj
    • Martin BraffMichael G. Hluchyj
    • H04L29/02G06F13/00H04L12/56H04J3/24
    • H04L12/56
    • A trunk circuit interfaces a multichannel data signal to a communication facility using a high priority queue (HPQ) memory, a low priority queue (LPQ) memory, and a data packet sorter including a separate LPQ counter for each data channel. Each LPQ channel counter keeps track of data packets from the associated channel which are stored in the LPQ memory. The packet sorter sorts data packets according to size. Small data packets from each channel which are smaller than a predetermined length are sorted for storage in the HPQ memory only when the associated LPQ channel counter is zero. Small data packets having a non-zero LPQ channel count and large data packets are stored in the LPQ memory. The trunk circuit first transmits data packets from the HPQ memory and then from the LPQ memory.
    • 中继电路使用高优先级队列(HPQ)存储器,低优先级队列(LPQ)存储器和包括用于每个数据通道的单独的LPQ计数器的数据分组排序器将多信道数据信号接口到通信设施。 每个LPQ通道计数器跟踪存储在LPQ存储器中的相关通道的数据包。 数据包排序器根据大小排序数据包。 仅当相关联的LPQ信道计数器为零时,来自每个信道的小于预定长度的小数据分组被分类用于存储在HPQ存储器中。 具有非零LPQ信道计数和大数据分组的小数据分组存储在LPQ存储器中。 中继电路首先从HPQ存储器然后从LPQ存储器发送数据分组。
    • 28. 发明授权
    • Apparatus and method for a telephony gateway
    • 电话网关的装置和方法
    • US07417977B2
    • 2008-08-26
    • US10004563
    • 2001-12-05
    • Michael G. Hluchyj
    • Michael G. Hluchyj
    • H04L12/56H04L12/66
    • H04L49/606H04L12/6402H04L12/66H04Q3/0029H04Q11/0478
    • A system for connecting a circuit network with a packet network. The system includes a packet switch fabric, a circuit network server, and a packet network server. The circuit network server has a first and second port. The first port of the circuit network server sends and receives circuit-based signals with the circuit network. The second port of the circuit network server sends and receives packet-based signals having packets with the packet switch fabric. The circuit network server also includes a plurality of digital signal processors. A digital signal processor performs packet adaptation and subsequent to the packet adaption a second at least one digital signal processor performs signal processing. The packet network server has a first port for sending and receiving packet-based signals with the packet switch fabric and a second port for sending and receiving packet-based signals with the packet network. The packet switch fabric is capable of transferring packet-based signals among the packet network server and the circuit network server, and among the circuit network server and a second circuit network server.
    • 一种用于将电路网络与分组网络连接的系统。 该系统包括分组交换结构,电路网络服务器和分组网络服务器。 电路网络服务器具有第一和第二端口。 电路网络服务器的第一个端口与电路网络发送和接收基于电路的信号。 电路网络服务器的第二个端口发送和接收具有分组交换结构的分组的基于分组的信号。 电路网络服务器还包括多个数字信号处理器。 数字信号处理器执行包适配并且在包适配之后,第二至少一个数字信号处理器执行信号处理。 分组网络服务器具有用于使用分组交换结构发送和接收基于分组的信号的第一端口和用于使用分组网络发送和接收基于分组的信号的第二端口。 分组交换结构能够在分组网络服务器和电路网络服务器之间以及电路网络服务器和第二电路网络服务器之间传送基于分组的信号。
    • 29. 发明授权
    • Method and apparatus for high-capacity circuit switching with an ATM
second stage switch
    • 用于ATM第二级交换机的大容量电路交换方法和装置
    • US6151325A
    • 2000-11-21
    • US828883
    • 1997-03-31
    • Michael G. Hluchyj
    • Michael G. Hluchyj
    • H04L12/64
    • H04L12/6402
    • A high-capacity multistage switching system includes a second stage ATM switch that interconnects multiple lower-capacity switch modules. The switching system dynamically establishes a connection between the switch ports of two switch modules, using as part of the connection a permanent virtual connection, i.e., a pre-established connection path, through the ATM switch. Each switch module includes one or more switch ports, an ATM interface card and a time-division-multiplexed "TDM" bus that transfers user data between the switch ports and the ATM interface card. A system controller dynamically establishes connections between two given switch ports establishing one or more virtual trunks to transfer the user data between the TDM buses of the switch modules and cell payloads of ATM cells that are directed over the appropriate pre-established connection path through the ATM switch. The system controller then assigns to the connections transmit and receive timeslots on the TDM bus and octets in virtual trunk structures that are associated with the virtual trunks. The ATM card retrieves user data from the transmit timeslots and places the data in the octets of the virtural trunk structures, and then assembles the structures in ATM cells that are directed along the selected connection path. An ATM card that receives an ATM cell disassembles the cell into the constituent virtual trunk structures and retrieves user data from the octets of the structures and places the data on the TDM bus in the receive timeslots.
    • 大容量多级交换系统包括互连多个低容量交换机模块的第二级ATM交换机。 交换系统在两个交换机模块的交换机端口之间动态建立连接,通过ATM交换机使用永久虚拟连接即预先建立的连接路径作为连接的一部分。 每个交换机模块包括一个或多个交换机端口,ATM接口卡和在交换机端口和ATM接口卡之间传送用户数据的时分复用“TDM”总线。 系统控制器动态建立两个给定交换机端口之间的连接,建立一个或多个虚拟中继线,以在交换机模块的TDM总线与ATM信元的小区有效载荷之间传送用户数据,ATM信元通过ATM通过适当的预先建立的连接路径 开关。 然后,系统控制器分配到TDM总线上的连接发送和接收时隙以及与虚拟干线相关联的虚拟中继结构中的八位字节。 ATM卡从发送时隙中检索用户数据,并将数据放置在合成树干结构的八位字节中,然后组合沿着所选连接路径定向的ATM信元中的结构。 接收ATM信元的ATM卡将小区拆分为组成虚拟中继线结构,并从结构的八位字节中检索用户数据,并将数据放置在TDM总线上的接收时隙中。