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21. 发明申请

US20140233441A1 Diplexer and Transceiver thereof 有权
标题翻译：双工器及其收发器
公开(公告)号：US20140233441A1
公开(公告)日：2014-08-21
申请号：US14139806
申请日：2013-12-23
申请人： MEDIATEK INC.
发明人： Chih-Hung Lee , Ming-Da Tsai , Jui-Lin Hsu
IPC分类号： H04L5/06
CPC分类号： H03H7/463 , H03H7/09 , H04B1/005
摘要： A diplexer, for coupling a first radio frequency (RF) signal corresponding to a first carrier frequency and a second RF signal corresponding to a second carrier frequency is disclosed. The diplexer includes a first port arranged to couple the first RF signal; a second port arranged to couple the second RF signal; a third port capable of connecting an antenna; a first impedance unit coupled to the first port and the third port; and a second impedance unit coupled to the second port and the third port; wherein the first port, the second port and the third port are coupled to a direct current (DC) ground; wherein the first impedance unit is arranged to provide an first open-circuit impedance against the second RF signal, and the second impedance unit is arranged to provide a second open-circuit impedance against the first RF signal.
摘要翻译：公开了一种用于耦合对应于第一载波频率的第一射频（RF）信号和对应于第二载波频率的第二RF信号的双工器。双工器包括被布置成耦合第一RF信号的第一端口; 布置成耦合第二RF信号的第二端口; 能够连接天线的第三端口; 耦合到所述第一端口和所述第三端口的第一阻抗单元; 以及耦合到所述第二端口和所述第三端口的第二阻抗单元; 其中所述第一端口，所述第二端口和所述第三端口耦合到直流（DC）接地; 其中所述第一阻抗单元布置成针对所述第二RF信号提供第一开路阻抗，并且所述第二阻抗单元布置成针对所述第一RF信号提供第二开路阻抗。

22. 发明授权

US10056869B2 Power amplifier system and associated control circuit and control method 有权
公开(公告)号：US10056869B2
公开(公告)日：2018-08-21
申请号：US15348956
申请日：2016-11-10
申请人： MEDIATEK INC.
发明人： Chien-Wei Tseng , Ming-Da Tsai
IPC分类号： H03F3/04 , H03F3/21 , H03F1/32 , H03F1/02 , H03F1/14 , H03F3/193
CPC分类号： H03F3/21 , H03F1/0266 , H03F1/14 , H03F1/3205 , H03F1/3276 , H03F3/193 , H03F2200/213 , H03F2200/222 , H03F2200/228 , H03F2200/435 , H03F2200/451 , H03F2200/465 , H03F2200/471 , H03F2200/546 , H03F2200/555 , H03F2200/75 , H03F2200/78 , H03F2201/3215
摘要： A control circuit of a power amplifier includes a peak detector, a first comparator, a first current source, a second comparator, a second current source and a bias circuit. The peak detector is arranged for detecting an amplitude of an input signal. The first comparator is arranged for comparing the amplitude of the input signal with a first threshold to generate a first comparing result. The first current source is arranged for generating a first current according to the first comparing result The second comparator is arranged for comparing the amplitude of the input signal with a second threshold to generate a second comparing result. The second current source is arranged for generating a second current according to the second comparing result. The bias circuit is arranged for generating a bias voltage according to the first current and the second current to the power amplifier.

23. 发明申请

US20180069742A1 COMPENSATION CIRCUIT OF POWER AMPLIFIER AND ASSOCIATED COMPENSATION METHOD 有权
公开(公告)号：US20180069742A1
公开(公告)日：2018-03-08
申请号：US15647275
申请日：2017-07-12
申请人： MEDIATEK INC.
发明人： Chien-Cheng Lin , Ming-Da Tsai
IPC分类号： H04L27/36 , H03D7/16 , H03F1/32 , H03C3/08
CPC分类号： H04L27/366 , H03C3/08 , H03D7/166 , H03F1/14 , H03F1/3205 , H03F1/3211 , H03F1/3264 , H03F3/21 , H03F3/45179 , H03F3/45183 , H03F2200/21 , H03F2200/213 , H03F2200/228 , H03F2200/249 , H03F2200/471 , H03F2200/489 , H03F2200/492 , H03F2200/534 , H03F2200/75 , H03F2201/3218 , H03F2203/45036 , H03F2203/45101 , H03F2203/45112 , H03F2203/45134 , H03F2203/45136 , H03F2203/45138 , H03F2203/45146 , H03F2203/45151 , H03F2203/45156 , H03F2203/45168 , H03F2203/45172 , H03F2203/45208 , H03F2203/45256 , H03F2203/45292 , H03F2203/45312 , H03F2203/45356 , H03F2203/45374 , H03F2203/45386 , H03F2203/45402 , H03F2203/45436 , H03F2203/45544 , H03F2203/45596 , H03F2203/45622 , H04B2001/0408
摘要： A compensation circuit of a power amplifier includes a varactor, a voltage sensor and a control circuit. The varactor is coupled to an input terminal of the power amplifier. The voltage sensor is arranged for detecting an amplitude of an input signal of the power amplifier to generate a detecting result. The control circuit is coupled to the varactor and the voltage sensor, and is arranged for controlling a bias voltage of the varactor to adjust a capacitance of the varactor according to the detecting result.

24. 发明申请

US20180026595A1 Matching network circuit and Radio-Frequency Power Amplifier with Odd Harmonic Rejection and Even Harmonic Rejection and Method of Adjusting Symmetry of Differential Signals 审中-公开
公开(公告)号：US20180026595A1
公开(公告)日：2018-01-25
申请号：US15721960
申请日：2017-10-01
申请人： MEDIATEK INC.
发明人： Jui-Chih Kao , Ming-Da Tsai , Po-Sen Tseng
IPC分类号： H03F3/45 , H03F1/56 , H03F1/32 , H03F3/19 , H03F3/26 , H03H7/40 , H03F3/21
CPC分类号： H03F3/45076 , H03F1/3211 , H03F1/565 , H03F3/19 , H03F3/211 , H03F3/26 , H03F3/45071 , H03F2200/171 , H03F2200/387 , H03F2200/411 , H03F2200/451 , H03F2203/45116 , H03H7/38 , H03H7/40
摘要： A radio-frequency (RF) power amplifier includes a matching network comprising at least one matching network circuit corresponding to at least one symmetry node, at least one detector for detecting power of a detected signal at the symmetry node of the matching network, and generating at least on control signal according to the power of the detected signal, wherein the detected signal is an odd harmonic of an RF signal when the RF power amplifier operates in a differential mode or an even harmonic of the RF signal when the RF power amplifier operates in a common mode, and at least one adjusting circuit for adjusting the RF signal according to the at least one control signal.

25. 发明授权

US09859356B2 Semiconductor integrated circuit 有权
公开(公告)号：US09859356B2
公开(公告)日：2018-01-02
申请号：US15044121
申请日：2016-02-16
申请人： MEDIATEK INC.
发明人： Ming-Da Tsai , Tao-Yi Lee , Cheng-Chou Hung , Tung-Hsing Lee
IPC分类号： H01L29/00 , H01L49/02 , H01L23/522
CPC分类号： H01L28/10 , H01L23/5227
摘要： A semiconductor integrated circuit includes an inductor and a plurality of high permeability patterns. The inductor includes one conductive loop. The high permeability patterns are disposed adjacent to the conductive loop.

26. 发明申请

US20160351653A1 SEMICONDUCTOR INTEGRATED CIRCUIT 有权
标题翻译：半导体集成电路
公开(公告)号：US20160351653A1
公开(公告)日：2016-12-01
申请号：US15044121
申请日：2016-02-16
申请人： MEDIATEK INC.
发明人： Ming-Da Tsai , Tao-Yi Lee , Cheng-Chou Hung , Tung-Hsing Lee
IPC分类号： H01L49/02 , H01L23/532 , H01L23/528
CPC分类号： H01L28/10 , H01L23/5227
摘要： A semiconductor integrated circuit includes an inductor and a plurality of high permeability patterns. The inductor includes one conductive loop. The high permeability patterns are disposed adjacent to the conductive loop.
摘要翻译：半导体集成电路包括电感器和多个高磁导率图案。电感器包括一个导电回路。高导磁率图案设置在导电环路附近。

27. 发明申请

US20140035096A1 METHOD FOR CONTROLLING ELECTRICAL PROPERTY OF PASSIVE DEVICE DURING FABRICATION OF INTEGRATED COMPONENT AND RELATED INTEGRATED COMPONENT 有权
标题翻译：一体化组件制造过程中被动设备电气性能及相关集成组件的方法
公开(公告)号：US20140035096A1
公开(公告)日：2014-02-06
申请号：US13797992
申请日：2013-03-12
申请人： MEDIATEK INC.
发明人： Ming-Da Tsai , George Chien , Cheng-Chou Hung
IPC分类号： H01L21/66
CPC分类号： H01L22/14 , H01L22/20
摘要： A method for controlling an electrical property of a passive device during a fabrication of an integrated component includes providing a substrate, manufacturing the passive device on the substrate, measuring the electrical property of the passive device to obtain a measuring result, determining at least one layout pattern corresponding to at least one later manufacturing process by the measuring result for adjusting the electrical property of the passive device, and continuing the rest of the fabrication including the at least one later manufacturing process of the integrated component.
摘要翻译：一种用于在集成部件的制造期间控制无源器件的电性能的方法包括提供衬底，在衬底上制造无源器件，测量无源器件的电性能以获得测量结果，确定至少一个布局通过用于调整无源器件的电性能的测量结果对应于至少一个后续制造过程的模式，以及继续包括集成部件的至少一个后续制造过程的其余的制造。

28. 发明授权

US08502573B2 Frequency divider for generating output clock signal with duty cycle different from duty cycle of input clock signal 有权
标题翻译：用于产生输出时钟信号的分频器，占空比不同于输入时钟信号的占空比
公开(公告)号：US08502573B2
公开(公告)日：2013-08-06
申请号：US13658809
申请日：2012-10-23
申请人： Mediatek Inc.
发明人： Ming-Da Tsai
IPC分类号： H03K21/00
CPC分类号： H03K23/425 , G06F1/08 , H03K3/356173 , H03K21/023 , H03K21/10
摘要： A frequency divider includes a plurality of logic circuit blocks. Each of the logic circuit blocks has a plurality of control terminals. At least one of the control terminals of one of the logic circuit blocks is arranged to receive an input clock signal having a first duty cycle. At least one of the remaining control terminals of the one of the logic circuit blocks is arranged to couple another one of the logic circuit blocks by a positive feedback. A clock signal at the at least one of the remaining control terminals has a second duty cycle different from the first duty cycle. Each of the logic circuit blocks includes a plurality of first transistors coupled in parallel between a first reference voltage and an output terminal, and a plurality of second transistors coupled in series between a second reference voltage and the output terminal.
摘要翻译：分频器包括多个逻辑电路块。每个逻辑电路块具有多个控制端子。一个逻辑电路块的控制端中的至少一个被布置成接收具有第一占空比的输入时钟信号。逻辑电路块中的一个的剩余控制端中的至少一个被布置成通过正反馈耦合另一个逻辑电路块。所述剩余控制端中的至少一个的时钟信号具有与第一占空比不同的第二占空比。每个逻辑电路块包括并联在第一参考电压和输出端之间的多个第一晶体管，以及串联耦合在第二参考电压和输出端之间的多个第二晶体管。

29. 发明申请

US20170294878A1 PHASE-ROTATED HARMONIC-REJECTION MIXER APPARATUS 审中-公开
公开(公告)号：US20170294878A1
公开(公告)日：2017-10-12
申请号：US15462923
申请日：2017-03-20
申请人： MEDIATEK INC.
发明人： Chien-Wei Tseng , Ian Tseng , Ming-Da Tsai , Yangjian Chen , Chien-Cheng Lin
IPC分类号： H03D7/12
CPC分类号： H03D7/12 , H03D7/165 , H03D2200/0082
摘要： A harmonic-rejection mixer apparatus includes a mixing circuit and a combining circuit. The mixing circuit receives mixes an input signal and a first local oscillator (LO) signal to generate a first output signal, and mixes the same input signal and a second LO signal to generate a second output signal, wherein the first LO signal and the second LO signal have a same frequency but different phases. The combining circuit combines the first output signal and the second output signal, wherein harmonic rejection is at least achieved by combination of the first output signal and the second output signal.

30. 发明授权

US09722571B2 Radio frequency transmitter, power combiners and terminations therefor 有权
公开(公告)号：US09722571B2
公开(公告)日：2017-08-01
申请号：US14140519
申请日：2013-12-25
申请人： MEDIATEK INC.
发明人： Ming-Da Tsai
IPC分类号： H03H7/48 , H04B1/04 , H01F19/04
CPC分类号： H03H7/48 , H01F19/04 , H04B1/0458
摘要： A power combiner includes a planar figure-8 shaped primary winding and a planar figure-8 shaped secondary winding; wherein, the planar figure-8 shaped primary winding is substantially overlaid with the planar figure-8 shaped secondary winding. In addition, there is provided a radio frequency (RF) transmitter having a power combiner, where the power combiner includes a planar figure-8 shaped primary winding and a planar figure-8 shaped secondary winding, wherein the planar figure-8 shaped primary winding is substantially overlaid with the planar figure-8 shaped secondary winding.

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