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21. 发明授权

US07228377B2 Semiconductor integrated circuit device, IC card, and mobile terminal 有权
标题翻译：半导体集成电路器件，IC卡和移动终端
公开(公告)号：US07228377B2
公开(公告)日：2007-06-05
申请号：US10857888
申请日：2004-06-02
申请人： Takanori Yamazoe , Takashi Tase , Junji Shigeta , Nobutaka Nagasaki , Eiji Yamasaki , Nobuhiro Oodaira , Kozo Katayama
发明人： Takanori Yamazoe , Takashi Tase , Junji Shigeta , Nobutaka Nagasaki , Eiji Yamasaki , Nobuhiro Oodaira , Kozo Katayama
IPC分类号： G06F12/00
CPC分类号： G06K19/077 , G06F12/0893 , G06F2212/2022 , G11C16/04 , G11C16/0466 , G11C16/102 , G11C16/105 , H01L27/115 , H01L27/11568
摘要： In a semiconductor integrated circuit device equipped with a flash memory and an EEPROM which are nonvolatile memories, the invention provides a technique that makes it possible to restrict an EEPROM capacity to a minimum necessary amount and reduce a chip area. Data of a minimal size required for one application program and rewritten frequently is stored in the EEPROM, and the EEPROM is configured to have a capacity of about that minimal size. Data of the same size that are respectively handled by other applications and rewritten frequently are stored in the flash memory. With respect to an application that is actually used, its data stored in the flash memory is transferred to the EEPROM and used. Data transfer between the flash memory and the EEPROM is performed if necessary. Consequently, the EEPROM capacity can be reduced and chip area reduction can be achieved.
摘要翻译：本发明提供了一种能够将EEPROM容量限制在最小必需量并减少芯片面积的技术，其中配备有闪存和EEPROM的半导体集成电路装置是非易失性存储器。一个应用程序所需的最小尺寸数据和频繁重写的数据存储在EEPROM中，并且EEPROM被配置为具有大约最小尺寸的容量。由其他应用程序分别处理并经常重写的相同大小的数据被存储在闪速存储器中。对于实际使用的应用，存储在闪速存储器中的数据被传送到EEPROM并使用。必要时，执行闪速存储器与EEPROM之间的数据传输。因此，可以减小EEPROM容量并且可以实现芯片面积的减小。

22. 发明授权

US07215179B2 Booster circuit 失效
标题翻译：增压电路
公开(公告)号：US07215179B2
公开(公告)日：2007-05-08
申请号：US10535102
申请日：2003-09-26
申请人： Takanori Yamazoe , Takeo Kanai
发明人： Takanori Yamazoe , Takeo Kanai
IPC分类号： G05F1/10
CPC分类号： G11C5/146 , G11C5/145 , H02M3/073 , H02M2001/009 , H02M2003/071 , H02M2003/075 , H02M2003/076
摘要： The present invention relates to a booster circuit of a non-volatile memory requiring a plus or minus high voltage equal to or higher than a power-supply voltage. The present invention can generate a high voltage of approximately 12 V even at a low power-supply voltage equal to or lower than 3 V and generate not only a plus high voltage but also a minus high voltage by the same circuit. Also, by combining a body-controlled type parallel charge pump, which is a booster circuit according to the present invention, with a serial-type charge pump, two types of high voltages can be efficiently generated and a reduction in chip areas can be achieved.
摘要翻译：本发明涉及一种非易失性存储器的升压电路，其需要等于或高于电源电压的正或负高电压。本发明即使在等于或低于3V的低电源电压下也可产生大约12V的高电压，并且不仅通过相同电路产生正高电压而且产生负高电压。此外，通过将根据本发明的升压电路的身体控制型并联电荷泵与串联型电荷泵组合，可以有效地产生两种类型的高电压，并且可以实现芯片面积的减少。

23. 发明授权

US07994923B2 Non-contact electronic device 失效
标题翻译：非接触式电子设备
公开(公告)号：US07994923B2
公开(公告)日：2011-08-09
申请号：US12053269
申请日：2008-03-21
申请人： Kazuki Watanabe , Takanori Yamazoe
发明人： Kazuki Watanabe , Takanori Yamazoe
IPC分类号： G08B13/14
CPC分类号： G06K19/0723
摘要： A contactless electronic device comprises a semiconductor integrated circuit device, a plurality of antennas (or antenna coils) for receiving high-frequency signals supplied by radio waves or electromagnetic waves having different frequencies. An interface judgment circuit judges which antenna the high-frequency signals are inputted through, and according to a result of the judgment, the operation of the semiconductor integrated circuit device is changed. In this manner, the contactless electronic device becomes possible to respond to a plurality of communication protocols using high-frequency signals having different frequencies, while contactless electronic devices have been impossible to respond to communication protocols using various high-frequency signals.
摘要翻译：非接触式电子设备包括半导体集成电路器件，用于接收由无线电波提供的高频信号或具有不同频率的电磁波的多个天线（或天线线圈）。接口判断电路通过判断哪个天线输入高频信号，根据判断结果，改变半导体集成电路装置的动作。以这种方式，非接触电子设备可以使用具有不同频率的高频信号对多个通信协议进行响应，而非接触式电子设备不可能对使用各种高频信号的通信协议做出响应。

24. 发明申请

US20090267736A1 NON-CONTACT ELECTRONIC DEVICE 失效
标题翻译：非接触式电子设备
公开(公告)号：US20090267736A1
公开(公告)日：2009-10-29
申请号：US12053269
申请日：2008-03-21
申请人： Kazuki WATANABE , Takanori Yamazoe
发明人： Kazuki WATANABE , Takanori Yamazoe
IPC分类号： H04Q5/22
CPC分类号： G06K19/0723
摘要： A contactless electronic device comprises a semiconductor integrated circuit device, a plurality of antennas (or antenna coils) for receiving high-frequency signals supplied by radio waves or electromagnetic waves having different frequencies. An interface judgment circuit judges which antenna the high-frequency signals are inputted through, and according to a result of the judgment, the operation of the semiconductor integrated circuit device is changed. In this manner, the contactless electronic device becomes possible to respond to a plurality of communication protocols using high-frequency signals having different frequencies, while contactless electronic devices have been impossible to respond to communication protocols using various high-frequency signals.
摘要翻译：非接触式电子设备包括半导体集成电路器件，用于接收由无线电波提供的高频信号或具有不同频率的电磁波的多个天线（或天线线圈）。接口判断电路通过判断哪个天线输入高频信号，根据判断结果，改变半导体集成电路装置的动作。以这种方式，非接触电子设备可以使用具有不同频率的高频信号对多个通信协议进行响应，而非接触式电子设备不可能响应使用各种高频信号的通信协议。

25. 发明授权

US07221610B2 Charge pump circuit for generating high voltages required in read/write/erase/standby modes in non-volatile memory device 有权
标题翻译：用于在非易失性存储器件中产生读/写/擦除/待机模式所需的高电压的电荷泵电路
公开(公告)号：US07221610B2
公开(公告)日：2007-05-22
申请号：US11050753
申请日：2005-02-07
申请人： Takanori Yamazoe , Yuichiro Akimoto , Hisanobu Ishida , Eiji Yamasaki , Nobuhiro Oodaira
发明人： Takanori Yamazoe , Yuichiro Akimoto , Hisanobu Ishida , Eiji Yamasaki , Nobuhiro Oodaira
IPC分类号： G11C5/14
CPC分类号： G11C16/12
摘要： Different stepped-up voltages and different output currents are generated in one charge pump circuit without increasing the chip area of the charge pump circuit and also electric power consumption in the charge pump circuit to be reduced to a very low power consumption level in standby mode and other modes. A semiconductor integrated circuit device comprises one charge pump circuit with an N number of basic pump cell stages connected to step up voltages in the erase and write modes of a non-volatile memory or the like, generates stepped-up voltages lower than in the erase and write modes and different from one another in output current supply capability, by using series- or parallel-connected pump cells not in excess of the N number of pump cell stages mentioned above, and changes a voltage step-up clock to a stepped-up voltage detection signal.
摘要翻译：在一个电荷泵电路中产生不同的升压电压和不同的输出电流，而不增加电荷泵电路的芯片面积，并且电荷泵电路中的电功率消耗在待机模式下降低到非常低的功率消耗水平，其他模式。半导体集成电路装置包括一个电荷泵电路，其中N个基本泵浦电池级连接到非易失性存储器等的擦除和写入模式中的升压电压，产生比在擦除中低的升压电压并通过使用不超过上述N个泵浦电池级的串并联连接的泵浦电池将输出电流供应能力的写入模式彼此不同，并将升压时钟更改为阶梯式上电压检测信号。

26. 发明申请

US20070085661A1 RFID tag, RFID reader/writer, RFID system, and processing method of RFID system 审中-公开
标题翻译： RFID标签，RFID读写器，RFID系统和RFID系统的处理方法
公开(公告)号：US20070085661A1
公开(公告)日：2007-04-19
申请号：US11488008
申请日：2006-07-18
申请人： Takanori Yamazoe , Shinichiro Fukushima , Toshiyuki Kuwana
发明人： Takanori Yamazoe , Shinichiro Fukushima , Toshiyuki Kuwana
IPC分类号： H04Q5/22 , G06K7/00 , G08B13/14
CPC分类号： G06K7/10128 , G06K7/0008 , G06K7/10039 , G06K7/10297
摘要： A reader/writer (R/W) transmits a query command ALL (A), which causes RFID tags (A) with a communication method (A) to respond at a time, to N RFID tags (A) with the communication method (A) and X RFID tags (C) with a communication method (C). In this case, since R/W receives responses from N RFID tags (A), it can recognize presence of the RFID tags with a communication method (A) from its reception level or the like. Next, R/W transmits a query command ALL (B) which causes RFID tags (B) with a communication method (B) to respond at a time. In this case, since R/W receives no response, it can recognize that no RFID tag with the communication method (B) is present rapidly. In an RFID system, therefore, a communication time between RFID tags and an RFID reader/writer can be reduced.
摘要翻译：读取器/写入器（R / W）通过通信方法（N）向N个RFID标签（A）发送一个使得通信方法（A）的RFID标签（A）一次响应的查询命令ALL（A） A）和X RFID标签（C），具有通信方法（C）。在这种情况下，由于R / W接收到来自N个RFID标签（A）的响应，因此可以从其接收等级等利用通信方法（A）来识别RFID标签的存在。接下来，R / W以通信方式（B）发送使得RFID标签（B）一次响应的查询命令ALL（B）。在这种情况下，由于R / W没有收到响应，因此可以认识到没有快速存在具有通信方式（B）的RFID标签。因此，在RFID系统中，可以减少RFID标签与RFID读写器之间的通信时间。

27. 发明申请

US20060006925A1 Booster circuit 失效
标题翻译：增压电路
公开(公告)号：US20060006925A1
公开(公告)日：2006-01-12
申请号：US10535102
申请日：2003-09-26
申请人： Takanori Yamazoe , Takeo Kanai
发明人： Takanori Yamazoe , Takeo Kanai
IPC分类号： G05F1/10
CPC分类号： G11C5/146 , G11C5/145 , H02M3/073 , H02M2001/009 , H02M2003/071 , H02M2003/075 , H02M2003/076
摘要： The present invention relates to a booster circuit of a non-volatile memory requiring a plus or minus high voltage equal to or higher than a power-supply voltage. The present invention can generate a high voltage of approximately 12 V even at a low power-supply voltage equal to or lower than 3 V and generate not only a plus high voltage but also a minus high voltage by the same circuit. Also, by combining a body-controlled type parallel charge pump, which is a booster circuit according to the present invention, with a serial-type charge pump, two types of high voltages can be efficiently generated and a reduction in chip areas can be achieved.
摘要翻译：本发明涉及一种非易失性存储器的升压电路，其需要等于或高于电源电压的正或负高电压。本发明即使在等于或低于3V的低电源电压下也可产生大约12V的高电压，并且不仅通过相同电路产生正高电压而且产生负高电压。此外，通过将根据本发明的升压电路的身体控制型并联电荷泵与串联型电荷泵组合，可以有效地产生两种类型的高电压，并且可以实现芯片面积的减少。

28. 发明申请

US20050207236A1 Charge pump circuit and non-volatile memory using the same 有权
标题翻译：电荷泵电路和非易失性存储器使用相同
公开(公告)号：US20050207236A1
公开(公告)日：2005-09-22
申请号：US11050753
申请日：2005-02-07
申请人： Takanori Yamazoe , Yuichiro Akimoto , Hisanobu Ishida , Eiji Yamasaki , Nobuhiro Oodaira
发明人： Takanori Yamazoe , Yuichiro Akimoto , Hisanobu Ishida , Eiji Yamasaki , Nobuhiro Oodaira
IPC分类号： G11C16/06 , G11C16/04 , G11C16/10 , G11C16/12 , H02M3/07
CPC分类号： G11C16/12
摘要： The present invention allows different stepped-up voltages and different output currents to be generated in one charge pump circuit without increasing the chip area of the charge pump circuit and also electric power consumption in the charge pump circuit to be reduced to a very low power consumption level in standby mode and other modes. The present invention provides a semiconductor integrated circuit device which, in one charge pump circuit with an N number of basic pump cell stages connected to step up voltages in the erase and write modes of a non-volatile memory or the like, generates stepped-up voltages lower than in the erase and write modes and different from one another in output current supply capability, by using series- or parallel-connected pump cells not in excess of the N number of pump cell stages mentioned above, and changes a voltage step-up clock to a stepped-up voltage detection signal.
摘要翻译：本发明允许在一个电荷泵电路中产生不同的升压电压和不同的输出电流，而不增加电荷泵电路的芯片面积，并且还将电荷泵电路中的电力消耗降低到非常低的功耗待机模式等模式。本发明提供了一种半导体集成电路器件，其在非易失性存储器等的擦除和写入模式下连接有N个基本泵浦单元级的一个电荷泵电路中的升压电压产生升压通过使用不超过上述N个泵浦电池级的串联或并联连接的泵浦电池，电压低于擦除和写入模式，并且输出电流供应能力彼此不同，上升时钟到升压电压检测信号。

29. 发明申请

US20050135155A1 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US20050135155A1
公开(公告)日：2005-06-23
申请号：US11002794
申请日：2004-12-03
申请人： Tetsuya Ishimaru , Takanori Yamazoe
发明人： Tetsuya Ishimaru , Takanori Yamazoe
IPC分类号： G11C16/02 , G11C7/02 , G11C7/24 , G11C11/15 , G11C11/22 , G11C11/34 , G11C13/00 , G11C16/04 , G11C16/06 , G11C16/10 , G11C16/14 , G11C16/22 , G11C16/34 , H01L21/8246 , H01L21/8247 , H01L27/10 , H01L27/105 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： G11C16/0425 , G11C16/3418 , G11C16/3431 , G11C16/349
摘要： Disclosed here is a nonvolatile semiconductor memory device used to prevent data loss that might occur in unselected memory cells due to a disturbance that might occur during programming/erasing in/from those memory cells. In the nonvolatile semiconductor memory device, the number of programming/erasing operations performed in a data storage block over a programming/erasing unit of the subject nonvolatile memory is recorded in an erasing/programming counter EW CT provided in each data storage block. When the value of the erasing/programming counter reaches a predetermined value, the data storage block corresponding to the erasing/programming counter is refreshed. In the refreshing operation, the data in the data storage block is stored in a temporary storing region provided in the data storage block, then the data in a temporary storing region of the data storage area is erased and the data stored temporarily is programmed in the data storage block again.
摘要翻译：这里公开了一种非易失性半导体存储器件，用于防止由于在来自/来自这些存储器单元的编程/擦除期间可能发生的干扰而在未选择的存储单元中可能发生的数据丢失。在非易失性半导体存储装置中，通过在非易失性存储器的编程/擦除单元上的数据存储块执行的编程/擦除操作的数量被记录在每个数据存储块中提供的擦除/编程计数器EW CT中。当擦除/编程计数器的值达到预定值时，与擦除/编程计数器相对应的数据存储块被刷新。在刷新操作中，数据存储块中的数据被存储在设置在数据存储块中的临时存储区域中，然后数据存储区域的临时存储区域中的数据被擦除，临时存储的数据被编程在数据存储块。

30. 发明申请

US20080143488A1 RADIO FREQUENCY IDENTIFICATION DEVICE 审中-公开
标题翻译：无线电频率识别装置
公开(公告)号：US20080143488A1
公开(公告)日：2008-06-19
申请号：US11845072
申请日：2007-08-26
申请人： Masaaki Yamamoto , Takanori Yamazoe , Toshiyuki Kuwana , Kazuki Watanabe
发明人： Masaaki Yamamoto , Takanori Yamazoe , Toshiyuki Kuwana , Kazuki Watanabe
IPC分类号： H04B7/00
CPC分类号： H04B5/0056 , G06K19/0726 , G06K19/07749 , H04B5/0062
摘要： An Radio Frequency Identification Device (RFID) for receiving commands transmitted from a reader/writer of a RFID system to which the RFID belongs, having a demodulation circuit comprising a variable LPF, a binarization circuit connected to the variable LPF, a transmission rate detection circuit for detecting the transmission rate of a received command from an output signal of the binarization circuit, and a control circuit for setting the bandwidth corresponding to the maximum transmission rate of the received command as the reception bandwidth of the variable LPF in the initial state, and changing the reception bandwidth of the variable LPF according to the detected transmission rate of the received command.
摘要翻译：一种射频识别装置（RFID），用于接收从RFID所属的RFID系统的读取器/写入器发送的命令，具有包括可变LPF的解调电路，连接到可变LPF的二值化电路，传输速率检测电路用于从二值化电路的输出信号检测接收到的命令的传输速率;以及控制电路，用于将与所接收命令的最大传输速率相对应的带宽设置为初始状态下的变量LPF的接收带宽，以及根据检测到的接收命令的传输速率改变变量LPF的接收带宽。

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