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21. 发明授权

US08576979B2 Arithmetic counter circuit, configuration and application for high performance CMOS image sensors 有权
标题翻译：算术计数器电路，高性能CMOS图像传感器的配置和应用
公开(公告)号：US08576979B2
公开(公告)日：2013-11-05
申请号：US13365790
申请日：2012-02-03
申请人： Yaowu Mo , Chen Xu , Min Qu , Tiejun Dai , Rui Wang , Xiaodong Luo
发明人： Yaowu Mo , Chen Xu , Min Qu , Tiejun Dai , Rui Wang , Xiaodong Luo
IPC分类号： H03K23/64 , H03K21/02 , H03K21/00 , H03K23/00
CPC分类号： H04N5/347 , H04N5/3532 , H04N5/355 , H04N5/3745 , H04N5/378
摘要： An arithmetic counter circuit for high performance CMOS image sensors includes a plurality of flip-flops of a plurality of counter stages and a plurality of multiplexers of the plurality of counter stages being coupled to the plurality of flip-flops. Each of the plurality of multiplexers coupled to receive control signals including at least one of a toggle signal, a keep signal, a shift enable signal, or a mode signal. The control signals select the output of each of the plurality of multiplexers. Each of the plurality of flip-flops is coupled to be in one of a toggle state, a keep state, a reset state or a set state based on inputs received from the plurality of multiplexers. Other embodiments are described.
摘要翻译：用于高性能CMOS图像传感器的算术计数器电路包括多个计数器级的多个触发器，并且多个计数器级的多个多路复用器耦合到多个触发器。多个多路复用器中的每一个被耦合以接收包括切换信号，保持信号，移位使能信号或模式信号中的至少一个的控制信号。控制信号选择多个多路复用器中的每一个的输出。多个触发器中的每一个基于从多个多路复用器接收的输入被耦合成处于切换状态，保持状态，复位状态或设置状态之一。描述其他实施例。

22. 发明授权

US08543964B2 Constraint optimization of sub-net level routing in asic design 有权
标题翻译：亚网设计中子网路由的约束优化
公开(公告)号：US08543964B2
公开(公告)日：2013-09-24
申请号：US13280146
申请日：2011-10-24
申请人： Liang Ge , Xia Li , Jia Lian Tang , Xiao Feng Tang , Chen Xu
发明人： Liang Ge , Xia Li , Jia Lian Tang , Xiao Feng Tang , Chen Xu
IPC分类号： G06F17/50
CPC分类号： G06F17/5077 , G06F17/5031 , G06F2217/84
摘要： Functionality can be implemented for optimizing connection constraints in an integrated circuit design. A target timing path associated with a first of a plurality of sub-connections of the integrated circuit is determined. A timing probability value and a route probability value associated with the first of the plurality of sub-connections is determined based, at least in part, on the target timing path associated with the first of the plurality of sub-connections. The timing probability value indicates a probability that timing closure is satisfied on the target timing path. The route probability value indicates a probability that a physical routing track on the target timing path associated with the first of the plurality of sub-connections resolves congestion. A current connection constraint associated with the first of the plurality of sub-connections is modified in accordance with a connection constraint model to which the first of the plurality of sub-connections corresponds.
摘要翻译：可以实现功能，以优化集成电路设计中的连接约束。确定与集成电路的多个子连接中的第一个相关联的目标定时路径。至少部分地基于与多个子连接中的第一个相关联的目标定时路径来确定与多个子连接中的第一个子连接相关联的定时概率值和路线概率值。定时概率值表示在目标定时路径上满足定时闭合的概率。路由概率值指示与多个子连接中的第一个相关联的目标定时路径上的物理路由轨迹解决拥塞的概率。与多个子连接中的第一个连接相关联的当前连接约束根据多个子连接中的第一个子连接对应的连接约束模型进行修改。

23. 发明授权

US08368789B2 Systems and methods to provide reference current with negative temperature coefficient 有权
标题翻译：提供参考电流与负温度系数的系统和方法
公开(公告)号：US08368789B2
公开(公告)日：2013-02-05
申请号：US12323802
申请日：2008-11-26
申请人： Chen Xu , Yaowu Mo
发明人： Chen Xu , Yaowu Mo
IPC分类号： H04N5/335 , H03K3/38 , H03K3/01 , H03F3/45
CPC分类号： H04N5/357 , G05F1/561 , G05F3/30
摘要： Systems and methods for providing one or more reference currents with respective negative temperature coefficients are provided. A first voltage is divided to provide a divided voltage, which is compared to a reference voltage (e.g., a bandgap reference voltage) to provide a control voltage. The first voltage and the one or more reference currents are based on the control voltage.
摘要翻译：提供了用于提供具有相应的负温度系数的一个或多个参考电流的系统和方法。第一电压被分压以提供分压，其与参考电压（例如，带隙参考电压）进行比较以提供控制电压。第一电压和一个或多个参考电流基于控制电压。

24. 发明申请

US20120293047A1 Large-scale Fabrication of Vertically Aligned ZnO Nanowire Arrays 有权
标题翻译：垂直对准的ZnO纳米线阵列的大规模制造
公开(公告)号：US20120293047A1
公开(公告)日：2012-11-22
申请号：US13473867
申请日：2012-05-17
申请人： Zhong Lin Wang , Youfan Hu , Yan Zhang , Chen Xu , Guang Zhu
发明人： Zhong Lin Wang , Youfan Hu , Yan Zhang , Chen Xu , Guang Zhu
IPC分类号： H02N2/18 , H01L41/18 , B82Y15/00 , B82Y40/00
CPC分类号： H02N2/18 , B82Y5/00 , B82Y30/00 , B82Y40/00 , H01L27/20 , H01L41/113 , H01L41/317 , H01L41/319 , H02N2/181 , H02N2/186
摘要： A generator includes a substrate, a first electrode layer, a dense plurality of vertically-aligned piezoelectric elongated nanostructures, an insulating layer and a second electrode layer. The substrate has a top surface and the first electrode layer is disposed on the top surface of the substrate. The dense plurality of vertically-aligned piezoelectric elongated nanostructures extends from the first electrode layer. Each of the nanostructures has a top end. The insulating layer is disposed on the top ends of the nanostructures. The second electrode layer is disposed on the non-conductive layer and is spaced apart from the nanostructures.
摘要翻译：发电机包括衬底，第一电极层，密集多个垂直排列的压电细长纳米结构，绝缘层和第二电极层。衬底具有顶表面，并且第一电极层设置在衬底的顶表面上。密集的多个垂直排列的压电细长纳米结构从第一电极层延伸。每个纳米结构具有顶端。绝缘层设置在纳米结构的顶端。第二电极层设置在非导电层上并与纳米结构间隔开。

25. 发明授权

US08274005B2 Keypad assembly 有权
标题翻译：键盘装配
公开(公告)号：US08274005B2
公开(公告)日：2012-09-25
申请号：US12713884
申请日：2010-02-26
申请人： Chao Chen , Chen Xu
发明人： Chao Chen , Chen Xu
IPC分类号： H01H13/06
CPC分类号： H01H13/86 , H01H2209/01 , H01H2219/062 , H01H2223/002 , H01H2229/046 , H01H2233/04
摘要： A keypad assembly is described herein in which the keypad assembly includes a substrate and a plurality of domes positioned on the substrate and configured to translate operator action into a corresponding input for a machine. The keypad assembly also includes a dome overlay positioned over the domes and the substrate in which the dome overlay can create a sealed environment for the substrate and the domes. A light guide that directs light in the keypad assembly and an interlocking component coupled to the light guide can also be part of the keypad assembly. In one arrangement, the interlocking component can selectively compress the dome overlay to assist in the creation of the sealed environment. In another arrangement, the interlocking component can compress the dome overlay by bending the dome overlay at an edge of the substrate.
摘要翻译：本文描述了键盘组件，其中键盘组件包括基板和位于基板上的多个圆顶，并且被配置为将操作者动作转换成机器的相应输入。键盘组件还包括位于圆顶和基底之间的圆顶覆盖物，其中圆顶覆盖物可以为基底和圆顶形成密封环境。引导键盘组件中的光和耦合到光导的互锁部件的光导也可以是键盘组件的一部分。在一种布置中，互锁部件可以选择性地压缩圆顶盖，以有助于创建密封环境。在另一种布置中，互锁部件可以通过在基板的边缘处弯曲圆顶覆盖物来压缩圆顶覆盖物。

26. 发明申请

US20120147237A1 IMAGE SENSING PIXELS WITH FEEDBACK LOOPS FOR IMAGING SYSTEMS 有权
标题翻译：具有反射镜的图像感应像素用于成像系统
公开(公告)号：US20120147237A1
公开(公告)日：2012-06-14
申请号：US12963525
申请日：2010-12-08
申请人： Chen Xu , Yaowu Mo
发明人： Chen Xu , Yaowu Mo
IPC分类号： H04N5/335
CPC分类号： H04N5/3745 , H01L27/14609
摘要： An imaging system may include an image sensor array formed from imaging pixels with feedback loops. Each imaging pixel may include an amplifier transistor that is controlled by a voltage on a floating diffusion node and may include a feedback transistor connected between the floating diffusion node and column readout circuitry. The amplifier transistor, together with a current source in the image sensor array, may form a common-source amplifier that inversely amplifies the voltage on the floating diffusion node and provides control signals to the feedback transistor. The common-source amplifier and the feedback transistor may create a feedback loop during image readout operations and during image reset operations that clamps the voltage on the floating diffusion node.
摘要翻译：成像系统可以包括由具有反馈回路的成像像素形成的图像传感器阵列。每个成像像素可以包括由浮动扩散节点上的电压控制的放大器晶体管，并且可以包括连接在浮动扩散节点和列读出电路之间的反馈晶体管。放大器晶体管与图像传感器阵列中的电流源一起可以形成公共源放大器，其反向放大浮动扩散节点上的电压并向反馈晶体管提供控制信号。共源放大器和反馈晶体管可以在图像读出操作期间和在将浮动扩散节点上的电压钳位的图像复位操作期间产生反馈回路。

27. 发明授权

US08097908B2 Antiblooming imaging apparatus, systems, and methods 有权
标题翻译：抗皱成像设备，系统和方法
公开(公告)号：US08097908B2
公开(公告)日：2012-01-17
申请号：US12719597
申请日：2010-03-08
申请人： Chen Xu , Gennadiy Agranov , Igor Karasev
发明人： Chen Xu , Gennadiy Agranov , Igor Karasev
IPC分类号： H01L31/062
CPC分类号： H04N5/378 , H04N5/3594 , H04N5/3745
摘要： Apparatus, systems, and methods are described to assist in reducing dark current in an active pixel sensor. In various embodiments, a potential barrier arrangement is configured to block the flow of charge carriers generated outside a photosensitive region. In various embodiments, a potential well-potential barrier arrangement is formed to direct charge carriers away from the photosensitive region during an integration time.
摘要翻译：描述了装置，系统和方法以帮助减少有源像素传感器中的暗电流。在各种实施例中，势垒布置被配置为阻挡在感光区域外部产生的电荷载流子的流动。在各种实施例中，形成势阱势垒布置，以在积分时间期间使电荷载流子远离光敏区域。

28. 发明授权

US07956914B2 Imager methods, apparatuses, and systems providing a skip mode with a wide dynamic range operation 有权
标题翻译：提供具有宽动态范围操作的跳过模式的成像仪方法，装置和系统
公开(公告)号：US07956914B2
公开(公告)日：2011-06-07
申请号：US11890507
申请日：2007-08-07
申请人： Chen Xu
发明人： Chen Xu
IPC分类号： H04N3/14 , H04N5/335 , H04N1/04
CPC分类号： H04N5/3456 , H04N5/23245 , H04N5/335 , H04N5/3458 , H04N5/3532 , H04N5/3535 , H04N5/35581 , H04N5/3742 , H04N9/045
摘要： Methods, apparatuses and systems provide a high dynamic range mode of operation for an image sensor when operating in a skip mode where certain pixels of an array are not readout. Multiple integration periods are employed in the skip mode with selected pixels being readout through circuits associated with pixels that are not readout.
摘要翻译：方法，装置和系统在以阵列的某些像素未读出的跳过模式下操作时为图像传感器提供高动态范围的操作模式。在跳过模式中采用多个积分周期，所选择的像素通过与未读出的像素相关联的电路读出。

29. 发明申请

US20100294669A1 ELECTROLYTIC DEPOSITION OF METAL-BASED COMPOSITE COATINGS COMPRISING NANO-PARTICLES 有权
标题翻译：包含纳米颗粒的金属基复合涂层的电沉积
公开(公告)号：US20100294669A1
公开(公告)日：2010-11-25
申请号：US12747681
申请日：2008-12-10
申请人： Joseph A. Abys , Edward J. Kudrak, JR. , Jingye Li , Chen Xu , Chonglun Fan
发明人： Joseph A. Abys , Edward J. Kudrak, JR. , Jingye Li , Chen Xu , Chonglun Fan
IPC分类号： C25D3/58 , C25D9/02 , C25D3/62 , C25D3/56 , C25D3/46 , C25D3/50 , C25D3/48 , C25D3/12 , C25D3/38 , C25D3/22
CPC分类号： C25D15/02 , C25D3/02 , C25D15/00
摘要： A method is provided for imparting corrosion resistance onto a surface of a substrate. The method comprises contacting the surface of the substrate with an electrolytic plating solution comprising (a) a source of deposition metal ions of a deposition metal selected from the group consisting of zinc, palladium, silver, nickel, copper, gold, platinum, rhodium, ruthenium, chrome, and alloys thereof, (b) a pre-mixed dispersion of non-metallic nano-particles, wherein the non-metallic particles have a pre-mix coating of surfactant molecules thereon; and applying an external source of electrons to the electrolytic plating solution to thereby electrolytically deposit a metal-based composite coating comprising the deposition metal and non-metallic nano-particles onto the surface.
摘要翻译：提供了一种赋予衬底表面的耐腐蚀性的方法。该方法包括使基板的表面与电解电镀溶液接触，所述电解电镀溶液包括（a）选自锌，钯，银，镍，铜，金，铂，铑等的沉积金属的沉积金属离子源，钌，铬及其合金，（b）非金属纳米颗粒的预混合分散体，其中所述非金属颗粒在其上具有表面活性剂分子的预混合涂层; 以及将外部电子源施加到所述电解电镀溶液中，从而将包含所述沉积金属和非金属纳米颗粒的金属基复合涂层电沉积到所述表面上。

30. 发明申请

US20100128154A1 SYSTEMS AND METHODS TO PROVIDE REFERENCE CURRENT WITH NEGATIVE TEMPERATURE COEFFICIENT 有权
标题翻译：使用负温度系数提供参考电流的系统和方法
公开(公告)号：US20100128154A1
公开(公告)日：2010-05-27
申请号：US12323802
申请日：2008-11-26
申请人： Chen Xu , Yaowu Mo
发明人： Chen Xu , Yaowu Mo
IPC分类号： H04N5/335 , G05F3/16
CPC分类号： H04N5/357 , G05F1/561 , G05F3/30
摘要： Systems and methods for providing one or more reference currents with respective negative temperature coefficients are provided. A first voltage is divided to provide a divided voltage, which is compared to a reference voltage (e.g., a bandgap reference voltage) to provide a control voltage. The first voltage and the one or more reference currents are based on the control voltage.
摘要翻译：提供了用于提供具有相应的负温度系数的一个或多个参考电流的系统和方法。第一电压被分压以提供分压，其与参考电压（例如，带隙参考电压）进行比较以提供控制电压。第一电压和一个或多个参考电流基于控制电压。

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