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    • 28. 发明申请
    • CONTACT STRUCTURE OF A WIRES AND METHOD MANUFACTURING THE SAME, AND THIN FILM TRANSISTOR SUBSTRATE INCLUDING THE CONTACT STRUCTURE AND METHOD MANUFACTURING THE SAME
    • 一种线的接触结构及其制造方法,以及包括接触结构的薄膜晶体管基板及其制造方法
    • US20080090404A1
    • 2008-04-17
    • US11947204
    • 2007-11-29
    • Seung-Taek LimMun-Pyo HongNam-Seok RohYoung-Joo SongSang-Ki KwakKwon-Young ChoiKeun-kyu Song
    • Seung-Taek LimMun-Pyo HongNam-Seok RohYoung-Joo SongSang-Ki KwakKwon-Young ChoiKeun-kyu Song
    • H01L21/4763
    • G02F1/13458G02F1/136227G02F1/136286G02F2001/13629H01L21/76805H01L21/76816H01L23/53223H01L27/124H01L2924/0002H01L2924/00
    • In a method of fabricating a thin film transistor array substrate for a liquid crystal display, a gate line assembly is formed on a substrate with a chrome-based under-layer and an aluminum alloy-based over-layer while proceeding in the horizontal direction. The gate line assembly has gate lines, and gate electrodes, and gate pads. A gate insulating layer is deposited onto the insulating substrate such that the gate insulating layer covers the gate line assembly. A semiconductor layer and an ohmic contact layer are sequentially formed on the gate insulating layer. A data line assembly is formed on the ohmic contact layer with a chrome-based under-layer and an aluminum alloy-based over-layer. The data line assembly has data lines crossing over the gate lines, source electrodes, drain electrodes, and data pads. A protective layer is deposited onto the substrate, and patterned to thereby form contact holes exposing the drain electrodes, the gate pads, and the data pads. The sidewall of the under-layers for the gate line assembly and the data line assembly is exposed through the contact holes. An IZO-based layer is deposited onto the substrate, and patterned to thereby form pixel electrodes, subsidiary gate pads, and subsidiary data pads. The pixel electrodes are connected to the sidewall of the drain electrodes, and the subsidiary gate and data pads are connected to the sidewall of the gate and the data pads.
    • 在制造用于液晶显示器的薄膜晶体管阵列基板的方法中,栅极线组件在沿水平方向前进的基底上形成有铬基底层和基于铝合金的超层。 栅极线组件具有栅极线,栅电极和栅极焊盘。 栅极绝缘层沉积在绝缘基板上,使得栅极绝缘层覆盖栅极线组件。 在栅极绝缘层上依次形成半导体层和欧姆接触层。 数据线组件在欧姆接触层上形成有铬基底层和基于铝合金的超层。 数据线组件具有跨越栅极线,源电极,漏电极和数据焊盘的数据线。 保护层沉积到衬底上,并被图案化,从而形成露出漏电极,栅极焊盘和数据焊盘的接触孔。 用于栅极线组件和数据线组件的下层的侧壁通过接触孔暴露。 将基于IZO的层沉积到衬底上并构图,从而形成像素电极,辅助栅极焊盘和辅助数据焊盘。 像素电极连接到漏电极的侧壁,辅助栅极和数据焊盘连接到栅极和数据焊盘的侧壁。