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    • 21. 发明申请
    • MASS PRODUCTION TESTING OF USB FLASH CARDS WITH VARIOUS FLASH MEMORY CELLS
    • 具有各种闪存存储器的USB闪存卡的质量生产测试
    • US20080177922A1
    • 2008-07-24
    • US11871117
    • 2007-10-11
    • David Q. ChowAbraham C. MaEdward W. LeeMing-Shiang Shen
    • David Q. ChowAbraham C. MaEdward W. LeeMing-Shiang Shen
    • G06F13/00G06F12/00
    • G06F11/2221
    • A high volume testing/formatting process is provided for Universal Serial Bus-based (USB-based) electronic data flash cards (USB devices) that meets the increasing demand for USB electronic data flash cards (USB devices). A test host is simultaneously coupled to the multiple USB devices (e.g., using a multi-port card reader or a probe fixture), a controller endpoint value is read from each of the USB devices and verified with a known good value, and then testing/formatting is performed on each of the USB devices by writing predetermined data into each USB device in a pipelined manner, then reading out and testing the predetermined data. In one embodiment, the test host implements a special USB driver that blocks standard USB registration procedures upon detecting the plurality of USB devices. Control and/or boot code data are written onto the flash memory device (i.e., instead of being provided on a controller ROM).
    • 为通用串行总线(USB)电子数据闪存卡(USB设备)提供了大容量测试/格式化过程,可满足USB电子数据闪存卡(USB设备)日益增长的需求。 测试主机同时耦合到多个USB设备(例如,使用多端口读卡器或探头夹具),从每个USB设备读取控制器端点值,并用已知的良好值进行验证,然后测试 通过以流水线方式将预定数据写入每个USB设备,然后读出并测试预定数据,在每个USB设备上执行/格式化。 在一个实施例中,测试主机在检测到多个USB设备时实现阻止标准USB注册过程的特殊USB驱动器。 控制和/或引导代码数据被写入快闪存储器件(即,不是设置在控制器ROM上)。
    • 24. 发明授权
    • Data security for electronic data flash card
    • 电子数据闪存卡的数据安全
    • US07873837B1
    • 2011-01-18
    • US11685143
    • 2007-03-12
    • Charles C. LeeI-Kang YuEdward W. LeeAbraham C. MaMing-Shiang Shen
    • Charles C. LeeI-Kang YuEdward W. LeeAbraham C. MaMing-Shiang Shen
    • G06F21/00H04L9/00H04K1/00
    • G06F12/1416G06F21/32G06F21/78G06K19/07G06K19/07354G07C9/00087
    • An electronic data flash card includes a random number generator that generates a random number stored in the card and a host system each time the card is accessed by the host system. The random number is used by the host system to encrypt a logical branch address, a user password, and user data that is written to and stored in a secure area of the card. The random number is encrypted using a key associated with the card, and the encrypted random number is stored by the card with the associated encrypted data. The random number is not stored in the host system. A new random number is generated each time the card is queried. In a read process the host system decrypts the encrypted random number using the key, then uses the random number to decrypt the associated encrypted data. Access to read/write processes are password protected.
    • 电子数据闪存卡包括随机数生成器,其生成存储在卡中的随机数,以及每次主机系统访问卡时的主机系统。 主机系统使用随机数来加密逻辑分支地址,用户密码和写入并存储在卡的安全区域中的用户数据。 使用与该卡相关联的密钥对该随机数进行加密,并且加密随机数由卡与相关联的加密数据一起存储。 随机数不存储在主机系统中。 每次查询卡片时都会产生一个新的随机数字。 在读取过程中,主机系统使用密钥解密加密的随机数,然后使用随机数来解密相关联的加密数据。 对读/写进程的访问受密码保护。
    • 25. 发明授权
    • High volume testing for USB electronic data flash cards
    • USB电子数据闪存卡的大容量测试
    • US07702984B1
    • 2010-04-20
    • US11626347
    • 2007-01-23
    • Charles C. LeeI-Kang YuEdward W. LeeAbraham C. MaMing-Shiang Shen
    • Charles C. LeeI-Kang YuEdward W. LeeAbraham C. MaMing-Shiang Shen
    • G06F11/00G11C29/00G11C16/04
    • G06F12/1416G06F21/32G06F21/78G07C9/00087G07C2009/00095H01R13/629
    • A high volume testing/formatting process is provided for Universal Serial Bus-based (USB-based) electronic data flash cards (USB devices) that meets the increasing demand for USB electronic data flash cards (USB devices). A test host is simultaneously coupled to the multiple USB devices (e.g., using a multi-port card reader or a probe fixture), a controller endpoint value is read from each of the USB devices and verified with a known good value, and then testing/formatting is performed on each of the USB devices by writing predetermined data into each USB device in a pipelined manner, then reading out and testing the predetermined data. In one embodiment, the test host implements a special a USB driver that blocks standard USB registration procedures upon detecting the plurality of USB devices. Control and/or boot code data are written onto the flash memory device (i.e., instead of being provided on a controller ROM).
    • 为通用串行总线(USB)电子数据闪存卡(USB设备)提供了大容量测试/格式化过程,可满足USB电子数据闪存卡(USB设备)日益增长的需求。 测试主机同时耦合到多个USB设备(例如,使用多端口读卡器或探头夹具),从每个USB设备读取控制器端点值,并用已知的良好值进行验证,然后测试 通过以流水线方式将预定数据写入每个USB设备,然后读出并测试预定数据,在每个USB设备上执行/格式化。 在一个实施例中,测试主机实现了一种特殊的USB驱动器,其在检测到多个USB设备时阻止标准USB注册过程。 控制和/或引导代码数据被写入快闪存储器件(即,不是设置在控制器ROM上)。
    • 26. 发明授权
    • High-speed controller for phase-change memory peripheral device
    • 用于相变存储器外围设备的高速控制器
    • US07643334B1
    • 2010-01-05
    • US11836264
    • 2007-08-09
    • Charles C. LeeAbraham C. MaEdward W. Lee
    • Charles C. LeeAbraham C. MaEdward W. Lee
    • G11C11/00
    • G11C13/0004G11C7/22G11C13/0069G11C2213/79
    • Phase-change memory (PCM) cells store data using alloy resistors in high-resistance amorphous and low-resistance crystalline states. The time of the memory cell's set-current pulse can be 100 ns, much longer than read or reset times. The write time depends on the write data state and is relatively long for set, but short for clear. A PCM chip has a lookup table (LUT) caching write data that is later written to a PCM bank. Host data is latched into a line FIFO and written into the LUT, reducing write delays to the slower PCM. The PCM chip has upstream and downstream serial interfaces to other PCM chips arranged as a token stub. Requests are passed down the token-stub while acknowledgements are passed up the token-stub to the host's memory controller. Shared chip-enable lines are driven by the upstream PCM chip for requests, and by the downstream PCM chip for acknowledgements.
    • 相变存储器(PCM)单元使用高电阻非晶和低电阻晶体状态的合金电阻存储数据。 存储单元的设定电流脉冲的时间可以是100 ns,比读取或复位时间长得多。 写入时间取决于写入数据状态,并且对于设置来说相对较长,但是要清除。 PCM芯片具有一个查找表(LUT),用于缓存稍后写入PCM存储区的写入数据。 主机数据被锁存在行FIFO中并被写入LUT中,从而减少对较慢PCM的写延迟。 PCM芯片具有排列成令牌存根的其他PCM芯片的上游和下游串行接口。 请求在令牌存根下传递,而确认将令牌存根传递到主机的内存控制器。 共享芯片使能线由上行PCM芯片驱动,用于请求,由下行PCM芯片用于确认。