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21. 发明授权

US06320214B1 Semiconductor device having a ferroelectric TFT and a dummy element 有权
标题翻译：具有铁电TFT和虚拟元件的半导体器件
公开(公告)号：US06320214B1
公开(公告)日：2001-11-20
申请号：US09209214
申请日：1998-12-11
申请人： Akihiro Matsuda , Yoshihisa Nagano , Yasuhiro Uemoto
发明人： Akihiro Matsuda , Yoshihisa Nagano , Yasuhiro Uemoto
IPC分类号： H01L2976
CPC分类号： H01L27/11502 , H01L27/11507
摘要： The present invention provides a semiconductor device including a semiconductor element and a dummy semiconductor element adjacent to the semiconductor element. When the semiconductor element is a capacitor element including a bottom electrode, a top electrode and a dielectric layer between the electrodes, a dummy capacitor element also has dummy electrodes and a dummy dielectric layer between the dummy electrodes. The dummy electrode is located so that a space between the top electrode of the capacitor element ad the dummy top electrode is in a predetermined range (e.g. 0.3 &mgr;m to 14 &mgr;m). The dummy capacitor element prevents the capacitor dielectric layer from degrading since the collision of the etching ions with the capacitor dielectric layer in a dry etching process is suppressed.
摘要翻译：本发明提供一种包括半导体元件和与半导体元件相邻的虚设半导体元件的半导体器件。当半导体元件是包括底部电极，顶部电极和电极之间的电介质层的电容器元件时，虚拟电容器元件在虚拟电极之间也具有虚拟电极和虚设电介质层。虚拟电极被定位成使得电容器元件的顶部电极和虚拟顶部电极之间的空间处于预定范围（例如，0.3μm至14μm）。由于在干蚀刻工艺中蚀刻离子与电容器电介质层的碰撞被抑制，因此虚拟电容器元件防止电容器介电层降解。

22. 发明授权

US06174822B1 Semiconductor device and method for fabricating the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06174822B1
公开(公告)日：2001-01-16
申请号：US09175250
申请日：1998-10-20
申请人： Yoshihisa Nagano , Toshie Kutsunai , Yuji Judai , Yasuhiro Uemoto , Eiji Fujii
发明人： Yoshihisa Nagano , Toshie Kutsunai , Yuji Judai , Yasuhiro Uemoto , Eiji Fujii
IPC分类号： H01L2131
CPC分类号： H01L27/1085 , H01L21/76895 , H01L23/5223 , H01L28/55 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes: a capacitor provided on a supporting substrate having an integrated circuit thereon and including a lower electrode, a dielectric film, and an upper electrode; a first interlayer insulating film provided so as to cover the capacitor; a first interconnect selectively provided on the first interlayer insulating film and electrically connected to the integrated circuit and the capacitor through a first contact hole formed in the first interlayer insulating film; a second interlayer insulating film formed of ozone TEOS and provided so as to cover the first interconnect; a second interconnect selectively provided on the second interlayer insulating film and electrically connected to the first interconnect through a second contact hole formed in the second interlayer insulating film; and a passivation layer provided so as to cover the second interconnect.
摘要翻译：半导体器件包括：设置在其上具有集成电路的支撑衬底上并包括下电极，电介质膜和上电极的电容器; 设置为覆盖电容器的第一层间绝缘膜; 选择性地设置在所述第一层间绝缘膜上并通过形成在所述第一层间绝缘膜中的第一接触孔与所述集成电路和所述电容器电连接的第一互连; 由臭氧TEOS形成的第二层间绝缘膜，并设置为覆盖第一互连; 选择性地设置在第二层间绝缘膜上并通过形成在第二层间绝缘膜中的第二接触孔电连接到第一互连的第二互连; 以及设置成覆盖第二互连的钝化层。

23. 发明申请

US20050082638A1 Semiconductor device and method for fabricating the same 审中-公开
公开(公告)号：US20050082638A1
公开(公告)日：2005-04-21
申请号：US10968623
申请日：2004-10-19
申请人： Yoshihisa Nagano , Toshie Kutsunai , Yuji Judai , Yasuhiro Uemoto , Eiji Fujii
发明人： Yoshihisa Nagano , Toshie Kutsunai , Yuji Judai , Yasuhiro Uemoto , Eiji Fujii
IPC分类号： H01L21/02 , H01L21/768 , H01L21/8242 , H01L23/522 , H01L29/76 , H01L21/3205
CPC分类号： H01L27/1085 , H01L21/76895 , H01L23/5223 , H01L28/55 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes: a capacitor provided on a supporting substrate having an integrated circuit thereon and including a lower electrode, a dielectric film, and an upper electrode; a first interlayer insulating film provided so as to cover the capacitor; a first interconnect selectively provided on the first interlayer insulating film and electrically connected to the integrated circuit and the capacitor through a first contact hole formed in the first interlayer insulating film; a second interlayer insulating film formed of ozone TEOS and provided so as to cover the first interconnect; a second interconnect selectively provided on the second interlayer insulating film and electrically connected to the first interconnect through a second contact hole formed in the second interlayer insulating film; and a passivation layer provided so as to cover the second interconnect.

24. 发明授权

US06573111B2 Method of making a semiconductor device with capacitor element 失效
公开(公告)号：US06573111B2
公开(公告)日：2003-06-03
申请号：US10177781
申请日：2002-06-20
申请人： Yoshihisa Nagano , Yasuhiro Uemoto , Yuji Judai , Masamichi Azuma , Eiji Fujii
发明人： Yoshihisa Nagano , Yasuhiro Uemoto , Yuji Judai , Masamichi Azuma , Eiji Fujii
IPC分类号： H01L2100
CPC分类号： H01L27/11502 , H01L21/76895 , H01L27/11507
摘要： A semiconductor device includes: a silicon substrate; a MOS semiconductor device provided on the silicon substrate, the MOS semiconductor device including a silicide region on an outermost surface thereof; a first insulating film covering the MOS semiconductor device; a capacitor element provided on the first insulating film, the capacitor element comprising a lower electrode, an upper electrode, and a capacitor film interposed between the lower electrode and the upper electrode, and the capacitor film comprising a ferroelectric material; a second insulating film covering the first insulating film and the capacitor element; a contact hole provided in the first insulating film and the second insulating film over the MOS semiconductor device and the capacitor element; and an interconnection layer provided on the second insulating film for electrically connecting the MOS semiconductor device and the capacitor element to each other, wherein a bottom portion of the interconnection layer comprises a conductive material other than titanium.

25. 再颁专利

USRE40602E1 Semiconductor device having a ferroelectric TFT and a dummy element 有权
标题翻译：具有铁电TFT和虚拟元件的半导体器件
公开(公告)号：USRE40602E1
公开(公告)日：2008-12-09
申请号：US10611307
申请日：2003-07-01
申请人： Akihiro Matsuda , Yoshihisa Nagano , Yasuhiro Uemoto
发明人： Akihiro Matsuda , Yoshihisa Nagano , Yasuhiro Uemoto
IPC分类号： H01L21/70
CPC分类号： H01L27/11502 , H01L27/11507
摘要： The present invention provides a semiconductor device including a semiconductor element and a dummy semiconductor element adjacent to the semiconductor element. When the semiconductor element is a capacitor element including a bottom electrode, a top electrode and a dielectric layer between the electrodes, a dummy capacitor element also has dummy electrodes and a dummy dielectric layer between the dummy electrodes. The dummy electrode is located so that a space between the top electrode of the capacitor element ad the dummy top electrode is in a predetermined range (e.g. 0.3 μm to 14 μm). The dummy capacitor element prevents the capacitor dielectric layer from degrading since the collisions of the etching ions with the capacitor dielectric layer in a dry etching process is suppressed.
摘要翻译：本发明提供一种包括半导体元件和与半导体元件相邻的虚设半导体元件的半导体器件。当半导体元件是包括底部电极，顶部电极和电极之间的电介质层的电容器元件时，虚拟电容器元件在虚拟电极之间也具有虚拟电极和虚设电介质层。虚拟电极被定位成使得电容器元件的顶部电极和虚拟顶部电极之间的空间处于预定范围（例如，0.3μm至14μm）。由于在干式蚀刻工艺中蚀刻离子与电容器电介质层的碰撞被抑制，所以虚拟电容器元件防止电容器介电层降解。

26. 发明授权

US06849887B2 Semiconductor device and method for fabricating the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06849887B2
公开(公告)日：2005-02-01
申请号：US09103873
申请日：1998-06-24
申请人： Yoshihisa Nagano , Toshie Kutsunai , Yuji Judai , Yasuhiro Uemoto , Eiji Fujii
发明人： Yoshihisa Nagano , Toshie Kutsunai , Yuji Judai , Yasuhiro Uemoto , Eiji Fujii
IPC分类号： H01L21/02 , H01L21/768 , H01L21/8242 , H01L23/522 , H01L29/76
CPC分类号： H01L27/1085 , H01L21/76895 , H01L23/5223 , H01L28/55 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes: a capacitor provided on a supporting substrate having an integrated circuit thereon and including a lower electrode, a dielectric film, and an upper electrode; a first interlayer insulating film provided so as to cover the capacitor; a first interconnect selectively provided on the first interlayer insulating film and electrically connected to the integrated circuit and the capacitor through a first contact hole formed in the first interlayer insulating film; a second interlayer insulating film formed of ozone TEOS and provided so as to cover the first interconnect; a second interconnect selectively provided on the second interlayer insulating film and electrically connected to the first interconnect through a second contact hole formed in the second interlayer insulating film; and a passivation layer provided so as to cover the second interconnect.
摘要翻译：半导体器件包括：设置在其上具有集成电路的支撑衬底上并包括下电极，电介质膜和上电极的电容器; 设置为覆盖电容器的第一层间绝缘膜; 选择性地设置在所述第一层间绝缘膜上并通过形成在所述第一层间绝缘膜中的第一接触孔与所述集成电路和所述电容器电连接的第一互连; 由臭氧TEOS形成的第二层间绝缘膜，并设置为覆盖第一互连; 选择性地设置在第二层间绝缘膜上并通过形成在第二层间绝缘膜中的第二接触孔电连接到第一互连的第二互连; 以及设置成覆盖第二互连的钝化层。

27. 发明授权

US06232131B1 Method for manufacturing semiconductor device with ferroelectric capacitors including multiple annealing steps 失效
标题翻译：用于制造具有多个退火步骤的铁电电容器的半导体器件的方法
公开(公告)号：US06232131B1
公开(公告)日：2001-05-15
申请号：US09103961
申请日：1998-06-24
申请人： Yoshihisa Nagano , Eiji Fujii , Yasuhiro Uemoto
发明人： Yoshihisa Nagano , Eiji Fujii , Yasuhiro Uemoto
IPC分类号： H01L218242
CPC分类号： H01L28/55
摘要： The method for manufacturing a semiconductor device of this invention comprises the steps: forming a first wiring layer on a semiconductor substrate on which a capacitor element with a capacitor dielectric film is formed, and the capacitor dielectric film is at least one film selected from the group consisting of a capacitor dielectric film with high dielectric constant and a ferroelectric film; conducting a first annealing to said semiconductor substrate; forming a second wiring layer on said first wiring layer; etching selectively the first wiring layer and the second wiring layer; and conducting a second annealing to the semiconductor substrate, so that the stress provided to the capacitor element can be reduced by annealing after forming each wiring layer, and thus, it can prevent the increase of leakage current and deterioration of dielectric breakdown voltage of the capacitor element having a capacitor dielectric film comprising a high capacitor dielectric film and a ferroelectric film.
摘要翻译：本发明的半导体装置的制造方法包括以下步骤：在形成有电容器电介质膜的电容器元件的半导体基板上形成第一布线层，并且所述电容器电介质膜为选自所述第一布线层由具有高介电常数的电容器电介质膜和铁电体膜组成; 对所述半导体衬底进行第一退火; 在所述第一布线层上形成第二布线层; 选择性地蚀刻第一布线层和第二布线层; 并且对半导体衬底进行第二次退火，从而可以在形成每个布线层之后通过退火来减小提供给电容器元件的应力，从而可以防止漏电流的增加和电容器的介质击穿电压的劣化具有包括高电容电介质膜和铁电体膜的电容器电介质膜的元件。

28. 发明申请

US20060065918A1 Semiconductor device and method of fabricating the same 有权
公开(公告)号：US20060065918A1
公开(公告)日：2006-03-30
申请号：US11270615
申请日：2005-11-10
申请人： Yoshihisa Nagano , Yasuhiro Uemoto
发明人： Yoshihisa Nagano , Yasuhiro Uemoto
IPC分类号： H01L21/8244
CPC分类号： H01L27/10894 , H01L27/10852 , H01L27/11507 , H01L27/11509 , H01L28/55
摘要： A protective insulating film is deposited over first and second field-effect transistors formed on a semiconductor substrate. A capacitor composed of a capacitor lower electrode, a capacitor insulating film composed of an insulating metal oxide film, and a capacitor upper electrode is formed on the protective insulating film. A first contact plug formed in the protective insulating film provides a direct connection between the capacitor lower electrode and an impurity diffusion layer of the first field-effect transistor. A second contact plug formed in the protective insulating film provides a direct connection between the capacitor upper electrode and an impurity diffusion layer of the second field-effect transistor.

29. 发明授权

US06756282B2 Semiconductor device and method of fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US06756282B2
公开(公告)日：2004-06-29
申请号：US10164409
申请日：2002-06-10
申请人： Yoshihisa Nagano , Yasuhiro Uemoto
发明人： Yoshihisa Nagano , Yasuhiro Uemoto
IPC分类号： H01L2120
CPC分类号： H01L27/10894 , H01L27/10852 , H01L27/11507 , H01L27/11509 , H01L28/55
摘要： A protective insulating film is deposited over first and second field-effect transistors formed on a semiconductor substrate. A capacitor composed of a capacitor lower electrode, a capacitor insulating film composed of an insulating metal oxide film, and a capacitor upper electrode is formed on the protective insulating film. A first contact plug formed in the protective insulating film provides a direct connection between the capacitor lower electrode and an impurity diffusion layer of the first field-effect transistor. A second contact plug formed in the protective insulating film provides a direct connection between the capacitor upper electrode and an impurity diffusion layer of the second field-effect transistor.
摘要翻译：保护绝缘膜沉积在形成在半导体衬底上的第一和第二场效应晶体管上。在保护绝缘膜上形成由电容器下电极构成的电容器，由绝缘金属氧化物膜构成的电容绝缘膜和电容器上电极。形成在保护绝缘膜中的第一接触插塞提供电容器下电极和第一场效应晶体管的杂质扩散层之间的直接连接。形成在保护绝缘膜中的第二接触插塞提供电容器上电极和第二场效应晶体管的杂质扩散层之间的直接连接。

30. 再颁专利

USRE41625E1 Semiconductor device and method of fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：USRE41625E1
公开(公告)日：2010-09-07
申请号：US10829476
申请日：2004-04-22
申请人： Yoshihisa Nagano , Yasuhiro Uemoto
发明人： Yoshihisa Nagano , Yasuhiro Uemoto
IPC分类号： H01L29/94
CPC分类号： H01L27/10894 , H01L27/10852 , H01L27/11507 , H01L27/11509 , H01L28/55
摘要： A protective insulating film is deposited over first and second field-effect transistors formed on a semiconductor substrate. A capacitor composed of a capacitor lower electrode, a capacitor insulating film composed of an insulating metal oxide film, and a capacitor upper electrode is formed on the protective insulating film. A first contact plug formed in the protective insulating film provides a direct connection between the capacitor lower electrode and an impurity diffusion layer of the first field-effect transistor. A second contact plug formed in the protective insulating film provides a direct connection between the capacitor upper electrode and an impurity diffusion layer of the second field-effect transistor.
摘要翻译：保护绝缘膜沉积在形成在半导体衬底上的第一和第二场效应晶体管上。在保护绝缘膜上形成由电容器下电极构成的电容器，由绝缘金属氧化物膜构成的电容绝缘膜和电容器上电极。形成在保护绝缘膜中的第一接触插塞提供电容器下电极和第一场效应晶体管的杂质扩散层之间的直接连接。形成在保护绝缘膜中的第二接触插塞提供电容器上电极和第二场效应晶体管的杂质扩散层之间的直接连接。

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