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21. 发明申请

US20050270846A1 Nonvolatile semiconductor memory 有权
标题翻译：非易失性半导体存储器
公开(公告)号：US20050270846A1
公开(公告)日：2005-12-08
申请号：US11197552
申请日：2005-08-05
申请人： Hiroshi Watanabe , Hiroshi Nakamura , Kazuhiro Shimizu , Seiichi Aritome , Toshitake Yaegashi , Yuji Takeuchi , Kenichi Imamiya , Ken Takeuchi , Hideko Oodaira
发明人： Hiroshi Watanabe , Hiroshi Nakamura , Kazuhiro Shimizu , Seiichi Aritome , Toshitake Yaegashi , Yuji Takeuchi , Kenichi Imamiya , Ken Takeuchi , Hideko Oodaira
IPC分类号： G11C16/04 , H01L21/8247 , H01L27/105 , H01L27/115
CPC分类号： H01L27/11521 , G11C16/0483 , G11C16/10 , H01L27/105 , H01L27/115 , H01L27/11524 , H01L27/11526 , H01L27/11529
摘要： A select gate transistor has a select gate electrode composed of a first-level conductive layer and a second-level conductive layer. The first-level conductive layer has contact areas. The second-level conductive layer has its portions removed that are located above the contact areas. Two adjacent select gate electrodes that are adjacent to each other in the column direction are arranged such that the contact areas of one select gate electrode are not opposed to the contact areas of the other select gate electrode. One select gate electrode has its first- and second-level conductive layers removed in their portions that are opposed to the contact areas of the other select gate electrode.
摘要翻译：选择栅极晶体管具有由第一级导电层和第二级导电层构成的选择栅电极。第一级导电层具有接触区域。第二级导电层的部分被去除，位于接触区域上方。在列方向上彼此相邻的两个相邻的选择栅电极被布置成使得一个选择栅电极的接触区域不与另一个选择栅电极的接触区域相对。一个选择栅电极在其与另一个选择栅电极的接触区域相对的部分中移除其第一和第二级导电层。

22. 发明授权

US07425739B2 Nonvolatile semiconductor memory 有权
标题翻译：非易失性半导体存储器
公开(公告)号：US07425739B2
公开(公告)日：2008-09-16
申请号：US11197552
申请日：2005-08-05
申请人： Hiroshi Watanabe , Hiroshi Nakamura , Kazuhiro Shimizu , Seiichi Aritome , Toshitake Yaegashi , Yuji Takeuchi , Kenichi Imamiya , Ken Takeuchi , Hideko Oodaira
发明人： Hiroshi Watanabe , Hiroshi Nakamura , Kazuhiro Shimizu , Seiichi Aritome , Toshitake Yaegashi , Yuji Takeuchi , Kenichi Imamiya , Ken Takeuchi , Hideko Oodaira
IPC分类号： H01L27/108 , H01L29/73
CPC分类号： H01L27/11521 , G11C16/0483 , G11C16/10 , H01L27/105 , H01L27/115 , H01L27/11524 , H01L27/11526 , H01L27/11529
摘要： A select gate transistor has a select gate electrode composed of a first-level conductive layer and a second-level conductive layer. The first-level conductive layer has contact areas. The second-level conductive layer has its portions removed that are located above the contact areas. Two adjacent select gate electrodes that are adjacent to each other in the column direction are arranged such that the contact areas of one select gate electrode are not opposed to the contact areas of the other select gate electrode. One select gate electrode has its first- and second-level conductive layers removed in their portions that are opposed to the contact areas of the other select gate electrode.
摘要翻译：选择栅极晶体管具有由第一级导电层和第二级导电层构成的选择栅电极。第一级导电层具有接触区域。第二级导电层的部分被去除，位于接触区域上方。在列方向上彼此相邻的两个相邻的选择栅电极被布置成使得一个选择栅电极的接触区域不与另一个选择栅电极的接触区域相对。一个选择栅电极在其与另一个选择栅电极的接触区域相对的部分中移除其第一和第二级导电层。

23. 发明申请

US20070103983A1 Nonvolatile Semiconductor Memory 有权
标题翻译：非易失性半导体存储器
公开(公告)号：US20070103983A1
公开(公告)日：2007-05-10
申请号：US11617425
申请日：2006-12-28
申请人： Hiroshi Watanabe , Hiroshi Nakamura , Kazuhiro Shimizu , Seiichi Aritome , Toshitake Yaegashi , Yuji Takeuchi , Kenichi Imamiya , Ken Takeuchi , Hideko Oodaira
发明人： Hiroshi Watanabe , Hiroshi Nakamura , Kazuhiro Shimizu , Seiichi Aritome , Toshitake Yaegashi , Yuji Takeuchi , Kenichi Imamiya , Ken Takeuchi , Hideko Oodaira
IPC分类号： G11C16/04
CPC分类号： H01L27/11521 , G11C16/0483 , G11C16/10 , H01L27/105 , H01L27/115 , H01L27/11524 , H01L27/11526 , H01L27/11529
摘要： A select gate transistor has a select gate electrode composed of a first-level conductive layer and a second-level conductive layer. The first-level conductive layer has contact areas. The second-level conductive layer has its portions removed that are located above the contact areas. Two adjacent select gate electrodes that are adjacent to each other in the column direction are arranged such that the contact areas of one select gate electrode are not opposed to the contact areas of the other select gate electrode. One select gate electrode has its first- and second-level conductive layers removed in their portions that are opposed to the contact areas of the other select gate electrode.
摘要翻译：选择栅极晶体管具有由第一级导电层和第二级导电层构成的选择栅电极。第一级导电层具有接触区域。第二级导电层的部分被去除，位于接触区域上方。在列方向上彼此相邻的两个相邻的选择栅电极被布置成使得一个选择栅电极的接触区域不与另一个选择栅电极的接触区域相对。一个选择栅电极在其与另一个选择栅电极的接触区域相对的部分中除去其第一和第二级导电层。

24. 发明申请

US20120075903A1 Nonvolatile Semiconductor Memory 有权
标题翻译：非易失性半导体存储器
公开(公告)号：US20120075903A1
公开(公告)日：2012-03-29
申请号：US13310148
申请日：2011-12-02
申请人： Hiroshi Watanabe , Hiroshi Nakamura , Kazuhiro Shimizu , Seiichi Aritome , Toshitake Yaegashi , Yuji Takeuchi , Kenichi Imamiya , Ken Takeuchi , Hideko Oodaira
发明人： Hiroshi Watanabe , Hiroshi Nakamura , Kazuhiro Shimizu , Seiichi Aritome , Toshitake Yaegashi , Yuji Takeuchi , Kenichi Imamiya , Ken Takeuchi , Hideko Oodaira
IPC分类号： G11C5/06
CPC分类号： G11C16/0483 , G11C16/10
摘要： A select gate transistor has a select gate electrode composed of a first-level conductive layer and a second-level conductive layer. The first-level conductive layer has contact areas. The second-level conductive layer has its portions removed that are located above the contact areas. Two adjacent select gate electrodes that are adjacent to each other in the column direction are arranged such that the contact areas of one select gate electrode are not opposed to the contact areas of the other select gate electrode. One select gate electrode has its first- and second-level conductive layers removed in their portions that are opposed to the contact areas of the other select gate electrode.
摘要翻译：选择栅极晶体管具有由第一级导电层和第二级导电层构成的选择栅电极。第一级导电层具有接触区域。第二级导电层的部分被去除，位于接触区域上方。在列方向上彼此相邻的两个相邻的选择栅电极被布置成使得一个选择栅电极的接触区域不与另一个选择栅电极的接触区域相对。一个选择栅电极在其与另一个选择栅电极的接触区域相对的部分中移除其第一和第二级导电层。

25. 发明授权

US06512253B2 Nonvolatile semiconductor memory 失效
公开(公告)号：US06512253B2
公开(公告)日：2003-01-28
申请号：US09976317
申请日：2001-10-15
申请人： Hiroshi Watanabe , Hiroshi Nakamura , Kazuhiro Shimizu , Seiichi Aritome , Toshitake Yaegashi , Yuji Takeuchi , Kenichi Imamiya , Ken Takeuchi , Hideko Oodaira
发明人： Hiroshi Watanabe , Hiroshi Nakamura , Kazuhiro Shimizu , Seiichi Aritome , Toshitake Yaegashi , Yuji Takeuchi , Kenichi Imamiya , Ken Takeuchi , Hideko Oodaira
IPC分类号： H01L2710
CPC分类号： H01L27/11521 , G11C16/0483 , G11C16/10 , H01L27/105 , H01L27/115 , H01L27/11524 , H01L27/11526 , H01L27/11529
摘要： A select gate transistor has a select gate electrode composed of a first-level conductive layer and a second-level conductive layer. The first-level conductive layer has a plurality of contact areas. The second-level conductive layer has its portions removed that are located above the contact areas. Two adjacent select gate electrodes that are adjacent to each other in the column direction are arranged such that the contact areas of one select gate electrode are not opposed to the contact areas of the other select gate electrode. One select gate electrode has its first- and second-level conductive layers removed in their portions that are opposed to the contact areas of the other select gate electrode.

26. 发明授权

US06353242B1 Nonvolatile semiconductor memory 失效
标题翻译：非易失性半导体存储器
公开(公告)号：US06353242B1
公开(公告)日：2002-03-05
申请号：US09274481
申请日：1999-03-23
申请人： Hiroshi Watanabe , Hiroshi Nakamura , Kazuhiro Shimizu , Seiichi Aritome , Toshitake Yaegashi , Yuji Takeuchi , Kenichi Imamiya , Ken Takeuchi , Hideko Oodaira
发明人： Hiroshi Watanabe , Hiroshi Nakamura , Kazuhiro Shimizu , Seiichi Aritome , Toshitake Yaegashi , Yuji Takeuchi , Kenichi Imamiya , Ken Takeuchi , Hideko Oodaira
IPC分类号： G11C1604
CPC分类号： H01L27/11521 , G11C16/0483 , G11C16/10 , H01L27/105 , H01L27/115 , H01L27/11524 , H01L27/11526 , H01L27/11529
摘要： A select gate transistor has a select gate electrode composed of a first-level conductive layer and a second-level conductive layer. The first-level conductive layer has a plurality of contact areas. The second-level conductive layer has its portions removed that are located above the contact areas. Two adjacent select gate electrodes that are adjacent to each other in the column direction are arranged such that the contact areas of one select gate electrode are not opposed to the contact areas of the other select gate electrode. One select gate electrode has its first- and second-level conductive layers removed in their portions that are opposed to the contact areas of the other select gate electrode.
摘要翻译：选择栅极晶体管具有由第一级导电层和第二级导电层构成的选择栅电极。第一级导电层具有多个接触区域。第二级导电层的部分被去除，位于接触区域上方。在列方向上彼此相邻的两个相邻的选择栅电极被布置成使得一个选择栅电极的接触区域不与另一个选择栅电极的接触区域相对。一个选择栅电极在其与另一个选择栅电极的接触区域相对的部分中移除其第一和第二级导电层。

27. 发明授权

US06974979B2 Nonvolatile semiconductor memory 有权
标题翻译：非易失性半导体存储器
公开(公告)号：US06974979B2
公开(公告)日：2005-12-13
申请号：US10303818
申请日：2002-11-26
申请人： Hiroshi Watanabe , Hiroshi Nakamura , Kazuhiro Shimizu , Seiichi Aritome , Toshitake Yaegashi , Yuji Takeuchi , Kenichi Imamiya , Ken Takeuchi , Hideko Oodaira
发明人： Hiroshi Watanabe , Hiroshi Nakamura , Kazuhiro Shimizu , Seiichi Aritome , Toshitake Yaegashi , Yuji Takeuchi , Kenichi Imamiya , Ken Takeuchi , Hideko Oodaira
IPC分类号： G11C16/04 , H01L21/8247 , H01L27/105 , H01L27/115 , H01L29/73 , H01L27/103
CPC分类号： H01L27/11521 , G11C16/0483 , G11C16/10 , H01L27/105 , H01L27/115 , H01L27/11524 , H01L27/11526 , H01L27/11529
摘要： A select gate transistor has a select gate electrode composed of a first-level conductive layer and a second-level conductive layer. The first-level conductive layer has a plurality of contact areas. The second-level conductive layer has its portions removed that are located above the contact areas. Two adjacent select gate electrodes that are adjacent to each other in the column direction are arranged such that the contact areas of one select gate electrode are not opposed to the contact areas of the other select gate electrode. One select gate electrode has its first- and second-level conductive layers removed in their portions that are opposed to the contact areas of the other select gate electrode.
摘要翻译：选择栅极晶体管具有由第一级导电层和第二级导电层构成的选择栅电极。第一级导电层具有多个接触区域。第二级导电层的部分被去除，位于接触区域上方。在列方向上彼此相邻的两个相邻的选择栅电极被布置成使得一个选择栅电极的接触区域不与另一个选择栅电极的接触区域相对。一个选择栅电极在其与另一个选择栅电极的接触区域相对的部分中移除其第一和第二级导电层。

28. 发明授权

US09168865B2 Organic electro-luminescence lighting device for vehicle 有权
标题翻译：车用有机电致发光照明装置
公开(公告)号：US09168865B2
公开(公告)日：2015-10-27
申请号：US13561405
申请日：2012-07-30
申请人： Hiroshi Nakamura
发明人： Hiroshi Nakamura
IPC分类号： B60Q1/14 , B60Q3/02
CPC分类号： B60Q3/82 , B60Q3/745 , B60Q3/80
摘要： An organic EL lighting device for a vehicle is provided, which includes an organic EL lighting portion provided in a matrix form on a ceiling of the vehicle, an organic EL touch portion provided on the organic EL lighting portion, an organic EL detection portion for detecting a position in which the organic EL touch portion is touched, an organic EL determination portion for determining a lighting area of the organic EL lighting portion based on the position detected by the organic EL detection portion, and an organic EL driving portion for lighting the lighting area of the organic EL lighting portion determined by the organic EL determination portion.
摘要翻译：本发明提供一种车辆用有机EL照明装置，其特征在于，包括在车辆的天花板上以矩阵状设置的有机EL照明部，设置在有机EL照明部上的有机EL接触部，有机EL触摸部分被触摸的位置，用于基于由有机EL检测部分检测到的位置来确定有机EL照明部分的照明区域的有机EL确定部分和用于点亮照明的有机EL驱动部分由有机EL确定部分确定的有机EL照明部分的面积。

29. 发明授权

US09136823B2 Duplexer 有权
标题翻译：双工器
公开(公告)号：US09136823B2
公开(公告)日：2015-09-15
申请号：US13344265
申请日：2012-01-05
申请人： Shogo Inoue , Hiroshi Nakamura
发明人： Shogo Inoue , Hiroshi Nakamura
IPC分类号： H03H9/72 , H03H9/70 , H03H9/00 , H03H9/02 , H03H9/54 , H03H9/58 , H03H9/64
CPC分类号： H03H9/725 , H03H9/0023 , H03H9/0071 , H03H9/0085 , H03H9/02669 , H03H9/542 , H03H9/585 , H03H9/6436 , H03H9/644 , H03H9/6483 , H03H9/6489 , H03H9/706
摘要： A duplexer includes a reception filter that is connected between a reception terminal and an antenna terminal and includes one or a plurality of series resonators that are acoustic wave resonators, and a transmission filter that is connected between a transmission terminal and the antenna terminal and includes one or a plurality of acoustic wave resonators, a resonance frequency of a first series resonator that is one of the one or the plurality of series resonators and is closest to the antenna terminal in the reception filter being higher than an upper limit frequency of a reception band of the reception filter.
摘要翻译：双工器包括连接在接收端子和天线端子之间的接收滤波器，并且包括作为声波谐振器的一个或多个串联谐振器，以及连接在发送端子和天线端子之间的发送滤波器，并且包括一个或多个声波谐振器，作为一个或多个串联谐振器之一并且最接近接收滤波器中的天线端子的第一串联谐振器的谐振频率高于接收频带的上限频率的接收过滤器。

30. 发明授权

US08907740B2 Duplexer 有权
标题翻译：双工器
公开(公告)号：US08907740B2
公开(公告)日：2014-12-09
申请号：US13291269
申请日：2011-11-08
申请人： Jun Tsutsumi , Masafumi Iwaki , Hiroshi Nakamura
发明人： Jun Tsutsumi , Masafumi Iwaki , Hiroshi Nakamura
IPC分类号： H03H9/00 , H03H9/05 , H03H9/70 , H03H9/72 , H03H9/10
CPC分类号： H03H9/0566 , H01L2224/16225 , H01L2924/16195 , H03H9/0523 , H03H9/0557 , H03H9/059 , H03H9/1014 , H03H9/1071 , H03H9/706 , H03H9/725
摘要： A duplexer includes: an insulation substrate having an upper surface on which a transmission filter and a reception filter are mounted, and a lower surface on which a foot pad layer electrically connected to the transmission filter and the reception filter is formed; a transmission pad provided on the upper surface and electrically connected to the transmission filter; a reception pad provided on the upper surface and electrically connected to the reception filter, a ring-shaped electrode provided on the upper surface and configured to surround the transmission pad and the reception pad; a ground foot pad included in the foot pad layer, and a via interconnection configured to electrically interconnect the ring-shaped electrode and the ground foot pad and to be provided in the ring-shaped electrode in a section along a shorter one of routes that connect the transmission pad and the reception pad to each other along the ring-shaped electrode.
摘要翻译：双工器包括：具有安装有透射滤光器和接收滤光器的上表面的绝缘基板和形成有与传输滤波器和接收滤波器电连接的脚垫层的下表面; 传输焊盘，其设置在所述上表面上并电连接到所述传输滤波器; 设置在所述上表面上并与所述接收滤波器电连接的接收焊盘，设置在所述上表面上并被配置为围绕所述传输焊盘和所述接收焊盘的环形电极; 包括在所述脚垫层中的接地脚垫以及通孔互连，所述通孔互连配置成电连接所述环形电极和所述接地脚垫，并且沿着连接的所述短路径的部分中设置在所述环形电极中传输垫和接收垫彼此沿着环形电极。

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